CN107370488A - Error correction/encoding method and device - Google Patents
Error correction/encoding method and device Download PDFInfo
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- CN107370488A CN107370488A CN201610319307.7A CN201610319307A CN107370488A CN 107370488 A CN107370488 A CN 107370488A CN 201610319307 A CN201610319307 A CN 201610319307A CN 107370488 A CN107370488 A CN 107370488A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
Abstract
The invention provides a kind of error correction/encoding method and device, wherein, this method includes：The bit sequence for treating Error Correction of Coding to first is segmented；To the part or all of bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；Each bit sequence fragment composition second after error checking and correction is encoded treats the bit sequence of Error Correction of Coding, and treats that error correcting code bits sequence carries out forward error correction coding to described second, generates bit sequence to be sent；Send the bit sequence to be sent.By the present invention, solve the problems, such as the error correction coding scheme error correcting capability deficiency in correlation technique, reduce the code check of true form word, decoding performance can be improved.
Description
Technical field
The present invention relates to the communications field, in particular to a kind of error correction/encoding method and device.
Background technology
The usual transmitting terminal of digital communication system generally includes the portions such as information source, source encoder, channel encoder and modulator
Point, receiving terminal generally includes demodulator, channel decoder, source decoder and the stay of two nights, as shown in figure 1, for according to correlation technique
Digital communication system schematic diagram.Channel encoder be used for information bit according to certain rule introduce redundancy so as to
Receiving terminal channel decoder can correct the error code that information occurs in channel to a certain extent.
Common channel coding method include bit XOR coding, block code, BCH code, Reed Solomon code (RS codes),
Fountain codes, low density parity check code, Turbo code, polarization code, convolutional code etc.；Should not channel coding method generally have difference
Applicable scene, also have different compiling code performances.Need to compile these channels sometimes for the performance for improving channel decoding
Code method carries out special optimization processing.
One than it is more typical need lifted channel decoding performance application scenarios be in mobile communication it is super it is reliable answer
With.Super reliability application generally comprises car networking, Industry Control etc. and requires higher application scenarios to data transmission credibility.Surpassing can
Typically there are two features by application：1) ratio of error of the data block of super reliable data transmission must be than the number of Common data transmission
According to low 4 to 5 orders of magnitude of block error rate；2) length of generally data block is not grown, typically below 1000 bits, traditional letter
Road coding method is difficult to obtain enough coding gains.
LDPC code is a kind of linear block codes based on sparse check matrix, exactly utilizes the sparse of its check matrix
Property, the coding and decoding of low complex degree could be realized, so that LDPC code moves towards practical.Above-mentioned Gallager codes are one
The LDPC code (regular ldpcc) of kind canonical, and Luby and Mitzenmacher et al. are promoted to Gallager codes,
It is proposed non-regular LDPC code (irregular ldpcc).LDPC code has many decoding algorithms, wherein, information transmission algorithm
(Message Passing algorithm) or belief propagation algorithm (Belief Propagation algorithm, BP
Algorithm) be LDPC code main flow and basic algorithm, occur many improved efficient coding algorithms at present.
The graphical representation of LDPC parity matrixs is bipartite graph.Have between bipartite graph and check matrix one a pair
The relation answered, M*N parity check matrix H define the pact that each code word with N-bit meets M even-odd check collection
Beam.One bipartite graph includes N number of variable node and M parity check node.When m-th of verification is related to n-th of bit, i.e.,
The element H that m rows n-th arrange in HM, nWhen=1, there will be a line connection check-node m and variable node n.In bipartite graph, appoint
All without there is a connection between what of a sort node, and in total the side number and check matrix in bipartite graph nonzero element number
It is equal.
A kind of special LDPC code is increasingly becoming mainstream applications due to the feature with structuring.If this LDPC code is strange
Even parity check matrix H is (M × z) × (N × z) matrixes, and it is made up of M × N number of matrix in block form, and each matrix in block form is z × z
Basic permutation matrix different powers, when basic permutation matrix is unit battle array, they are all the cyclic shift matrices of unit matrix
(being defaulted as moving to right in text).With following form：
If
If0 integer is greater than or equal to, is definedP is z × z standard replacement herein
Matrix, it is as follows：
Pass through such powerEach matrix in block form of can unique mark, the power of unit matrix can represent with 0,
Matrix is typically represented with -1.So, if H each matrix in block form replaced with its power, a M × N is just obtained
Power matrix Hb.Here, H is definedbIt is H basis matrix, H is referred to as HbExtended matrix.In actual coding, z=code lengths/
The columns N of basis matrix, referred to as spreading factor.
For example, matrix
Following parameter z and the basis matrix H of one 2 × 4 can be usedbExtension obtains：
Z=3 and
Accordingly it is also possible to the encoder for saying LDPC code is by basis matrix Hb, spreading factor z and selected basic displacement
Matrix is uniquely generated.
The basic check matrix of LDPC code can also be written as form：
Wherein,It is the system bit position of basic check matrix,There are Kb row,It is the verification bit position of basic check matrix,There are Mb row.Wherein Kb is positive integer, and Kb=Nb-Mb, wherein,
Nb is the columns of the basic check matrix of low density parity check code, and Mb is the row of the basis matrix of low density parity check code
Number；Wherein, can be the same or different in the system position of basic check matrix and verification bit position, the row weight respectively arranged.Row
Weight refers to the number of nonzero element in the row (or non-1 element).
The problem of for error correction coding scheme error correcting capability deficiency in correlation technique, solution is not yet provided at present.
The content of the invention
The embodiments of the invention provide a kind of error correction/encoding method and device, at least to solve the volume of the error correction in correlation technique
The problem of code scheme error correcting capability deficiency.
According to one embodiment of present invention, there is provided a kind of error correction/encoding method, including：Error Correction of Coding is treated to first
Bit sequence is segmented；To the part or all of bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；By mistake
Each bit sequence fragment composition second after check code treats the bit sequence of Error Correction of Coding, and treats Error Correction of Coding to described second
Bit sequence carries out forward error correction coding, generates bit sequence to be sent；Send the bit sequence to be sent.
Alternatively, described first treat that error correcting code bits sequence includes at least one of：Information bit sequence；To described
Information bit sequence integrally carries out the bit sequence after error checking and correction coding.
Alternatively, the error checking and correction coding includes at least one of：CRC coding, BCH code coding, RS
Code coding, checksum coding.
Alternatively, treat that the bit sequence of Error Correction of Coding carries out segmentation and included to first：According to bit sequence set in advance
The number of fragment or the length of bit sequence fragment carry out uniform or unequal piece-wise to the bit sequence to be encoded.
Alternatively, each bit sequence fragment composition second after error checking and correction is encoded treats the bit sequence of Error Correction of Coding,
And treat that error correcting code bits sequence carries out forward error correction coding to described second, generating bit sequence to be sent includes：First to difference
Before each information bit sequence of bit composition in each bit sequence fragment after wrong check code on correspondence position is carried out respectively
To Error Correction of Coding, respective check bit sequence is obtained；It is new using the bit composition on correspondence position in each check bit sequence
Bit sequence fragment；Each bit sequence fragment after original error mistake check code is synthesized to the new bit sequence fragment
Three treat the bit sequence of Error Correction of Coding, and treat that error correcting code bits sequence carries out forward error correction coding to the described 3rd, and generation is treated
Send bit sequence.
Alternatively, the forward error correction coding includes at least one of：Bit XOR coding, block code coding, BCH code
Coding, RS codes coding, fountain codes coding, low density parity check code coding, Turbo code coding, polarization code coding, convolutional code are compiled
Code.
Alternatively, in the case where the methods for forward error correction coding is low density parity check code coding, treated to first
The bit sequence of Error Correction of Coding, which carries out segmentation, to be included：Treat sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=
Nb-Mb, wherein, Nb is the columns of the basic check matrix of low density parity check code, and Mb is the base of low density parity check code
The line number of plinth matrix；Or according to E bits be that unit is segmented, wherein E is positive integer, and E=z-K3, wherein, z is
The spreading factor of low density parity check code, K3 are to the part or all of bit sequence fragment after the segmentation, are carried out respectively
Redundant bit length after error checking and correction coding.
Alternatively, in the case where the methods for forward error correction coding is low density parity check code coding, after segmentation
Partial bit sequence fragment, respectively carry out error checking and correction coding include：In bit sequence fragment after segmentation, select low close
The system bit position for spending the basic check matrix of parity check code arranges the great bit sequence fragment in predetermined threshold value；To what is selected
Bit sequence fragment carries out error checking and correction coding.
According to another embodiment of the present invention, a kind of encoder for correcting is additionally provided, including：Segmentation module, for pair
First treats that the bit sequence of Error Correction of Coding is segmented；Error checking and correction coding module, for the part or all of ratio after segmentation
Special sequence fragment, error checking and correction coding is carried out respectively；Forward error correction coding module, for each bit after error checking and correction is encoded
Sequence fragment composition second treats the bit sequence of Error Correction of Coding, and treats error correcting code bits sequence before carrying out to entangling to described second
Miscoding, generate bit sequence to be sent；Sending module, for sending the bit sequence to be sent.
Alternatively, the segmentation module is additionally operable to：According to the number or bit sequence of bit sequence fragment set in advance
The length of column-slice section carries out uniform or unequal piece-wise to the bit sequence to be encoded.
Alternatively, the forward error correction coding module is additionally operable to：Each bit sequence fragment after first being encoded to error checking and correction
Each information bit sequence of bit composition on middle correspondence position carries out forward error correction coding respectively, obtains respective check bit
Sequence；New bit sequence fragment is formed using the bit on correspondence position in each check bit sequence；Former error checking and correction is compiled
Each bit sequence fragment after code synthesizes the 3rd bit sequence for treating Error Correction of Coding with the new bit sequence fragment, and to institute
State the 3rd and treat that error correcting code bits sequence carries out forward error correction coding, generate bit sequence to be sent.
Alternatively, when the methods for forward error correction coding is that low density parity check code encodes, the segmentation module is also
For：Treating sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb is low-density parity
The columns of the basic check matrix of check code, Mb are the line numbers of the basis matrix of low density parity check code；Or according to E ratios
Be segmented specially for unit, wherein E is positive integer, and E=z-K3, wherein, z be low density parity check code extension because
Son, K3 are to the part or all of bit sequence fragment after the segmentation, carry out the redundant bit after error checking and correction coding respectively
Length.
Alternatively, when the methods for forward error correction coding is that low density parity check code encodes, the error checking and correction is compiled
Code module includes：Selecting unit, in bit sequence fragment after segmentation, selecting the basic school of low density parity check code
The system bit position for testing matrix arranges the great bit sequence fragment in predetermined threshold value；Error checking and correction coding unit, for selecting
Bit sequence fragment carry out error checking and correction coding.
According to still another embodiment of the invention, a kind of storage medium is additionally provided.The storage medium is arranged to storage and used
In the program code for performing following steps：The bit sequence for treating Error Correction of Coding to first is segmented；To the part after segmentation or
Whole bit sequence fragments, error checking and correction coding is carried out respectively；Each bit sequence fragment composition the after error checking and correction is encoded
Two treat the bit sequence of Error Correction of Coding, and treat that error correcting code bits sequence carries out forward error correction coding to described second, and generation is treated
Send bit sequence；Send the bit sequence to be sent.
By the present invention, due to the bit sequence for treating Error Correction of Coding being segmented, and to the bit sequence after segmentation
Fragment carries out error checking and correction coding respectively, then carries out forward error correction coding and life to the bit sequence fragment after error checking and correction coding
Into bit sequence to be sent, so that decoder can be according to the error check code of each bit sequence fragment during decoding
To judge whether current bit sequence fragment is correct, if it is correct, decoder then sees current bit sequence fragment
Into being to know bit, and without continue to decode to current bit sequence, this is decoded equivalent to code is shortened, and reduces true form word
Code check, decoding performance can be improved, solve the problems, such as the error correction coding scheme error correcting capability deficiency in correlation technique.
Brief description of the drawings
Accompanying drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair
Bright schematic description and description is used to explain the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings：
Fig. 1 is the schematic diagram according to the digital communication system of correlation technique；
Fig. 2 is the flow chart of error correction/encoding method according to embodiments of the present invention；
Fig. 3 is the structured flowchart of encoder for correcting according to embodiments of the present invention；
Fig. 4 is the schematic diagram of according to embodiments of the present invention one error correcting coding process；
Fig. 5 is the schematic diagram of according to embodiments of the present invention two error correcting coding process.
Embodiment
Describe the present invention in detail below with reference to accompanying drawing and in conjunction with the embodiments.It should be noted that do not conflicting
In the case of, the feature in embodiment and embodiment in the application can be mutually combined.
It should be noted that term " first " in description and claims of this specification and above-mentioned accompanying drawing, "
Two " etc. be for distinguishing similar object, without for describing specific order or precedence.
The characteristics of for super reliability application, the embodiment of the present invention propose a kind of new error correction/encoding method, and this method increases
The mode that segment encoding is carried out to bit sequence to be encoded is added, further enhancing the error correcting capability of code word, improve volume
The gain of code.
In the present embodiment, there is provided a kind of error correction/encoding method, Fig. 2 are Error Correction of Coding sides according to embodiments of the present invention
The flow chart of method, as shown in Fig. 2 this method comprises the following steps：
Step S202, the bit sequence for treating Error Correction of Coding to first are segmented；
Step S204, to the part or all of bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；
Step S206, each bit sequence fragment composition second after error checking and correction is encoded treat the bit sequence of Error Correction of Coding
Row, and treat that error correcting code bits sequence carries out forward error correction coding to described second, generate bit sequence to be sent；
Step S208, send the bit sequence to be sent.
The bit sequence for treating Error Correction of Coding is segmented by above-mentioned steps by the present embodiment, and to the ratio after segmentation
Special sequence fragment carries out error checking and correction coding respectively, then carries out forward error correction volume to the bit sequence fragment after error checking and correction coding
Code simultaneously generates bit sequence to be sent, so that decoder can be according to the mistake of each bit sequence fragment during decoding
Check code judges whether current bit sequence fragment is correct, if it is correct, decoder is then by current bit sequence
Fragment, which is regarded as, knows bit, and without continuing to decode to current bit sequence, this is decoded equivalent to code is shortened, and reduces original
The code check of code word, decoding performance can be improved, solve the problems, such as the error correction coding scheme error correcting capability deficiency in correlation technique.
It is described to treat that error correcting code bits sequence includes information bit for step S202 as a kind of preferred embodiment
Sequence carries out the bit sequence after overall mistake check code to described information bit sequence；Wherein described error checking and correction is compiled
Code can be any coding with error checking and correction function, including but not limited to CRC coding, BCH code coding,
Reed Solomon code (RS codes) coding, checksum coding.Similarly, the error checking and correction coding in step S204 can also be
Any coding with error checking and correction function, including but not limited to CRC coding, BCH code coding, Reed-institute sieve
Door code (RS codes) coding, checksum coding.
As a kind of preferred embodiment, for step S202, the bit sequence for treating Error Correction of Coding is segmented
Can be：According to the length of the number of bit sequence fragment set in advance or bit sequence fragment to the bit to be encoded
Sequence carries out homogenous segmentations or unequal piece-wise.
As a kind of preferred embodiment, for step S206, methods described can also include：
Step S2062：What the bit in each bit sequence fragment after first being encoded to error checking and correction on correspondence position formed
Each information bit sequence carries out forward error correction coding respectively, obtains respective check bit sequence；Wherein described forward error correction is compiled
Code refers to the coding with error correction, and including but not limited to bit XOR coding, block code coding, BCH code encodes, be inner
Moral-Solomon code (RS codes) coding, fountain codes coding, low density parity check code coding, Turbo code encode, polarization code encodes,
Convolution coding；
Step S2064：Bit in each check bit sequence on correspondence position forms new bit sequence fragment；
Step S2066：By the new bit sequence in each bit sequence fragment after original error mistake check code and step S2064
Column-slice section forms the new bit sequence for treating Error Correction of Coding together, and treats that error correcting code bits sequence carries out forward error correction to new
Coding, generates bit sequence to be sent.
As a kind of preferred embodiment, for step S206, the forward error correction coding can refer to error correction work(
The coding of energy, including but not limited to bit XOR coding, block code coding, BCH code coding, Reed Solomon code (RS codes)
Coding, fountain codes coding, low density parity check code coding, Turbo code coding, polarization code coding, convolution coding.
Alternatively, if methods for forward error correction coding encodes for low density parity check code, in step a, transmitting terminal
Treating sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb is low density parity check code
Basic check matrix columns, Mb is the line number of the basis matrix of low density parity check code；Or
If methods for forward error correction coding encodes for low density parity check code, in step a, transmitting terminal is according to E ratios
Be segmented specially for unit, wherein E is positive integer, and E=z-K3, wherein, z be low density parity check code extension because
Son, K3 are the redundant bit length that each bit sequence fragment carries out after error checking and correction coding in step b.
Alternatively, can be to dividing in the case where the methods for forward error correction coding is low density parity check code coding
Partial bit sequence fragment after section carries out error checking and correction coding respectively, for example, can be according to the base of low density parity check code
The system bit position row of plinth check matrix select the partial bit sequence fragment for carrying out error checking and correction coding again.Specifically, may be used
In bit sequence fragment after segmentation, to select the system bit position of the basic check matrix of low density parity check code row weight
More than the bit sequence fragment of predetermined threshold value；Error checking and correction coding is carried out to the bit sequence fragment selected.
Through the above description of the embodiments, those skilled in the art can be understood that according to above-mentioned implementation
The method of example can add the mode of required general hardware platform to realize by software, naturally it is also possible to by hardware, but a lot
In the case of the former be more preferably embodiment.Based on such understanding, technical scheme is substantially in other words to existing
The part that technology contributes can be embodied in the form of software product, and the computer software product is stored in a storage
In medium (such as ROM/RAM, magnetic disc, CD), including some instructions to cause a station terminal equipment (can be mobile phone, calculate
Machine, server, or network equipment etc.) perform method described in each embodiment of the present invention.
In the present embodiment, additionally provide a kind of encoder for correcting, the device be used for realize above-described embodiment and preferably
Embodiment, repeating no more for explanation was carried out.As used below, term " module " can realize predetermined function
The combination of software and/or hardware.Although device described by following examples is preferably realized with software, hardware, or
The realization of the combination of person's software and hardware is also what may and be contemplated.
Fig. 3 is the structured flowchart of encoder for correcting according to embodiments of the present invention, as shown in figure 3, the device includes：Point
Root module 32, for treating that the bit sequence of Error Correction of Coding is segmented to first；Error checking and correction coding module 34, for segmentation
Part or all of bit sequence fragment after the segmentation of module 32, carries out error checking and correction coding respectively；Forward error correction coding module 36,
For each bit sequence fragment composition second after the execution error check code of error checking and correction coding module 34 to be treated into Error Correction of Coding
Bit sequence, and treated to described second error correcting code bits sequence carry out forward error correction coding, generate bit sequence to be sent；
Sending module 38, for sending the bit sequence to be sent of the generation of forward error correction coding module 36.
Alternatively, the segmentation module 32 can be also used for the number or ratio according to bit sequence fragment set in advance
The length of special sequence fragment carries out homogenous segmentations or unequal piece-wise to the bit sequence to be encoded.
Alternatively, the forward error correction coding module 36 can be also used for：Each bit sequence after first being encoded to error checking and correction
Each information bit sequence of bit composition in column-slice section on correspondence position carries out forward error correction coding respectively, obtains respective school
Test bit sequence；New bit sequence fragment is formed using the bit on correspondence position in each check bit sequence；Original error is wrong
Each bit sequence fragment after check code synthesizes the 3rd bit sequence for treating Error Correction of Coding with the new bit sequence fragment,
And treat that error correcting code bits sequence carries out forward error correction coding to the described 3rd, generate bit sequence to be sent.
Alternatively, when the methods for forward error correction coding is that low density parity check code encodes, the segmentation module 32
It can be also used for：Treating sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb is low close
The columns of the basic check matrix of parity check code is spent, Mb is the line number of the basis matrix of low density parity check code；Or press
It is that unit is segmented according to E bits, wherein E is positive integer, and E=z-K3, wherein, z is the expansion of low density parity check code
The factor is opened up, K3 is to the part or all of bit sequence fragment after the segmentation, carries out the redundancy after error checking and correction coding respectively
Bit length.
Alternatively, when the methods for forward error correction coding is that low density parity check code encodes, the error checking and correction is compiled
Code module can include：Selecting unit, in bit sequence fragment after segmentation, selecting the base of low density parity check code
The system bit position of plinth check matrix arranges the great bit sequence fragment in predetermined threshold value；Error checking and correction coding unit, for pair
The bit sequence fragment selected carries out error checking and correction coding.
It should be noted that above-mentioned modules can be realized by software or hardware, for the latter, Ke Yitong
Cross in the following manner realization, but not limited to this：Above-mentioned module is respectively positioned in same processor；Or above-mentioned modules are with any
The form of combination is located in different processors respectively.
Illustrated with reference to preferred embodiment, preferred embodiment below combines above-described embodiment and its is preferable to carry out
Mode.In preferred embodiment below, there is provided a kind of method of the Error Correction of Coding in data transmission procedure, this method include：
A, the bit sequence that transmitting terminal treats Error Correction of Coding are segmented；
B, to each bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；
C, the bit sequence for treating Error Correction of Coding of each bit sequence fragment composition newly after error checking and correction is encoded, and to new
Treat error correcting code bits sequence carry out forward error correction coding, generate bit sequence to be sent；
D, transmitting terminal send the bit sequence to be sent.
Further, it is described to treat that error correcting code bits sequence includes information bit sequence or to the letter for step a
Cease bit sequence and carry out the bit sequence after overall mistake check code；Wherein described error checking and correction coding refers to any with poor
The coding of wrong verifying function, including but not limited to CRC coding, BCH code coding, Reed Solomon code (RS codes)
Coding, checksum coding；
Further, carry out segmentation for step a, the bit sequence for treating Error Correction of Coding and refer to, according to setting in advance
The number of fixed bit sequence fragment or the length of bit sequence fragment carry out homogenous segmentations to the bit sequence to be encoded
Or unequal piece-wise；
Further, refer to any coding with error checking and correction function for step b, the error checking and correction coding, wrap
Include but be not limited to CRC coding, BCH code coding, Reed Solomon code (RS codes) coding, checksum coding；
Further, can also include for step c, methods described：
Step c1：Each letter that bit in each bit sequence fragment after first being encoded to error checking and correction on correspondence position forms
Breath bit sequence carries out forward error correction coding respectively, obtains respective check bit sequence；Wherein described forward error correction coding is
Refer to the coding with error correction, including but not limited to bit XOR coding, block code coding, BCH code coding, Reed-institute
Sieve door code (RS codes) coding, fountain codes coding, low density parity check code coding, Turbo code coding, polarization code (Polar
Code) coding, convolution coding；
Step c2：Bit in each check bit sequence on correspondence position forms new bit sequence fragment；
Step c3：By the new bit sequence fragment in each bit sequence fragment after original error mistake check code and step c2
The new bit sequence for treating Error Correction of Coding of composition together, and error correcting code bits sequence, which carries out forward error correction coding, to be treated to new,
Generate bit sequence to be sent；
Further, for step c, the forward error correction coding refers to the coding with error correction, including but unlimited
Due to bit XOR coding, block code coding, BCH code encodes, Reed Solomon code (RS codes) coding, fountain codes encode, low close
Spend parity check code coding, Turbo code coding, polarization code (Polar code) coding, convolution coding；
Further, for step a to step c, if methods for forward error correction coding encodes for low density parity check code,
Then in step a, transmitting terminal treats sequences of code bits and is divided into Kb sections, and wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb
It is the columns of the basic check matrix of low density parity check code, Mb is the line number of the basis matrix of low density parity check code；
Or
If methods for forward error correction coding encodes for low density parity check code, in step a, transmitting terminal is according to E ratios
Be segmented specially for unit, wherein E is positive integer, and E=z-K3, wherein, z be low density parity check code extension because
Son, K3 are the redundant bit length that each bit sequence fragment carries out after error checking and correction coding in step b.
Further, for previously given threshold value, in bit sequence fragment after segmentation, some bit sequence piece
The system bit position row of the basic check matrix of low density parity check code corresponding to section are great when the threshold value, then can be to this
Partial bit sequence fragment carries out forward error check code.
Error correction coding scheme set forth above is illustrated with several specific embodiments below：
Embodiment one：
Transmitting terminal sends bit sequence to be encoded to receiving terminal, wherein the length of bit sequence to be encoded is K bit, wherein
K1 bits are information bit, and K2 bits are the check bit that information bit generates after error checking and correction encodes, K, K1, and K2 is
Nonnegative integer, and K=K1+K2；The error checking and correction coding includes but is not limited to CRC coding, BCH code coding,
Reed Solomon code (RS codes) coding, checksum coding；In this example it is assumed that error checking and correction coded system is cyclic redundancy school
Test (CRC) coding.
Fig. 4 is the schematic diagram of according to embodiments of the present invention one error correcting coding process, as shown in figure 4, transmitting terminal treats volume
Code bit sequence is handled as follows：
Transmitting terminal is according to the number of the bit sequence fragment pre-set or the length of bit sequence fragment to be encoded
Bit sequence is segmented, in the present example it is assumed that division number is C sections, is then uniformly divided into the bit sequence to be encoded of K bit
C bit sequence fragment, the length of each bit sequence fragment areBit.If K can not be divided exactly by C, wherein one
Added in individual bit sequence fragmentThe known bits of individual transmitting-receiving two-end；WhereinExpression rounds up computing.
Transmitting terminal carries out error checking and correction coding to each bit sequence fragment respectively, and K3 is that each bit sequence fragment passes through mistake
The check bit generated after check code, then the length of each bit sequence is after error checking and correction encodesBit；
The error checking and correction coding includes but is not limited to CRC coding, BCH code coding, Reed Solomon code (RS codes)
Coding, checksum coding；In this example it is assumed that the error checking and correction coded system of each bit sequence fragment is CRC
(CRC) encode.
Each bit sequence fragment by error checking and correction coding is formed new bit sequence to be encoded, institute by transmitting terminal
It is K+C*K3 bits to state the new length with sequences of code bits, orBit.Transmitting terminal is to band encoding ratio
Special sequence carries out forward error correction coding, generates bit sequence to be sent.Wherein forward error correction coding includes but is not limited to bit
XOR coding, block code coding, BCH code coding, Reed Solomon code (RS codes) coding, fountain codes coding, low-density parity-check
Test code coding, Turbo code coding, polarization code coding, convolution coding；In this example it is assumed that before new bit sequence to be encoded
Encoded to Error Correction of Coding mode for low density parity check code (LDPC).
Embodiment two：
Transmitting terminal sends bit sequence to be encoded to receiving terminal, wherein the length of bit sequence to be encoded is K bit, wherein
K1 bits are information bit, and K2 bits are the check bit that information bit generates after error checking and correction encodes, K, K1, and K2 is
Nonnegative integer, and K=K1+K2；The error checking and correction coding includes but is not limited to CRC coding, BCH code coding,
Reed Solomon code (RS codes) coding, checksum coding；In this example it is assumed that error checking and correction coded system is cyclic redundancy school
Test (CRC) coding.
Fig. 5 is the schematic diagram of according to embodiments of the present invention two error correcting coding process, as shown in figure 5, transmitting terminal treats volume
Code bit sequence is handled as follows：
Transmitting terminal is according to the number of the bit sequence fragment pre-set or the length of bit sequence fragment to be encoded
Bit sequence is segmented, in the present example it is assumed that division number is C sections, is then uniformly divided into the bit sequence to be encoded of K bit
C bit sequence fragment, the length of each bit sequence fragment areBit.If K can not be divided exactly by C, wherein one
Added in individual bit sequence fragmentThe known bits of individual transmitting-receiving two-end；WhereinExpression rounds up computing.
Transmitting terminal carries out error checking and correction coding to each bit sequence fragment respectively, and K3 is that each bit sequence fragment passes through mistake
The check bit generated after check code, then the length of each bit sequence is after error checking and correction encodesBit；
The error checking and correction coding includes but is not limited to CRC coding, BCH code coding, Reed Solomon code (RS codes)
Coding, checksum coding；In this example it is assumed that the error checking and correction coded system of each bit sequence fragment is CRC
(CRC) check code.
Each information that transmitting terminal forms to the bit on correspondence position in C bit sequence fragment after error checking and correction coding
Bit sequence carries out forward error correction coding respectively, obtains respective check bit sequence.For example, to first bit sequence fragment
I-th of bit and second bit sequence fragment i-th of bit ..., the C bit sequence fragment i-th of bit, common C
I-th of information bit sequence of individual bit composition carries out forward error correction coding, i-th of check bit sequence is obtained, wherein verifying
The length of bit sequence is T bits, and wherein i is positive integer, andThe rest may be inferred, and one is sharedIt is individual long
Spend and carry out forward error correction coding respectively for the information sequence of C bits, obtainIndividual length is the check bit sequence of T bits
Row.Wherein, the forward error correction coding include but is not limited to bit XOR coding, block code coding, BCH code coding, Reed-
Solomon code (RS codes) coding, fountain codes coding, low density parity check code coding, Turbo code coding, polarization code coding, volume
Product code coding.In this example it is assumed that encoded for bit XOR.
Bit in each check bit sequence on correspondence position forms new bit sequence fragment；Such as first verification ratio
J-th of bit ... of j-th of bit of special sequence and second check bit sequence, theIndividual bit sequence fragment
J-th of bit form a new bit sequence fragment, wherein the length of the new bit sequence isBit,
Wherein j is positive integer, and 1≤j≤T；The rest may be inferred, a shared T new bit sequence fragments.
Transmitting terminal is by C bit sequence fragment after original error mistake check code and above-mentioned T new bit sequence fragments one
Rise composition it is new treat error correcting code bits sequence, the new length for treating error correcting code bits sequence isBit.Transmitting terminal new treats that error correcting code bits sequence carries out forward error correction coding to described.It is described
Forward error correction coding includes but is not limited to bit XOR coding, block code coding, BCH code coding, Reed Solomon code (RS
Code) coding, fountain codes coding, low density parity check code coding, Turbo code coding, polarization code (Polar code) coding, volume
Product code coding.In this example it is assumed that encoded for polarization code (Polar code).
Embodiment three：
Transmitting terminal sends bit sequence to be encoded to receiving terminal, wherein the length of bit sequence to be encoded is K bit, wherein
K1 bits are information bit, and K2 bits are the check bit that information bit generates after error checking and correction encodes, K, K1, and K2 is
Nonnegative integer, and K=K1+K2；In this example it is assumed that error checking and correction coded system encodes for CRC (CRC).
Transmitting terminal is treated sequences of code bits and is handled as follows：
Transmitting terminal is according to the number of the bit sequence fragment pre-set or the length of bit sequence fragment to be encoded
Bit sequence is segmented, in the present example it is assumed that division number is Kb sections, wherein, Kb is low density parity check code (LDPC)
Basis matrix HbMidrange subtracts line number, then the bit sequence to be encoded of K bit is uniformly divided into Kb bit sequence fragment,
Each the length of bit sequence fragment isBit.If K can not be divided exactly by Kb, a bit sequence fragment wherein
Middle additionThe known bits of individual transmitting-receiving two-end；WhereinExpression rounds up computing.
Transmitting terminal carries out error checking and correction coding to each bit sequence fragment respectively, and K3 is that each bit sequence fragment passes through mistake
The check bit generated after check code, then the length of each bit sequence is after error checking and correction encodesBit；
In this example it is assumed that the error checking and correction coded system of each bit sequence fragment encodes for CRC (CRC).
Each bit sequence fragment by error checking and correction coding is formed new bit sequence to be encoded, institute by transmitting terminal
The length for stating new bit sequence to be encoded is K+Kb*K3 bits, orBit.Transmitting terminal encodes to band
Bit sequence carries out forward error correction coding, generates bit sequence to be sent.In this example it is assumed that new bit sequence to be encoded
Forward error correction coding mode encodes for low density parity check code (LDPC).
Example IV：
Transmitting terminal sends bit sequence to be encoded to receiving terminal, wherein the length of bit sequence to be encoded is K bit, wherein
K1 bits are information bit, and K2 bits are the check bit that information bit generates after error checking and correction encodes, K, K1, and K2 is
Nonnegative integer, and K=K1+K2；In this example it is assumed that error checking and correction coded system encodes for CRC (CRC).
Transmitting terminal is treated sequences of code bits and is handled as follows：
Transmitting terminal treats volume according to the number of the bit sequence fragment pre-set or the length of bit sequence fragment
Code bit sequence is segmented, in the present example it is assumed that the length of bit sequence fragment is E bits, wherein E is positive integer, and E
=z-K3, wherein, z is the spreading factor of low density parity check code, and K3 is to intend carrying out error checking and correction to each bit sequence fragment
Redundant bit length after coding.Then the bit sequence to be encoded of K bit is uniformly divided intoIndividual bit sequence fragment, each
The length of bit sequence fragment is E bits.If K can not be divided exactly by E, added in a wherein bit sequence fragmentThe known bits of individual transmitting-receiving two-end；WhereinExpression rounds up computing.
Transmitting terminal carries out error checking and correction coding to each bit sequence fragment respectively, and K3 is that each bit sequence fragment passes through mistake
The check bit generated after check code, then the length of each bit sequence is z bits after error checking and correction encodes；In this example
Assuming that the error checking and correction coded system of each bit sequence fragment encodes for CRC (CRC).
Each bit sequence fragment by error checking and correction coding is formed new bit sequence to be encoded, institute by transmitting terminal
Stating the new length with sequences of code bits isBit.Transmitting terminal is treated before sequences of code bits is carried out to entangling
Miscoding, generate bit sequence to be sent.In this example it is assumed that the forward error correction coding mode of new bit sequence to be encoded is
Low density parity check code (LDPC) encodes.
Embodiment five：
Transmitting terminal sends bit sequence to be encoded to receiving terminal, wherein the length of bit sequence to be encoded is K bit, wherein
K1 bits are information bit, and K2 bits are the check bit that information bit generates after error checking and correction encodes, K, K1, and K2 is
Nonnegative integer, and K=K1+K2；In this example it is assumed that error checking and correction coded system encodes for CRC (CRC).
Transmitting terminal is treated sequences of code bits and is handled as follows：
Transmitting terminal is according to the number of the bit sequence fragment pre-set or the length of bit sequence fragment to be encoded
Bit sequence is segmented, in the present example it is assumed that division number is Kb sections, wherein, Kb is low density parity check code (LDPC)
Basis matrix HbMidrange subtracts line number, then the bit sequence to be encoded of K bit is anisotropically divided into Kb bit sequence
Fragment, and error checking and correction coding only is carried out to partial bit sequence fragment therein；
Wherein, in Kb bit sequence fragment, there is W1 first kind bit sequence fragment, wherein each bit sequence piece
The length of section is z bits, has W2 the second class bit sequence fragments, wherein the length of the second class bit sequence fragment is E ratios
Spy, wherein E are positive integer, and E=z-K3, K3 are after intending carrying out error checking and correction coding to the second class bit sequence fragment
Redundant bit length.Kb=W1+W2；
The W2 the second class bit sequence fragments correspond to the basic check matrix of the low density parity check code
The heavier row of system bit position row weight.For example, in the system bit position of the basic education matrixIn, there are the row that W2 is arranged
Weight is more than or equal to threshold value set in advance；The index of this W2 row is respectively I=[I1,I2,I3,...,Iw2], then the W2
Second class bit sequence fragment corresponds in Kb bit sequence fragment W2 bit sequence fragment for being cited as I；Remaining ratio
Special sequence fragment is the W1 first kind bit sequence fragment；
Error checking and correction coding is carried out respectively to each bit sequence fragment of the W2 the second class bit sequence fragments,
K3 error check bits are added after each second class bit sequence fragment.In this example it is assumed that the mistake of each bit sequence fragment
Check code mode encodes for CRC (CRC).
Each bit sequence fragment by error checking and correction coding is formed new bit sequence to be encoded, institute by transmitting terminal
It is z*Kb bits to state the new length with sequences of code bits.Transmitting terminal treats sequences of code bits and carries out forward error correction coding,
Generate bit sequence to be sent.In this example it is assumed that the forward error correction coding mode of new bit sequence to be encoded is strange for low-density
Even parity check code (LDPC) encodes.
The beneficial effect for the scheme that the present embodiment provides is mainly manifested in, when the channel decoder of receiving terminal is to using this reality
When applying the code word of the carry out Error Correction of Coding of example and entering row decoding, decoder can be according to each bit sequence fragment during decoding
Error check code judges whether current bit sequence fragment is correct, if it is correct, decoder is then by current bit
Sequence fragment, which is regarded as, knows bit, and without continuing to decode to current bit sequence, this is decoded equivalent to code is shortened, and is reduced
The code check of true form word, can improve decoding performance；Simultaneously as the present embodiment also proposed one kind to each bit sequence fragment
Between correspondence position bit forward error correction, equivalent to add one-level ISN protection, so as to improve the performance finally decoded.
Especially, the present embodiment for low density parity check code also specially propose by the number of bit sequence fragment with
The parameter of the basis matrix of low density parity check code, or, by the length and low density parity check code of bit sequence fragment
Spreading factor size matching so that the present embodiment propose segment fault verification and low-density checksum coding energy
Perfect adaptation, the efficiency and performance of coding and decoding can be improved.
Especially, because low density parity check code has different error correcting capabilities, the present embodiment to the different piece of code word
The method that unequal piece-wise and partial error verification are also specially proposed also directed to low density parity check code, it is only strange to low-density
The row of the basic check matrix system bit position row heavier-weight of even parity check code carry out error checking and correction.Its advantage is, to entangling
The stronger bit sequence fragment of wrong ability, which carries out error checking and correction, can confirm whether the bit sequence fragment has correctly translated as early as possible
Code, can regard as the bit sequence fragment of correct decoding and know bit, and without to current bit sequence after
Continuous decoding, this decodes equivalent to code is shortened, reduces the code check of true form word, can improve decoding performance；Simultaneously because only needing pair
Partial bit sequence fragment adds error check bits, therefore also reduces expense.
Embodiments of the invention additionally provide a kind of storage medium.Alternatively, in the present embodiment, above-mentioned storage medium can
The program code for performing following steps to be arranged to storage to be used for：
Step S202, the bit sequence for treating Error Correction of Coding to first are segmented；
Step S204, to the part or all of bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；
Step S206, each bit sequence fragment composition second after error checking and correction is encoded treat the bit sequence of Error Correction of Coding
Row, and treat that error correcting code bits sequence carries out forward error correction coding to described second, generate bit sequence to be sent；
Step S208, send the bit sequence to be sent.
Alternatively, in the present embodiment, above-mentioned storage medium can include but is not limited to：USB flash disk, read-only storage (ROM,
Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disc or
CD etc. is various can be with the medium of store program codes.
Alternatively, the specific example in the present embodiment may be referred to described in above-described embodiment and optional embodiment
Example, the present embodiment will not be repeated here.
Obviously, those skilled in the art should be understood that above-mentioned each module of the invention or each step can be with general
Computing device realize that they can be concentrated on single computing device, or be distributed in multiple computing devices and formed
Network on, alternatively, they can be realized with the program code that computing device can perform, it is thus possible to they are stored
Performed in the storage device by computing device, and in some cases, can be with different from shown in order execution herein
The step of going out or describing, they are either fabricated to each integrated circuit modules respectively or by multiple modules in them or
Step is fabricated to single integrated circuit module to realize.So, the present invention is not restricted to any specific hardware and software combination.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should be included in the scope of the protection.
Claims (13)
- A kind of 1. error correction/encoding method, it is characterised in that including：The bit sequence for treating Error Correction of Coding to first is segmented；To the part or all of bit sequence fragment after segmentation, error checking and correction coding is carried out respectively；Each bit sequence fragment composition second after error checking and correction is encoded treats the bit sequence of Error Correction of Coding, and to described second Treat that error correcting code bits sequence carries out forward error correction coding, generate bit sequence to be sent；Send the bit sequence to be sent.
- 2. according to the method for claim 1, it is characterised in that described first treats that error correcting code bits sequence is included below extremely It is one of few：Information bit sequence；The bit sequence after error checking and correction coding is integrally carried out to described information bit sequence.
- 3. method according to claim 1 or 2, it is characterised in that the error checking and correction coding includes at least one of：CRC coding, BCH code coding, RS codes coding, checksum coding.
- 4. according to the method for claim 1, it is characterised in that treat that the bit sequence of Error Correction of Coding carries out fragmented packets to first Include：According to the length of the number of bit sequence fragment set in advance or bit sequence fragment to the bit sequence to be encoded Row carry out uniform or unequal piece-wise.
- 5. according to the method for claim 1, it is characterised in that each bit sequence fragment composition after error checking and correction is encoded Second treats the bit sequence of Error Correction of Coding, and treats that error correcting code bits sequence carries out forward error correction coding, generation to described second Bit sequence to be sent includes：Each information bit sequence that bit in each bit sequence fragment after first being encoded to error checking and correction on correspondence position forms Forward error correction coding is carried out respectively, obtains respective check bit sequence；New bit sequence fragment is formed using the bit on correspondence position in each check bit sequence；Each bit sequence fragment after original error mistake check code is synthesized the 3rd with the new bit sequence fragment and treats that error correction is compiled The bit sequence of code, and treat that error correcting code bits sequence carries out forward error correction coding to the described 3rd, generate bit sequence to be sent Row.
- 6. method according to any one of claim 1 to 5, it is characterised in that the forward error correction coding includes following At least one：Bit XOR coding, block code coding, BCH code coding, RS codes coding, fountain codes coding, low density parity check code are compiled Code, Turbo code coding, polarization code coding, convolution coding.
- 7. according to the method for claim 6, it is characterised in that in the methods for forward error correction coding be low-density parity-check In the case of testing code coding, treat that the bit sequence of Error Correction of Coding carries out segmentation and included to first：Treating sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb is low-density parity-check The columns of the basic check matrix of code is tested, Mb is the line number of the basis matrix of low density parity check code；OrIt is that unit is segmented according to E bits, wherein E is positive integer, and E=z-K3, wherein, z is low-density checksum The spreading factor of code, K3 are to the part or all of bit sequence fragment after the segmentation, after carrying out error checking and correction coding respectively Redundant bit length.
- 8. according to the method for claim 6, it is characterised in that in the methods for forward error correction coding be low-density parity-check In the case of testing code coding, to the partial bit sequence fragment after segmentation, carrying out error checking and correction coding respectively includes：In bit sequence fragment after segmentation, the system bit position row of the basic check matrix of low density parity check code are selected The great bit sequence fragment in predetermined threshold value；Error checking and correction coding is carried out to the bit sequence fragment selected.
- A kind of 9. encoder for correcting, it is characterised in that including：Segmentation module, for treating that the bit sequence of Error Correction of Coding is segmented to first；Error checking and correction coding module, for the part or all of bit sequence fragment after segmentation, carrying out error checking and correction volume respectively Code；Forward error correction coding module, Error Correction of Coding is treated for each bit sequence fragment composition second after error checking and correction is encoded Bit sequence, and treat that error correcting code bits sequence carries out forward error correction coding to described second, generate bit sequence to be sent；Sending module, for sending the bit sequence to be sent.
- 10. device according to claim 9, it is characterised in that the segmentation module is additionally operable to：According to the length of the number of bit sequence fragment set in advance or bit sequence fragment to the bit sequence to be encoded Row carry out uniform or unequal piece-wise.
- 11. device according to claim 9, it is characterised in that the forward error correction coding module is additionally operable to：Each information bit sequence that bit in each bit sequence fragment after first being encoded to error checking and correction on correspondence position forms Forward error correction coding is carried out respectively, obtains respective check bit sequence；New bit sequence fragment is formed using the bit on correspondence position in each check bit sequence；Each bit sequence fragment after original error mistake check code is synthesized the 3rd with the new bit sequence fragment and treats that error correction is compiled The bit sequence of code, and treat that error correcting code bits sequence carries out forward error correction coding to the described 3rd, generate bit sequence to be sent Row.
- 12. device according to claim 9, it is characterised in that when the methods for forward error correction coding is low-density parity During check code, the segmentation module is additionally operable to：Treating sequences of code bits and be divided into Kb sections, wherein Kb is positive integer, and Kb=Nb-Mb, wherein, Nb is low-density parity-check The columns of the basic check matrix of code is tested, Mb is the line number of the basis matrix of low density parity check code；OrIt is that unit is segmented according to E bits, wherein E is positive integer, and E=z-K3, wherein, z is low-density checksum The spreading factor of code, K3 are to the part or all of bit sequence fragment after the segmentation, after carrying out error checking and correction coding respectively Redundant bit length.
- 13. device according to claim 9, it is characterised in that when the methods for forward error correction coding is low-density parity During check code, the error checking and correction coding module includes：Selecting unit, in bit sequence fragment after segmentation, selecting the basic check matrix of low density parity check code System bit position arrange the great bit sequence fragment in predetermined threshold value；Error checking and correction coding unit, for carrying out error checking and correction coding to the bit sequence fragment selected.
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| CN110417507A (en) * | 2018-04-26 | 2019-11-05 | 成都盛拓源科技有限公司 | The Error Correction of Coding call method towards the error of entire data packet in one-way communication |
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| CN114079534A (en) * | 2020-08-20 | 2022-02-22 | 腾讯科技（深圳）有限公司 | Encoding method, decoding method, apparatus, medium, and electronic device |
| CN114696953A (en) * | 2022-03-01 | 2022-07-01 | 重庆理工大学 | Channel coding and decoding method for free space optical communication |
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| CN1282307C (en) * | 2004-03-05 | 2006-10-25 | 上海交通大学 | Method of adding circular test bit before coding Turbo product code |
| CN101383618B (en) * | 2007-09-05 | 2013-02-27 | 中兴通讯股份有限公司 | Encoding method for cyclic redundancy check code of transmission block |
| CN101159514A (en) * | 2007-10-31 | 2008-04-09 | 中兴通讯股份有限公司 | Method of adding cyclic redundancy code of transmission block |
-
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