CN115023027A - High-voltage pulse energy full-absorption circuit board and manufacturing method thereof - Google Patents
High-voltage pulse energy full-absorption circuit board and manufacturing method thereof Download PDFInfo
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- 238000010521 absorption reaction Methods 0.000 title claims abstract description 81
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000010410 layer Substances 0.000 claims abstract description 121
- 239000000463 material Substances 0.000 claims abstract description 84
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 69
- 238000000034 method Methods 0.000 claims abstract description 15
- 239000002346 layers by function Substances 0.000 claims abstract description 14
- 239000012212 insulator Substances 0.000 claims abstract description 9
- 239000011889 copper foil Substances 0.000 claims description 34
- 229920000642 polymer Polymers 0.000 claims description 23
- 229910052802 copper Inorganic materials 0.000 claims description 19
- 239000010949 copper Substances 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 14
- 239000011888 foil Substances 0.000 claims description 13
- 238000007639 printing Methods 0.000 claims description 11
- 229920001187 thermosetting polymer Polymers 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 238000013461 design Methods 0.000 claims description 5
- 238000007747 plating Methods 0.000 claims description 4
- 238000001179 sorption measurement Methods 0.000 claims description 4
- 238000005406 washing Methods 0.000 claims description 4
- 239000002131 composite material Substances 0.000 claims description 3
- 238000005238 degreasing Methods 0.000 claims description 3
- 238000005553 drilling Methods 0.000 claims description 3
- 238000007731 hot pressing Methods 0.000 claims description 3
- 239000002245 particle Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 2
- 238000002844 melting Methods 0.000 claims description 2
- 230000008018 melting Effects 0.000 claims description 2
- 238000002156 mixing Methods 0.000 claims description 2
- 239000004020 conductor Substances 0.000 abstract description 3
- 230000002159 abnormal effect Effects 0.000 description 6
- 238000001816 cooling Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000003292 glue Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002703 mutagenesis Methods 0.000 description 1
- 231100000350 mutagenesis Toxicity 0.000 description 1
- 238000007494 plate polishing Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- Engineering & Computer Science (AREA)
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- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention relates to the technical field of circuit boards, in particular to a high-voltage pulse energy full-absorption circuit board and a manufacturing method thereof. The upper surface and the lower surface of the common circuit board are both attached with an energy full-absorption functional layer, the energy full-absorption functional layer comprises a copper wire attaching layer, a functional material layer and a conductive grounding layer which are sequentially arranged, and the conductive grounding layer is tightly connected with the surface of the common circuit board; the functional material layer has an insulator state when a voltage at any point of any one of the copper-attached wires on the copper-attached wire layer is not higher than a threshold value, and a conductor state for causing a high voltage on the copper-attached wire layer to release high voltage energy to the conductive ground layer through the functional material layer when the voltage at a point on the copper-attached wire layer exceeds the threshold value. On the premise of realizing the full absorption of high-voltage pulse energy, the method has low precision requirement on the process, low manufacturing difficulty and easy popularization.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a high-voltage pulse energy full-absorption circuit board and a manufacturing method thereof.
Background
The anti-instant high-voltage pulse is a permanent subject in electronic manufacturing design, and the main object of the directional electromagnetic pulse cannon and the electromagnetic pulse bomb which are used as main means for attacking a communication command system is to attack and paralyze an electronic circuit of electronic equipment. At present, the protection of the electromagnetic pulse is mainly only to adopt a shielding scheme. The method inevitably leaves a large number of pores for the electromagnetic pulse to enter the shielding cavity, so that electronic devices of the equipment are difficult to be completely protected under the attack of the potential field of the electromagnetic pulse. Therefore, a more secure safeguard against an attack means such as an electromagnetic pulse is required.
In order to solve the above technical problems, chinese patent No. CN113438796A discloses a circuit board capable of absorbing instantaneous high-voltage pulse energy and a manufacturing method thereof, wherein an energy absorbing plate electrically connected to a ground wire is disposed on a copper-attached layer to release transient high-voltage pulse energy. However, the method needs to be provided with more energy absorption discs, needs to realize accurate alignment of the energy absorption discs and the attached copper wires of the surface circuit, and has high precision requirement on the process and high manufacturing difficulty.
Disclosure of Invention
The invention aims to provide a high-voltage pulse energy full-absorption circuit board and a manufacturing method thereof, aiming at the defects of the prior art, and the high-voltage pulse energy full-absorption circuit board has low precision requirement on the process, low manufacturing difficulty and easy popularization on the premise of realizing high-voltage pulse energy full absorption.
The invention relates to a high-voltage pulse energy full-absorption circuit board, which adopts the technical scheme that:
the circuit board comprises a common circuit board, wherein the upper surface and the lower surface of the common circuit board are both attached with a full energy absorption functional layer, the full energy absorption functional layer comprises a copper wire attaching layer, a functional material layer and a conductive grounding layer which are sequentially arranged, and the conductive grounding layer is tightly connected with the surface of the common circuit board;
the functional material layer has an insulator state at a voltage of not higher than a threshold value at any point of any one of the copper-attached wires on the copper-attached wire layer, and
at the moment when the voltage of a certain point on the copper wire-attached layer exceeds a threshold value, the high voltage on the copper wire-attached layer is used for releasing the high-voltage energy to the conductive ground layer through the functional material layer;
wherein, after the high-voltage energy is released, the functional material layer is immediately restored to an insulator state.
Through the technical scheme, when the voltage difference between the voltage on all the attached copper wires in the attached copper wire layer and the high-molecular resistance material layer is less than 300V, the functional material layer is an insulator, and when an abnormal voltage higher than 300V appears at any point of any one attached copper wire on the attached copper wire layer, the point of the functional material layer corresponding to the point of the attached copper wire is locally changed into a conductor from the insulator, so that the abnormal high voltage sensed by the point of the attached copper wire releases high-voltage energy to the conductive ground layer through the voltage mutagenesis resistance film layer, and an electronic component mounted on the attached copper wire is prevented from being impacted by the abnormal voltage.
Preferably, the conductive grounding layer comprises a high polymer resistance material layer connected with the functional material layer and a grid grounding layer connected with the surface of the common circuit board;
the high polymer resistance material layer is formed by thermosetting of a thermosetting material;
the grid grounding layer is a latticed copper metal wire formed by etching a copper foil layer attached to the surface of the high-molecular-resistance material layer.
Preferably, the copper wire layer is a copper metal foil layer with a thickness of 10 um-20 um for etching the copper wire attached to the surface of the circuit board.
Preferably, the functional material layer is a polymer composite nano voltage induced varistor soft film layer.
Preferably, the thickness of the polymer resistance material layer is 50um to 200um, and the volume resistivity is 0.5 Ω to 180 Ω/cm 3 The thermosetting material is formed by blending and melting a polymer with a moldable resistance value and conductive particles.
Preferably, the line width of the grid ground plane at the connection part with the ground line is more than 2mm, and the line widths of other parts are less than 1 mm.
Preferably, one surface of the energy total absorption functional layer, which is a conductive grounding layer, is tightly connected with the upper surface and the lower surface of the common circuit board through the PP prepreg under the hot pressing condition to form the whole circuit board.
The invention discloses a manufacturing method of a high-voltage pulse energy full-absorption circuit board, which adopts the technical scheme that the manufacturing method comprises the following steps:
printing a layer of functional material on the surface of the first copper foil and solidifying to form a functional foil;
printing a layer of polymer resistance material on the functional material surface of the functional foil, paving a second copper foil on the polymer resistance material and carrying out curing treatment on the second copper foil and the polymer resistance material, and etching a grid structure on the surface of the cured second copper foil to form the energy full-absorption functional plate;
taking down the common circuit board, drilling the remaining two energy full-absorption function boards at the coordinate position of the non-grounding connecting hole of the through hole required by the preset multilayer circuit board, and enabling the aperture of the drilled hole to be larger than one time of the diameter of the through hole of the planned finished product board;
sequentially placing a piece of energy full-absorption functional board, a piece of PP prepreg, a piece of common circuit board, a piece of PP prepreg and a piece of energy full-absorption functional board in a laminating manner, and positioning and fastening the energy full-absorption functional board into a circuit board to be cured through a positioning bolt;
curing the circuit board to be cured to form a high-voltage pulse energy full-absorption embryonic plate;
carrying out through hole on the high-voltage pulse energy full-absorption embryonic plate at a through hole coordinate position according to the planned through hole diameter, wherein the through hole coordinate position is the through hole coordinate position of the planned positive and negative lines in the finished plate and the lines needing to be communicated with each other in the middle layer;
carrying out hole washing, counter bore copper and copper plating treatment on the through hole processed by the high-voltage pulse energy full-absorption blank plate;
and etching the attached copper wires on two sides of the high-voltage pulse energy full-absorption embryonic plate according to design requirements to obtain the high-voltage pulse energy full-absorption circuit board.
Preferably, the printing and curing of the layer of functional material on the surface of the first copper foil includes:
taking a first copper foil with the size and thickness meeting design requirements, performing degreasing treatment on the surface of the first copper foil, and then placing the first copper foil on a flat plate of a vacuum adsorption machine;
printing a layer of functional material on the surface of the first copper foil;
and placing the copper foil printed with the functional material into a high-temperature box for curing.
Preferably, after the energy full-absorption function plate is processed, the method further includes:
taking two energy full-absorption function boards, enabling the conductive grounding layers of the two energy full-absorption function boards to be respectively superposed with two surfaces of a common circuit board, carrying out coordinate positioning marking on the two energy full-absorption function boards and the common circuit board, and determining the positions of a positioning hole and a positioning bolt.
The invention has the beneficial effects that:
1. the circuit board does not need to be provided with an energy absorption disc on the premise of realizing the full absorption of high-voltage pulse energy, does not need the accurate alignment of the energy absorption disc and an attached copper wire of a surface circuit and the copper-plated connection of a through hole, has low precision requirement on the process, low manufacturing difficulty and easy popularization. Meanwhile, because the energy absorption disc does not need to be arranged, the problem and the dilemma that the whole circuit board is scrapped due to the quality problems of virtual connection, short circuit, serial connection and the like of a certain hole possibly caused by copper plating connection because the through hole needs to be formed between the circuit and the energy absorption disc in the machining process can not occur, and the original technology is overturned.
2. All parts of each copper-attached wire of the circuit are arranged on the surface of the functional material, namely any point of a circuit board circuit brings the protection range of the functional material into the protection range, an infinite plurality of energy discharge channels are arranged between the circuit and the resistance material, the energy channels do not need to be designed and constructed independently, the manufacturing difficulty is greatly reduced, and the reliability is greatly improved. In addition, the energy distribution problem does not need to be considered in advance for the ultrahigh energy of a long line segment, and an infinite number of energy release points naturally differentiate the energy.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a schematic view of a first copper foil of the present invention;
FIG. 3 is a schematic view of a functional foil according to the present invention;
FIG. 4 is a schematic view of the polymer resistive material on the functional material side according to the present invention;
FIG. 5 is a schematic view of a second copper foil laid flat on a polymeric resistive material according to the present invention;
FIG. 6 is a schematic view of a grid structure etched on a second copper foil according to the present invention;
FIG. 7 is a schematic diagram of a conventional circuit board in the middle of a high voltage pulse energy total absorption circuit board according to the present invention;
FIG. 8 is a high voltage pulse energy fully absorbing embryonic plate M of the present invention 0 A schematic diagram of (a);
in fig. 1: the circuit board comprises a common circuit board 1, a 2-energy full-absorption functional layer, a 2.1-copper wire layer, a 2.2-functional material layer, a 2.3-high-molecular resistance material layer, a 2.4-grid grounding layer and a 3-PP prepreg.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing a relative importance or importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather mean "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise. "plural" means "two or more than two"
Example one
Fig. 1 shows a schematic structural diagram of a high-voltage pulse energy total absorption circuit board provided in a preferred embodiment of the present application (fig. 1 shows a first embodiment of the present application), and for convenience of description, only the parts related to the present embodiment are shown, which are detailed as follows:
the circuit board comprises a common circuit board 1, wherein the two sides of the common circuit board 1 are adhered with energy full-absorption functional layers 2, one of the two energy full-absorption functional layers 2 is marked as N1, and the other energy full-absorption functional layer is marked as N2. The surface layers of the energy total absorption function layers N1 and N2 are copper-attached foil layers, the copper-attached foil layers are used for etching an electronic circuit to form copper-attached wire layers A, when the voltage difference between the voltage of all copper-attached wires in the copper-attached wire layers A and the high-molecular resistance material layer C is less than 300V, the function material layer B is an insulator, when abnormal voltage higher than 300V occurs at any point of any copper-attached wire on the copper-attached wire layers A, the point of the function material layer B corresponding to the point of the copper-attached wire is locally changed into a conductor from the insulator, so that the abnormal high voltage sensed at the point of the copper-attached wire releases high-voltage energy to the conductive ground layer through the function material layer, and an electronic component mounted on the copper-attached wire is prevented from being impacted by the abnormal voltage.
The energy full-absorption functional layers N1 and N2 have the same structure, and are composed of a functional foil layer formed by combining a copper wire layer 2.1 and a functional material layer 2.2, and a conductive grounding layer formed by a high polymer resistance material layer 2.3 and a grid grounding layer 2.4.
In one embodiment, the common wiring board 1 is a common multilayer circuit (double-sided board or single-sided board without the common layer) constituting an intermediate layer of a multilayer circuit board. The energy full-absorption functional layers N1 and N2 are respectively connected with the upper surface and the lower surface of a common circuit layer in a tight surface mode through a PP prepreg on one surface of a conductive grounding layer under a hot pressing condition to form a circuit board whole.
In one embodiment, the surface copper-attached layer a is a copper metal foil with a thickness of 10um to 20um used for etching a copper-attached line on the surface of a circuit board, the functional material layer B is a 'high molecular composite nano voltage induced resistance soft film' in a Chinese patent invention (patent number: ZL201210314982.2) or a functional thermosetting material with a thickness of 15um to 200um obtained by a second manufacturing method in the patent, and the functional material layer B is directly attached to the surface of the surface copper-attached layer a. Besides the two materials provided in this embodiment, the functional material layer B may be formed by curing materials that can achieve the same function.
In one embodiment, the polymer resistance material C is attached to the surface of the functional material layer B, the grid ground line D is attached to the surface of the polymer resistance material C, and the polymer resistance material C and the grid ground line D together form a conductive ground layer. The high polymer resistance material C is a thermosetting material with resistance value of 50-200 um, thickness of which is a mixture of a plastic polymer and conductive particles, and volume resistivity of which is 0.5-180 omega/cm 3 。
In one embodiment, the grid grounding wire D is a grid-shaped copper metal wire formed by etching a copper foil layer attached to the surface of the polymer resistance material C, the line width of the grid grounding wire D at the connection part with the grounding wire is greater than 2mm, the line widths of other parts are less than 1mm, and the length and width of each grid are (20 mm-20 mm) × (20 mm-40 mm). And etching the surface copper-attached layer A according to a pre-designed line to form the surface copper-attached line of the high-voltage pulse energy full-absorption circuit board.
Example two
The embodiment provides a preparation method for preparing the circuit board, which comprises the following steps:
And 2, placing the functional foil on the surface of a flat plate of a vacuum adsorption machine, printing a high-molecular resistance material on the surface of the functional material, printing the high-molecular resistance material with the thickness of 50-200 um, then spreading a copper foil with the thickness of 10-15 um on the surface of the high-molecular resistance material, uniformly compacting the high-molecular resistance material on a roller, then placing the high-molecular resistance material in an oven, adjusting the temperature to 40 ℃, curing for 20min at 60 ℃, curing for 20min at 160 ℃, then naturally cooling and taking out the high-molecular resistance material, and etching grids on the copper foil attached to the surface of the resistance material according to the size of 30mm multiplied by 30mm and the line width of 1mm to obtain the energy full-absorption functional plate 2.
And 3, taking one energy full-absorption functional board as N2, enabling the conductive grounding layer to be overlapped with the other surface of one common circuit layer in an upward mode, taking the other energy full-absorption functional board as N1, enabling the conductive grounding layer to be overlapped with the other surface of the common circuit board 1 in a downward mode, carrying out coordinate positioning marking on N1, the common circuit board 1 and the N2, and determining the positions of the positioning holes and the positioning bolts.
And 4, after the three plates are positioned, detaching the bolts, taking down the common circuit board 1 and the N1, then reinstalling the N1, and drilling holes in the coordinate positions of the non-grounding connecting holes of the pre-designed and planned multilayer circuit board needing the through holes, wherein the hole diameter is larger than one time of the diameter of the through holes of the planned finished plate.
And 5, loosening the positioning bolt, taking down the N1, placing a PP prepreg with the same size and thickness as the N1 and the same thickness as the N1 on the conductive grounding surface of the N2, resetting the common circuit board 1, placing the PP prepreg with the same size and thickness as the common circuit board 1 and the same thickness as the common circuit board 1 on the common circuit board 1, finally installing the N1, and fastening the positioning bolt.
And 6, placing the N1 and the common circuit board 1 and the N2 which are placed with the PP prepreg and positioned on a plane heat pressing machine, adjusting the temperature to 300 ℃ and the pressure to 30KG, pressing for 30h, and naturally cooling to form a whole of N1 and the common circuit board 1 and the N2. The through holes of N1 and N2 are filled with PP resin glue, and part of PP resin glue overflows from the through holes, so that the high-voltage pulse energy full-absorption embryonic plate is obtained.
And 7, cleaning the overflowing PP resin, and polishing the high-voltage pulse energy full-absorption blank plate by a flat plate polishing machine to enable two surfaces of the high-voltage pulse energy full-absorption blank plate to be flat and consistent.
And 8, passing the high-voltage pulse energy full-absorption embryonic plate through the holes according to the planned through hole diameter in the through hole coordinate positions of the lines which are planned in the front layer, the back layer and the middle layer and need to be communicated with each other.
And 9, washing holes, sinking hole copper and plating copper on the high-voltage pulse energy full-absorption embryonic plate.
And step 10, attaching blue films to two sides of the high-voltage pulse energy total absorption embryonic plate.
And 11, exposing and washing the blue film to expose the copper wire attached pattern.
And step 12, etching the attached copper wire and performing necessary post-processing to obtain the high-voltage pulse energy full-absorption circuit board.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (10)
1. The utility model provides a high-voltage pulse energy absorbs circuit board entirely, includes ordinary circuit board (1), its characterized in that: the upper surface and the lower surface of the common circuit board (1) are both attached with an energy full-absorption functional layer (2), the energy full-absorption functional layer (2) comprises a copper-attached wire layer (2.1), a functional material layer (2.2) and a conductive grounding layer which are sequentially arranged, and the conductive grounding layer is tightly connected with the surface of the common circuit board (1);
the functional material layer (2.2) has an insulator state when a voltage at any point of any one of the copper-attached wires on the copper-attached wire layer (2.1) is not higher than a threshold value, and
at the moment when the voltage of a certain point on the copper-attached wire layer (2.1) exceeds a threshold value, the high voltage on the copper-attached wire layer (2.1) is used for releasing the high-voltage energy to the conductive ground layer through the functional material layer (2.2);
wherein, after the high-voltage energy is released, the functional material layer (2.2) is immediately restored to an insulator state.
2. The high voltage pulse energy total absorption circuit board of claim 1, wherein: the conductive grounding layer comprises a high-molecular resistance material layer (2.3) connected with the functional material layer (2.2) and a grid grounding layer (2.4) connected with the surface of the common circuit board (1);
the high-molecular resistance material layer (2.3) is formed by thermosetting a thermosetting material;
the grid grounding layer (2.4) is a latticed copper metal wire formed by etching a copper foil layer attached to the surface of the high polymer resistance material layer.
3. The high voltage pulse energy total absorption circuit board of claim 1, wherein: the copper wire attaching layer (2.1) is a copper metal foil layer with the thickness of 10 um-20 um and used for etching a copper wire attached to the surface of the circuit board.
4. The high voltage pulse energy total absorption circuit board of claim 1, wherein: the functional material layer (2.2) is a polymer composite nanometer voltage induced resistance soft film layer.
5. The high-voltage pulse energy total absorption circuit board according to claim 2, characterized in that: the thickness of the high polymer resistance material layer (2.3) is 50-200 um, and the volume resistivity is 0.5-180 omega/cm 3 The thermosetting material is formed by blending and melting a polymer with a moldable resistance value and conductive particles.
6. The high voltage pulse energy total absorption circuit board of claim 2, wherein: the line width of the grid ground wire layer (2.4) at the connection part with the ground wire is more than 2mm, and the line widths of other parts are less than 1 mm.
7. The high voltage pulse energy total absorption circuit board of claim 2, wherein: the energy full-absorption functional layer (2) is tightly connected with the upper surface and the lower surface of the common circuit board (1) through a PP prepreg on one surface of the conductive grounding layer under the hot-pressing condition to form a circuit board whole.
8. A manufacturing method of a high-voltage pulse energy full-absorption circuit board is characterized by comprising the following steps:
printing a layer of functional material on the surface of the first copper foil and solidifying to form a functional foil;
printing a layer of polymer resistance material on the functional material surface of the functional foil, paving a second copper foil on the polymer resistance material and carrying out curing treatment on the second copper foil and the polymer resistance material, and etching a grid structure on the surface of the cured second copper foil to form the energy full-absorption functional plate;
taking down the common circuit board (1), drilling the two remaining energy full-absorption function boards at the coordinate position of the non-grounding connecting hole of the through hole required by the preset multilayer circuit board, and enabling the aperture of the drilled hole to be one time larger than the diameter of the through hole of the planned finished product board;
sequentially placing a piece of energy full-absorption functional board, a piece of PP prepreg, a piece of common circuit board (1), a piece of PP prepreg and a piece of energy full-absorption functional board in a laminating manner, and positioning and fastening the energy full-absorption functional board into a circuit board to be cured through a positioning bolt;
curing the circuit board to be cured to form a high-voltage pulse energy full-absorption embryonic plate;
carrying out through hole on the high-voltage pulse energy full-absorption embryonic plate at a through hole coordinate position according to the planned through hole diameter, wherein the through hole coordinate position is the through hole coordinate position of the planned positive and negative lines in the finished plate and the lines needing to be communicated with each other in the middle layer;
carrying out hole washing, counter bore copper and copper plating treatment on the through hole processed by the high-voltage pulse energy full-absorption blank plate;
and etching the attached copper wires on the two sides of the high-voltage pulse energy total absorption embryonic plate according to design requirements to obtain the high-voltage pulse energy total absorption circuit board.
9. The method of claim 8, wherein the printing a layer of functional material on the surface of the first copper foil and curing the functional material comprises:
taking a first copper foil with the size and thickness meeting the design requirements, performing degreasing treatment on the surface of the first copper foil, and placing the first copper foil on a flat plate of a vacuum adsorption machine;
printing a layer of functional material on the surface of the first copper foil;
and placing the copper foil printed with the functional material into a high-temperature box for curing.
10. The method for manufacturing a high voltage pulse energy total absorption circuit board according to claim 8, wherein after the energy total absorption function board is processed, the method further comprises:
taking two energy full-absorption function boards, enabling the conductive grounding layers of the two energy full-absorption function boards to be respectively superposed with two surfaces of the common circuit board (1), carrying out coordinate positioning marking on the two energy full-absorption function boards and the common circuit board (1), and determining the positions of the positioning holes and the positioning bolts.
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| CN2022104925665 | 2022-05-07 | ||
| CN202210492566 | 2022-05-07 |
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| US20140160699A1 (en) * | 2012-12-11 | 2014-06-12 | Qualcomm Incorporated | Methods and apparatus for conformal shielding |
| WO2015169234A1 (en) * | 2014-05-09 | 2015-11-12 | 武汉芯宝科技有限公司 | Circuit board cross-band veneer with function of absorbing instantaneous high-voltage electric pulse energy and manufacturing method therefor |
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