CN114975701A - Packaging method of LED chip - Google Patents
Packaging method of LED chip Download PDFInfo
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- CN114975701A CN114975701A CN202210919125.9A CN202210919125A CN114975701A CN 114975701 A CN114975701 A CN 114975701A CN 202210919125 A CN202210919125 A CN 202210919125A CN 114975701 A CN114975701 A CN 114975701A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention provides a packaging method of an LED chip, which comprises the following steps: bonding the LED chip electrode with the strippable substrate; forming a transparent packaging layer on the strippable substrate, and stripping and removing the strippable substrate; an insulating layer is formed above the LED chip; carrying out plasma etching on the insulating layer to expose part of the LED chip electrode; evaporating and plating a rewiring layer above the insulating layer and communicating the rewiring layer with the LED chip electrode; the invention solves the technical problem that the requirement on die bonding precision is higher and higher when the electrodes are smaller and smaller in the prior art and the die bonding packaging is carried out, so that the die bonding packaging cannot be carried out.
Description
Technical Field
The invention belongs to the technical field of semiconductor LEDs, and particularly relates to a packaging method of an LED chip.
Background
The electronic display screen directly sees through RGB three-colour LED and comes the colour mixture, and on the color display degree, traditional liquid crystal LED panel display effect is better relatively, encapsulates the LED chip of RGB three-colour and carries out the colour mixture, and the chip of three different colours uses as a pixel, in order to let the resolution ratio of display screen more and more high can only take to reduce the pixel interval and reduce the chip size as far as possible and reach the purpose.
RGB three-colour mixture not only can be used for electronic display screen as a pixel, can also be used for the application of indoor display screen, so three-colour LEN colour mixture more has competitiveness, LED electronic display screen device's packaging mode dot matrix module, cut straightly, sub-table pastes, table pastes trinity, COB, Micro LED etc.. The evolution from low resolution towards wide gamut, high resolution has progressed from early use primarily outdoors to the rise of small distances now available indoors. The progress of the LED electronic display screen is promoted by different packaging modes, and meanwhile, the process of continuously improving the packaging technology is also provided.
Carry out solid brilliant encapsulation and PCB board solder joint to the chip electrode and be connected, can form the normal lighting or separately lighting to LED chip RGB three-colour, along with chip size is littleer and littleer, when chip size reached below 50 microns, the encapsulation degree of difficulty of the encapsulation factory of chip low reaches becomes the geometric increase, and chip size reduces and leads to the chip electrode to reduce, and the electrode is littleer when encapsulating solid brilliant, also is more and more high to the requirement of solid brilliant precision, can lead to the problem of solid brilliant encapsulation.
Disclosure of Invention
In order to solve the technical problems, the invention provides a packaging method of an LED chip, which is used for solving the technical problem that die bonding packaging cannot be performed due to the fact that the smaller the electrode is, the higher the die bonding precision is when die bonding packaging is performed in the prior art.
The invention provides the following technical scheme, and the LED chip packaging method is characterized by comprising the following steps:
the method comprises the following steps of firstly, providing a strippable substrate and a plurality of groups of LED chips, and distributing the plurality of groups of LED chips according to a rectangular array through a sorting machine so as to enable electrodes of the LED chips to be bonded towards one side of the strippable substrate, wherein each group of LED chips comprises a green light G LED chip, a blue light B LED chip and a red light R LED chip;
forming a transparent packaging layer covering the periphery and the top surface of the LED chip on the strippable substrate, and stripping off the strippable substrate;
turning over the transparent packaging layer to enable the LED chip electrode to face upwards and form an insulating layer above the LED chip;
performing photoetching on the insulating layer to form a first mask pattern, performing plasma etching on the insulating layer to expose part of the LED chip electrode, and performing photoresist removing treatment on the insulating layer after etching;
fifthly, photoetching a rewiring layer above the insulating layer to form a second mask pattern, evaporating and forming the rewiring layer above the insulating layer according to the second mask pattern, communicating the rewiring layer with the exposed part of the LED chip electrode, and then removing the photoresist;
step six, forming a protective layer on the rewiring layer, performing photoetching on the protective layer to form a third mask pattern, performing plasma etching on the protective layer to expose part of the rewiring layer metal, and then performing photoresist removing treatment;
step seven, photoetching is carried out on the protective layer, an interconnection pad is formed on the protective layer through evaporation, the interconnection pad is communicated with the exposed part of the rewiring layer through metal, and then photoresist removing treatment is carried out;
and step eight, cutting the LED chips of each group as a whole, wherein the rewiring layer and the interconnection bonding pad corresponding to each LED chip are arranged on each LED chip of each group.
Compared with the prior art, the beneficial effects of the application are that: the method comprises the steps of carrying out plasma etching on an insulating layer to expose a part of an LED chip electrode, carrying out plasma etching on a protective layer to expose a part of rewiring layer metal, simultaneously communicating the rewiring layer with the exposed LED chip electrode, communicating an interconnection pad with the exposed rewiring layer metal, expanding the LED chip electrode outwards through the rewiring layer and the interconnection pad without being limited to the size of the LED chip, theoretically expanding the LED chip electrode outwards to an infinite size through the rewiring layer without considering the productivity and the actual benefit, then only opening a hole on the protective layer on the rewiring layer outside the actual size of the LED chip to enable the interconnection pad to be connected with the rewiring layer for normal conduction and lightening the chip, amplifying the LED chip electrode through the rewiring layer and the interconnection pad, and reducing the precision requirement and difficulty of solid crystal packaging, so as to ensure the smooth proceeding of the die bonding and packaging process.
Preferably, the strippable base is one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate and a ceramic substrate.
Preferably, the material of the transparent encapsulation layer is one of silica gel, epoxy resin and polyimide.
Preferably, the transparent encapsulation layer is formed on the peelable substrate by one of compression molding, transfer molding, liquid seal molding, vacuum lamination, and spin coating.
Preferably, the insulating layer is formed above the LED chip by PECVD chemical vapor deposition or vacuum evaporation;
the PECVD chemical vapor deposition specifically comprises the following steps: by chemical vapour deposition of N at a temperature of 230 DEG C 2 O and SiH 4 In N 2 By controlling the flow rate to produce SiO 2 Depositing a layer over the LED chip to form an insulating layer;
the vacuum evaporation specifically comprises the following steps: the temperature is 300-400 ℃, and the vacuum degree of the cavity reaches 1 x 10 -7 Under Pa, SiO 2 The target material is sputtered above the LED chip to form an insulating layer.
Preferably, the insulating layer and the protective layer are made of SiN or SiO 2 、Al 2 O 3 Wherein the thickness of the insulating layer is less than that of the protective layer, the thickness of the insulating layer is 2000A-8000A, and the thickness of the protective layer is 8001A -16000A。
Preferably, the redistribution layer and the interconnection pad are made of metal materials.
Preferably, in the fifth step, the condition for performing photolithography above the insulating layer is: negative photoresist 3.8 μm thick, exposure 270mj, development time 90S, and baking at 113 ℃ for 90S.
Preferably, the rewiring layer comprises a first connecting unit, a second connecting unit, a third connecting unit and a fourth connecting unit, the first connecting unit is connected with the positive electrodes or the negative electrodes of the green G LED chip, the blue B LED chip and the red R LED chip, and the second connecting unit, the third connecting unit and the fourth connecting unit are respectively connected with the negative electrodes or the positive electrodes of the green G LED chip, the blue B LED chip and the red R LED chip.
Preferably, the interconnection pad comprises a first welding spot, a second welding spot, a third welding spot and a fourth welding spot, and the first welding spot, the second welding spot, the third welding spot and the fourth welding spot are communicated with the first connecting unit, the second connecting unit, the third connecting unit and the fourth connecting unit in a one-to-one correspondence manner.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic diagram of a semi-finished product produced in step one of a packaging method of an LED chip according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a semi-finished product produced in step two of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 3 is a schematic diagram of a semi-finished product produced in step three of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 4 is a schematic diagram of a semi-finished product generated in step four of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 5 is a schematic diagram of a semi-finished product produced in step five of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 6 is a schematic diagram of a semi-finished product produced in step six of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 7 is a schematic diagram of a semi-finished product produced in step seven of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 8 is a schematic diagram of a finished product obtained in step eight of the method for packaging an LED chip according to the embodiment of the present invention;
fig. 9 is a schematic structural diagram of a cut LED chip according to an embodiment of the present invention.
Description of reference numerals:
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1 | |
2 |
| Green |
21 | Blue light |
22 |
| Red light |
23 | |
3 |
| |
4 | |
5 |
| Rewiring |
6 | First connection unit | 61 |
| Second connecting unit | 62 | Third connecting |
63 |
| Fourth connecting |
64 | |
7 |
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8 | |
81 |
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82 | |
83 |
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84 |
The invention will be described in detail below with reference to the drawings and the accompanying description.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and intended to explain the embodiments of the present invention and should not be construed as limiting the invention.
In the description of the embodiments of the present invention, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the embodiments of the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," "fixed," and the like are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. Specific meanings of the above terms in the embodiments of the present invention can be understood by those of ordinary skill in the art according to specific situations.
In one embodiment of the present invention, a method for packaging an LED chip includes the steps of:
step one, as shown in fig. 1, providing a peelable substrate 1 and a plurality of groups of LED chips 2, and distributing the plurality of groups of LED chips 2 in a rectangular array by a sorting machine to bond the LED chip electrodes 3 toward one side of the peelable substrate 1, wherein each group of LED chips 2 includes a green G LED chip 21, a blue B LED chip 22, and a red R LED chip 23;
specifically, in the step one, one green light G LED chip 21, one blue light B LED chip 22 and one red light R LED chip 23 in each group of LED chips 2 are placed side by side, and one green light G LED chip 21, one blue light B LED chip 22 and one red light R LED23 chip form one group of LED chips 2, in a specific packaging process, in order to ensure that a plurality of LED chips can be processed at one time, a plurality of groups of LED chips 2 are placed on one peelable substrate 1 with a large area;
it is worth mentioning that during the bonding process of the LED chip electrodes 3 on the side facing the peelable substrate 1, the bonding manner is simple pre-bonding, in order to ensure that the LED chips 2 of each group are not easily subjected to position change on the peelable substrate 1;
in the present embodiment, the peelable base 1 is one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
Step two, as shown in fig. 2, forming a transparent packaging layer 4 covering the periphery and the top surface of the LED chip 2 on the peelable substrate 1, and peeling off and removing the peelable substrate 1;
specifically, in the second step, the front side, the rear side, the left side, the right side and the top surface of the LED chip 2 can be wrapped by the transparent packaging layer 4, the bottom surface of the LED chip 2 is the position of the LED chip electrode 3, and in the second step, the peelable substrate 1 covers the LED chip electrode 3;
it should be noted that, in this embodiment, the material of the transparent encapsulating layer 4 is one of silicon gel, epoxy resin and polyimide, and the transparent encapsulating layer 4 is formed on the peelable substrate 1 by one of compression molding, transfer molding, liquid seal molding, vacuum lamination and spin coating.
Turning over the transparent packaging layer 4 to enable the LED chip electrode 3 to face upwards and form an insulating layer 5 above the LED chip 2 as shown in FIG. 3;
the turning angle of the transparent packaging layer 4 is 180 degrees, in order to change the LED chip electrode 3 from the original downward arrangement to the upward arrangement, the insulating layer 5 is used for separating the rewiring layer 6 and the LED chip electrode 3, and the condition of open circuit between the rewiring layer 6 and the LED chip electrode 3 is avoided;
it should be noted that, in the present embodiment, the insulating layer 5 is formed above the LED chip 2 by PECVD cvd or vacuum evaporation;
the PECVD chemical vapor deposition specifically comprises the following steps: by chemical vapor deposition of N at a temperature of 230 DEG C 2 O and SiH 4 In N 2 By controlling the flow rate to produce SiO 2 A layer is deposited over the LED chip 2 to form an insulating layer 5;
the vacuum evaporation specifically comprises the following steps: the temperature is 300-400 ℃, and the vacuum degree of the cavity reaches 1 x 10 -7 Under Pa, SiO 2 A target material is sputtered over the LED chip 2 to form an insulating layer 5.
Step four, as shown in fig. 4, performing photolithography on the insulating layer 5 to form a first mask pattern, performing plasma etching on the insulating layer 5 to expose a part of the LED chip electrode 3, and performing photoresist removal processing on the insulating layer 5 after etching;
wherein, in the photoetching process above the insulating layer 5, a layer of photoresist is coated above the insulating layer 5, the thickness of the photoresist is 4 μm, the photoresist is exposed, the exposure amount is 300mj, the photoresist is developed after exposure, the developing time is 89S, and the photoresist is dried for 120S at the temperature of 120 ℃ after the development, so as to form a first mask pattern above the insulating layer 5;
it should be noted that the first mask pattern includes, but is not limited to, a circle, a square, an ellipse, and any irregular figure, and is only for partially exposing the LED chip electrodes 3, and meanwhile, the first mask pattern is required to ensure that there is a corresponding mask pattern above the insulating layer 5 corresponding to each group of LED chips 2, so that each group of LED chips 2 forms an independent whole, so as to facilitate the subsequent cutting process;
and simultaneously, after the first mask pattern is formed, carrying out plasma etching on the insulating layer 5 according to the first mask pattern, wherein the etching time is 135S, after the etching is finished, forming a hole corresponding to the first mask pattern on the insulating layer 5 according to the first mask pattern, so that the LED chip electrode 3 is partially exposed, and after the etching is finished, removing the residual photoresist.
Step five, as shown in fig. 5, performing photolithography of a rewiring layer 6 on the insulating layer 5 to form a second mask pattern, performing evaporation to form the rewiring layer 6 on the insulating layer 5 according to the second mask pattern, communicating the rewiring layer 6 with the exposed part of the LED chip electrode 3, and performing photoresist removal;
wherein, the evaporation is generally a metal evaporation method, the redistribution layer 6 made of metal is evaporated on the insulating layer, and the shape of the redistribution layer 6 corresponds to the second mask pattern similarly to the fourth step; in the photoetching of the rewiring layer 6, a layer of photoresist is coated on the insulating layer 5, the thickness of the photoresist is 3.8 mu m, the photoresist is exposed, the exposure amount is 270mj, the photoresist is developed after exposure, the developing time is 90S, and the photoresist is dried for 90S at the temperature of 113 ℃ after the development, so that a second mask pattern is formed on the insulating layer 5;
then, evaporating and plating the rewiring layer 6 on the insulating layer 5 according to the second mask pattern, and after evaporation, stripping the residual photoresist to complete the forming of the rewiring layer 6;
in this embodiment, the redistribution layer 6 includes a first connection unit 61, a second connection unit 62, a third connection unit 63, and a fourth connection unit 64, where the first connection unit 61 is connected to the anodes of the green G LED chip 21, the blue B LED chip 22, and the red R LED23, and the second connection unit 62, the third connection unit 63, and the fourth connection unit 64 are respectively connected to the cathodes of the green G LED chip 21, the blue B LED chip 22, and the red R LED chip 23;
or the first connecting unit 61 is connected to the cathodes of the green G LED chip 21, the blue B LED chip 22 and the red R LED chip 23, and the second connecting unit 62, the third connecting unit 63 and the fourth connecting unit 64 are respectively connected to the anodes of the green G LED chip 21, the blue B LED chip 22 and the red R LED chip 23;
meanwhile, the rewiring layer 6 is further provided with channels for connecting the first connecting unit 61, the second connecting unit 62, the third connecting unit 63 and the fourth connecting unit 64 with the anode and the cathode of the green light G LED chip 21, the blue light B LED chip 22 and the red light R LED chip 23, so as to ensure that the rewiring layer 6 can be communicated with the LED chip electrodes 3.
Sixthly, as shown in fig. 6, forming a protective layer 7 on the rewiring layer 6, performing photolithography on the protective layer 7 to form a third mask pattern, performing plasma etching on the protective layer 7 to expose a part of the rewiring layer 6 metal, and performing photoresist removal;
wherein, in the photoetching of a protective layer 7, a layer of photoresist is required to be coated above the rewiring layer 6, the thickness of the photoresist is 10 mu m, the photoresist is exposed, the exposure is 800mj, the photoresist is developed after exposure, the developing time is 200S, and the photoresist is dried for 120S at the temperature of 120 ℃ after the developing so as to form a third mask pattern above the protective layer 7;
performing plasma etching on the protective layer 7 according to the third mask pattern, wherein the etching time is 370S, and then stripping the residual photoresist;
in this embodiment, the third mask pattern includes, but is not limited to, a circle, a square, an ellipse, and any irregular figure, and is only for exposing the metal portion of the redistribution layer 6, and the third mask pattern needs to ensure that there is a corresponding mask pattern above the protective layer 7 corresponding to each group of the LED chips 2, so that each group of the LED chips 2 forms an independent whole, so as to facilitate the subsequent cutting process;
in this embodiment, the insulating layer 5 and the protective layer 7 are made of SiN or SiO 2 、Al 2 O 3 The thickness of the insulating layer 5 is smaller than that of the protective layer 7, the thickness of the insulating layer 5 is 2000A-8000A, and the thickness of the protective layer 7 is 8001A-16000A.
Seventhly, as shown in fig. 7, performing photoetching on the protective layer 7, performing evaporation on the protective layer 7 to form an interconnection pad 8, enabling the interconnection pad 8 to be in metal communication with the exposed part of the rewiring layer 6, and then performing photoresist removal treatment;
the photoetching of the interconnection bonding pad 8 is similar to the photoetching of the rewiring layer 6, the interconnection bonding pad 8 is evaporated on the protective layer 7 in a metal evaporation mode, and then the rest photoresist is stripped to complete the forming of the interconnection bonding pad 8;
in the present embodiment, the redistribution layer 6 and the interconnection pad 8 are made of metal materials, including but not limited to Cr, Al, Ti, Pt, Ni, Au, Cu, Ag.
In this embodiment, the interconnection pad 8 includes a first pad 81, a second pad 82, a third pad 83, and a fourth pad 84, where the first pad 81, the second pad 82, the third pad 83, and the fourth pad 84 are in one-to-one correspondence with the first connecting unit 61, the second connecting unit 62, the third connecting unit 63, and the fourth connecting unit 64;
specifically, the first solder joint 81 is connected to the first connecting unit 61 and the anodes or cathodes of the green G LED chip 21, the blue B LED chip 22, and the red R LED23 chip, the second solder joint 82 is connected to the second connecting unit 62 and the cathodes or anodes of the green G LED chip 21, the third solder joint 83 is connected to the third connecting unit 63 and the cathodes or anodes of the blue B LED chip 22, the fourth solder joint 84 is connected to the fourth connecting unit 64 and the cathodes or anodes of the red R LED23 chip,
it can be understood that the LED chip electrodes 3 can be extended outwards through the rewiring layer 6 and the interconnection pads 8, without being limited to the size of the LED chip 2, and without considering productivity and practical benefits, the LED chip electrodes 3 can be extended outwards to infinity through the rewiring layer 6 theoretically, and then the interconnection pads 8 can be connected with the rewiring layer 6 just by opening holes in the protective layer 7 on the rewiring layer 6 outside the practical size of the LED chip 2, so that the chips can be normally powered on and lighted, and the LED chip electrodes 3 are amplified by phase change of the rewiring layer 6 and the interconnection pads 8, so that the precision requirement and difficulty of die attach packaging are reduced, and the die attach packaging process can be smoothly performed.
Step eight, as shown in fig. 8 and fig. 9, cutting each group of LED chips 2 as a whole, wherein each group of LED chips 2 has the redistribution layer 6 and the interconnection pad 8 corresponding thereto;
cutting each group of LED chips 2 as a whole, namely in the first step, a plurality of groups of LED chips 2 are arranged on the strippable substrate 1, namely, how many LED chips can be cut in the eighth step, and meanwhile, the LED chips 2 can be respectively lightened or simultaneously lightened through the interconnection bonding pads 8 and can be directly welded as a pixel point to be used as the pixel point of the display screen;
understandably, interconnection pad 8 in this application has four solder joints, and LED chip 2 among the prior art needs six solder joints usually, connects respectively green glow G LED chip 21, blue light B LED chip 22, ruddiness R LED23 chip anodal, negative pole, and this application reduces six solder joints into four, can improve welded efficiency, and prior art need regard the chip welding cubic of three kinds of single primary colors as a pixel simultaneously, and the welding process is more difficult more to the partial parallel and leads to the fact the colour mixture effect not good, and this application can be very big reduce nonparallel problem, and weld as a pixel directly with RGB three primary colors chip as a whole, further improve welded efficiency.
To sum up, in the LED chip packaging method according to the above embodiments of the present invention, the insulating layer 5 is plasma etched to expose a portion of the LED chip electrode 3, the protective layer 7 is plasma etched to expose a portion of the redistribution layer 6, the redistribution layer 6 is connected to the exposed LED chip electrode 3, the interconnection pad 8 is connected to the exposed redistribution layer 6, the redistribution layer 6 and the interconnection pad 8 can expand the LED chip electrode 3 outward, without being limited to the size of the LED chip 2, theoretically, the LED chip electrode 3 can be expanded outward to infinity through the redistribution layer 6 without considering the productivity and the practical benefits, and then the interconnection pad 8 can be connected to the redistribution layer 6 by opening the protective layer 7 on the redistribution layer 6 outside the practical size of the LED chip 2 to conduct and light the chip, the LED chip electrode 3 is amplified through phase change of the rewiring layer 6 and the interconnection pad 8, so that the precision requirement and difficulty of die attach packaging are reduced, and the die attach packaging process can be smoothly carried out; simultaneously this application reduces six solder joints into four simultaneously, can improve welded efficiency, and prior art need regard the chip welding cubic of three kinds of single primary colors as a pixel simultaneously, and the welding process is more difficult more to lead to the fact the colour mixture effect not good partially parallel, and this application can be very big reduce nonparallel problem, and directly weld as a pixel with RGB three primary colors chip as a whole, further improves welded efficiency.
The above description is intended to be illustrative of the preferred embodiment of the present invention and should not be taken as limiting the invention, but rather, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.
Claims (10)
1. A packaging method of an LED chip is characterized by comprising the following steps:
the method comprises the following steps that firstly, a strippable substrate and a plurality of groups of LED chips are provided, the LED chips are distributed according to a rectangular array through a sorting machine, so that the electrodes of the LED chips are bonded towards one side of the strippable substrate, wherein each group of LED chips comprises a green light G LED chip, a blue light B LED chip and a red light R LED chip;
forming a transparent packaging layer covering the periphery and the top surface of the LED chip on the strippable substrate, and stripping off the strippable substrate;
turning over the transparent packaging layer to enable the LED chip electrode to face upwards and form an insulating layer above the LED chip;
performing photoetching on the insulating layer to form a first mask pattern, performing plasma etching on the insulating layer to expose part of the LED chip electrode, and performing photoresist removal treatment on the insulating layer after etching;
fifthly, photoetching a rewiring layer above the insulating layer to form a second mask pattern, evaporating and forming the rewiring layer above the insulating layer according to the second mask pattern, communicating the rewiring layer with the exposed part of the LED chip electrode, and then removing the photoresist;
step six, forming a protective layer on the rewiring layer, performing photoetching on the protective layer to form a third mask pattern, performing plasma etching on the protective layer to expose part of the rewiring layer metal, and then performing photoresist removing treatment;
step seven, photoetching is carried out on the protective layer, an interconnection bonding pad is formed on the protective layer through evaporation, the interconnection bonding pad is communicated with the exposed part of the rewiring layer metal, and then photoresist removing treatment is carried out;
and step eight, cutting the LED chips of each group as a whole, wherein the rewiring layer and the interconnection bonding pad corresponding to each LED chip are arranged on each LED chip of each group.
2. The method for packaging an LED chip according to claim 1, wherein the peelable base is one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
3. The method for packaging an LED chip according to claim 1, wherein the material of the transparent packaging layer is one of silicone, epoxy resin and polyimide.
4. The method of claim 1, wherein the transparent encapsulation layer is formed on the releasable substrate by one of compression molding, transfer molding, liquid seal molding, vacuum lamination, and spin coating.
5. The method for packaging an LED chip according to claim 1, wherein the insulating layer is formed over the LED chip by PECVD chemical vapor deposition or vacuum evaporation;
the PECVD chemical vapor deposition specifically comprises the following steps: by chemical vapor deposition of N at a temperature of 230 DEG C 2 O and SiH 4 In N 2 By controlling the flow rate to produce SiO 2 A layer is deposited over the LED chip to form an insulating layer;
the vacuum evaporation specifically comprises the following steps: the temperature is 300-400 ℃, and the vacuum degree of the cavity reaches 1 x 10 -7 Under Pa, SiO 2 The target material is sputtered above the LED chip to form an insulating layer.
6. The method for packaging an LED chip according to claim 1, wherein the insulating layer and the protective layer are made of SiN or SiO 2 、Al 2 O 3 Wherein the thickness of the insulating layer is less than that of the protective layer, the thickness of the insulating layer is 2000A-8000A, and the thickness of the protective layer is 8001A-16000A.
7. The method of claim 1, wherein the redistribution layer and the interconnect pads are made of a metal material.
8. The method for packaging an LED chip according to claim 1, wherein in the fifth step, the photolithography is performed on the insulating layer under the following conditions: negative photoresist with thickness of 3.8 μm, exposure of 270mj, development time of 90S, and drying at 113 deg.C for 90S.
9. The method for packaging the LED chip according to claim 1, wherein the redistribution layer comprises a first connection unit, a second connection unit, a third connection unit and a fourth connection unit, the first connection unit is connected with the anode or cathode of the green G LED chip, the blue B LED chip and the red R LED chip, and the second connection unit, the third connection unit and the fourth connection unit are respectively connected with the cathode or anode of the green G LED chip, the blue B LED chip and the red R LED chip.
10. The method for packaging an LED chip according to claim 9, wherein the interconnection pads comprise a first solder joint, a second solder joint, a third solder joint and a fourth solder joint, and the first solder joint, the second solder joint, the third solder joint and the fourth solder joint are in one-to-one correspondence with the first connecting unit, the second connecting unit, the third connecting unit and the fourth connecting unit.
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