CN114968882A - Device for automatically switching read-write direction of storage medium - Google Patents
Device for automatically switching read-write direction of storage medium Download PDFInfo
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Abstract
An apparatus for automatically switching the read/write direction of a storage medium, comprising: a processing module; and the processing module is respectively electrically connected with: the storage medium module is electrically connected with the signal conversion module; the data transmission line detection module is used for detecting whether the data transmission line is inserted into the data interface or not and supplying power to the signal conversion module; the analog switch module is used for switching a communication object of the storage medium module according to the insertion state of the data transmission line; the device realizes the fast switching of the read-write objects of the storage medium module through the matching of the processing module, the storage medium module, the signal conversion module, the data transmission line detection module and the analog switch module, and is convenient for a user to use as required.
Description
Technical Field
The invention relates to the technical field of storage medium communication, in particular to a device for automatically switching the read-write direction of a storage medium.
Background
Generally, there are multiple packages on the same IC, and the more pins there are, the more expensive the price is. Research and development engineers can select corresponding packages according to the requirements of products so as to achieve high utilization rate of IC pins, but due to the fact that the multiplexing relationship of some pins and the functions to be achieved are various, the SDIO interface and the USB interface on the IC are not enough, and further data transmission and all functions cannot be considered, and therefore the IC needs to be re-selected, and time and energy are consumed.
Disclosure of Invention
In view of the above, it is desirable to provide a device for automatically switching the read/write direction of a storage medium.
In order to achieve the above object, the present invention provides an apparatus for automatically switching read/write directions of a storage medium, comprising:
a processing module; and the processing module is respectively and electrically connected with:
the storage medium module is electrically connected with the signal conversion module;
the data transmission line detection module is used for detecting whether the data transmission line is inserted into the data interface or not and supplying power to the signal conversion module;
the analog switch module is used for switching a communication object of the storage medium module according to the insertion state of the data transmission line;
when the data transmission line is not inserted into the data interface, the storage medium module performs read-write operation with the processing module through the analog switch module;
when the data transmission line is accessed into the data interface, the storage medium module performs read-write operation with the external device through the analog switch module and the signal conversion module.
Preferably, the processing module includes a USB _ DET interface, a VSD _ CTRL interface, a R _ VSD _ CTRL interface, and an SPI _ CTRL interface, the USB _ DET interface and the R _ VSD _ CTRL interface are electrically connected to the data transmission line detection module, the VSD _ CTRL interface is electrically connected to the storage medium module, and the SPI _ CTRL interface is electrically connected to the analog switch module.
Preferably, the data transmission line detection module comprises, electrically connected to each other:
the data transmission line identification circuit is electrically connected with the USB _ DET interface and used for inputting an identification level signal into the processing module so as to judge the insertion state of the data transmission line;
and the power supply circuit is electrically connected with the R _ VSD _ CTRL interface and is used for receiving a power supply level signal to control the signal conversion module to be started or closed.
Preferably, the data transmission line identification circuit comprises a USB _5V terminal, a capacitor C3, a resistor R10 and a resistor R12, wherein a first terminal of the resistor R10 is connected to the USB _5V terminal, a second terminal of the resistor R10 is connected to a first terminal of the resistor R12, a capacitor C3 is connected in parallel to the resistor R12, a first terminal of the capacitor C3 is connected to the USB _ DET interface, and a second terminal of the capacitor C3 is grounded;
the first end of the resistor R10 and the second end of the resistor R12 are respectively connected with the power supply circuit.
Preferably, the power supply circuit comprises a USB terminal, a field effect transistor Q2, a triode Q3, a resistor R11, a resistor R13 and a resistor R14, a drain of the field effect transistor Q2 is connected with the USB terminal, a gate of the field effect transistor Q2 is connected with a first terminal of the resistor R11 and a first terminal of the resistor R13 respectively, a second terminal of the resistor R13 is connected with a collector of the triode Q3, and a base of the triode Q3 is connected with the R _ VSD _ CTRL interface through the resistor R14;
the source electrode of the field effect transistor Q2, the second end of the resistor R11 and the emitter electrode of the triode Q3 are respectively connected with the data transmission line identification circuit.
Preferably, the signal conversion module includes a conversion chip U2 and a USB terminal, a power supply terminal of the conversion chip U2 is connected to the USB terminal, and the conversion chip is connected to the analog switch module and the storage medium module, respectively.
Preferably, the storage medium module includes a storage unit CON1, a field effect transistor Q1, a resistor R1, a resistor R2, and a capacitor C1, a gate of the field effect transistor Q1 is connected to VSD _ CTRL via a resistor R2, a source of the field effect transistor Q1 is connected to the 3V3 terminal, a drain of the field effect transistor Q1 is grounded via the capacitor C1, a first terminal of the resistor R1 is connected to the source of the field effect transistor Q1, a second terminal of the resistor R1 is connected to the gate of the field effect transistor Q1, and a fourth pin of the storage unit CON1 is connected to the drain of the field effect transistor Q1.
Preferably, an output pin of the memory cell CON1 is connected to the analog switch module and the signal conversion module, respectively, and a pull-up functional resistor is disposed on the output pin of the memory cell CON 1.
Preferably, the analog switch module includes a switch chip U1 and a resistor R9, a first pin of the switch chip U1 is connected to the SPI _ CTRL interface, a first terminal of the resistor R9 is connected to a first pin of the switch chip U1, and a second terminal of the resistor R9 is grounded.
Preferably, the field effect transistor Q2 is a P-type MOS transistor.
The invention has the following technical effects: the device realizes the fast switching of the read-write objects of the storage medium module through the matching of the processing module, the storage medium module, the signal conversion module, the data transmission line detection module and the analog switch module, and is convenient for a user to use as required.
The invention is further illustrated by the following examples in conjunction with the drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a first schematic block diagram of an apparatus in an embodiment of the invention;
FIG. 2 is a first schematic block diagram of an apparatus in an embodiment of the invention;
FIG. 3 is a schematic circuit diagram of a data transmission line detection module in an embodiment of the present invention;
FIG. 4 is a circuit schematic of a signal conversion module in an embodiment of the invention;
FIG. 5 is a schematic circuit diagram of a storage media module in an embodiment of the invention;
FIG. 6 is a circuit schematic of an analog switch module in an embodiment of the invention;
FIG. 7 is a schematic diagram of a switch chip in the analog switch module according to an embodiment of the present invention;
FIG. 8 is a truth table of the switch chip in the analog switch module according to the embodiment of the present invention;
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
In the description of the present invention, it is to be understood that the terms "first", "second" and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise.
In the embodiments of the present invention, unless otherwise explicitly specified or limited, the terms "mounted," "connected," "fixed," and the like are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrated; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. Specific meanings of the above terms in the embodiments of the present invention can be understood by those of ordinary skill in the art according to specific situations.
As shown in fig. 1 to 6, an embodiment of the present invention provides an apparatus for automatically switching read/write directions of a storage medium, including: the device comprises a processing module 100, a storage medium module 200, a signal conversion module 300, a data transmission line detection module 400 and an analog switch module 500.
The processing module 100 includes a core processor, which is connected to the storage medium module, the data transmission line detection module 400 and the analog switch module 500, respectively.
The storage medium module 200 is electrically connected with the signal conversion module 300; the storage medium module 200 is mainly used to store data.
A data transmission line detection module 400 for detecting whether a data transmission line is inserted into the data interface and supplying power to the signal conversion module 300; specifically, when the data transmission line is not inserted into the data interface, the data transmission line detection module 400 outputs a low level to the processing module 100, and at this time, the processing module 100 performs a read/write operation on the storage medium module 200. When the data transmission line is inserted into the data interface, the data transmission line detection module 400 outputs a high level to the processing module 100, the processing module 100 detects a level change, and then supplies power to the signal conversion module 300, and at this time, the storage medium performs read-write operation on the external setting through the analog switch module 500 and the signal conversion module 300. Therefore, the insertion state of the data transmission line is detected, so that the read-write object of the storage medium is changed, and the method is fast, simple and easy to operate.
An analog switch module 500 for switching a communication object of the storage medium module 200 according to an insertion state of the data transmission line;
when the data transmission line is not inserted into the data interface, the storage medium module performs read-write operation with the processing module 100 through the analog switch module 500; at this time, the signal conversion module 300 does not work, thereby effectively reducing the power consumption of the device.
When the data transmission line is connected to the data interface, the storage medium module performs read/write operations with the external device through the analog switch module 500 and the signal conversion module 300.
The device realizes the fast switching of the read-write object of the storage medium module 200 through the cooperation of the processing module 100, the storage medium module 200, the signal conversion module 300, the data transmission line detection module 400 and the analog switch module 500, and is convenient for a user to use as required.
As shown in fig. 1 to 6, the processing module 100 includes a USB _ DET interface, a VSD _ CTRL interface, a R _ VSD _ CTRL interface, and a SPI _ CTRL interface, wherein the USB _ DET interface and the R _ VSD _ CTRL interface are electrically connected to the data transmission line detection module 400, the VSD _ CTRL interface is electrically connected to the storage medium module 200, and the SPI _ CTRL interface is electrically connected to the analog switch module 500.
The USB _ DET interface, the VSD _ CTRL interface, the R _ VSD _ CTRL interface, and the SPI _ CTRL interface are common IO ports on the processing module 100, and in the present apparatus, the requirement on the processing module 100 is not high, and the processing module 100 can be satisfied as long as four common IO ports are provided, which is not limited herein. So set up, through four ordinary IO mouths, be controlled by data transmission line detection module 400 and control storage medium module 200, analog switch module 500, easy operation, with low costs, easy realization.
The USB _ DET interface is an input IO port, and is mainly used to detect whether a data transmission line is inserted into the data interface, and when the USB _ DET interface inputs a low level, it indicates that the data transmission line is not inserted into the data interface. When the USB _ DET interface inputs a high level, the USB _ DET interface indicates that the data transmission line is inserted into the data interface.
The VSD _ CTRL interface is an output IO interface, and is mainly used for power supply control of the storage medium module 200. When the VSD _ CTRL interface outputs a low level, the storage medium module 200 is powered. When the VSD _ CTRL interface outputs a high level, the storage medium module 200 is powered down.
The R _ VSD _ CTRL interface is an output IO interface, and is mainly used for power supply control of the signal conversion module 300. When the VSD _ CTRL interface outputs a low level, the signal conversion module 300 cannot be power-controlled. When the VSD _ CTRL interface outputs a high level, power supply control is performed on the signal conversion module 300.
The SPI _ CTRL interface is an output IO interface, and mainly determines the signal flow direction of the storage medium module 200 through the analog switch module 500. When the SPI _ CTRL interface outputs a low level, the storage medium module 200 performs a read/write operation with the processing module 100 through the analog switch module 500. When the SPI _ CTRL interface outputs a high level, the storage medium module 200 performs a read/write operation with an external device through the analog switch module 500.
As shown in fig. 1 to 6, the data transmission line detection module 400 includes a data transmission line identification circuit and a power supply circuit electrically connected to each other.
The data transmission line identification circuit is electrically connected to the USB _ DET interface, and is configured to input an identification level signal to the processing module 100 to determine an insertion state of the data transmission line. The data transmission line identification circuit is connected to the USB _ DET interface of the processing module 100, and when the data transmission line is not inserted into the data interface, the USB _ DET interface inputs a low level signal, and the processing module 100 thus identifies that the data transmission line is not inserted into the data interface, and at this time, the VSD _ CTRL interface, the R _ VSD _ CTRL interface, and the SPI _ CTRL interface are all at a low level. When the data transmission line is inserted into the data interface, the USB _ DET interface inputs a high level signal, the processing module 100 recognizes that the data transmission line is inserted into the data interface, and at this time, the VSD _ CTRL interface is set to be high, and is set to be low after a time delay, and the R _ VSD _ CTRL interface and the SPI _ CTRL interface are set to be high, so that the power supply circuit supplies power to the signal conversion module 300, and the analog switch module 500 controls the signal flow direction of the storage medium module 200. Thus, the level states of the four IO ports on the processing module 100 are changed through the states of the data transmission lines, on one hand, the insertion state detection of the data transmission lines is realized, on the other hand, the signal flow direction of the storage medium module 200 is switched through the analog switch module 500, on the one hand, the control of the power supply circuit is realized, and further, the signal conversion circuit is controlled, and the automatic switching operation of the signal flow direction of the storage medium module 200 is realized through the cooperative operation of the three directions. Compared with the situation that an SDIO interface and a USB interface on an IC are not enough in the prior art, the device detects the insertion state of a data transmission line and automatically switches the signal flow direction of the storage medium module 200 at the same time by arranging a data transmission line identification circuit, and does not need to occupy an additional IC interface.
In the data transmission line identification circuit, the data transmission line identification circuit comprises a USB _5V end, a capacitor C3, a resistor R10 and a resistor R12, wherein the first end of the resistor R10 is connected with the USB _5V end, the second end of the resistor R10 is connected with the first end of the resistor R12, the capacitor C3 is connected with the resistor R12 in parallel, the first end of the capacitor C3 is connected with a USB _ DET interface, and the second end of the capacitor C3 is grounded. The first end of the resistor R10 and the second end of the resistor R12 are respectively connected with the power supply circuit.
Specifically, when the data transmission line is not inserted into the data interface, the USB _5V terminal has no voltage, so the USB _ DET interface inputs a low level. When the data transmission line is inserted into the data interface, the USB _5V terminal is changed from 0V to 5V, so the USB _ DET interface inputs high level. The resistor R10 and the resistor R12 together form a voltage divider circuit, which mainly divides the voltage at the USB _5V port, so that the voltage at the USB _ DET interface can be identified by the processing module 100. The capacitor C3 is a filter capacitor at the USB _ DET interface, so that the level signal at the USB _ DET interface is stable and is not easy to change.
The power supply circuit is electrically connected to the R _ VSD _ CTRL interface, and is configured to receive a power supply level signal to control the signal conversion module 300 to be turned on or off.
In an actual use process, when a data transmission line is not inserted into the data interface, since the power of the USB _ DET interface is normally low and there is no level change, the processing module 100 outputs a low level to the VSD _ CTRL interface, the R _ VSD _ CTRL interface, and the SPI _ CTRL interface, and in this state, the signal conversion module 300 is turned off, thereby reducing the power consumption of the device.
When a data transmission line is inserted into the data interface, the level of the USB _ DET interface changes from a low level to a high level, the processing module 100 detects the level change, sets the level of the VSD _ CTRL interface high, delays for a period of time, and then sets the level low, performs one power-on and power-off operation on the storage unit, and simultaneously, outputs of the levels of the R _ VSD _ CTRL interface and the SPI _ CTRL interface are set high, thereby controlling the signal conversion module 300 to start.
When the data transmission line is pulled out from the data interface, the level of the USB _ DET interface changes from high level to low level, the processing module 100 detects the level change, sets the level of the VSD _ CTRL interface high, delays for a period of time, and then sets the level low, performs power on and power off operations on the storage unit, and simultaneously, the level outputs of the R _ VSD _ CTRL interface and the SPI _ CTRL interface are set low, and the signal conversion module 300 is turned off.
In the power supply circuit, the power supply circuit comprises a USB end, a field effect transistor Q2, a triode Q3, a resistor R11, a resistor R13 and a resistor R14, wherein a drain of the field effect transistor Q2 is connected with the USB end, a grid of the field effect transistor Q2 is respectively connected with a first end of the resistor R11 and a first end of the resistor R13, a second end of the resistor R13 is connected with a collector of the triode Q3, and a base of the triode Q3 is connected with an R _ VSD _ CTRL interface through the resistor R14;
the source electrode of the field effect transistor Q2, the second end of the resistor R11 and the emitter electrode of the triode Q3 are respectively connected with the data transmission line identification circuit.
Specifically, when the R _ VSD _ CTRL interface outputs a low level, the off state of the transistor Q3 turns off the fet Q2, and thus the signal conversion module 300 cannot be powered. When the R _ VSD _ CTRL interface outputs a high level, the on state of the transistor Q3 turns on the fet Q2, and the USB _5V port supplies power to the USB port, thereby activating the signal conversion module 300.
The transistor Q3 is an NPN transistor, and is mainly used to control the gate level of the fet Q2. The field effect transistor Q2 is a P-type MOS transistor and serves as a power-on switch of the signal conversion module 300. Resistor R14 is the base resistor of transistor Q3 for obtaining a controlled base current. The resistor R11 is a pull-up resistor of the gate of the FET Q2, and is connected to the USB _5V terminal. The resistor R13 is a pull-down resistor at the grid of the field effect Q2 and is grounded through a triode Q3.
As shown in fig. 1 to 6, the signal conversion module 300 includes a conversion chip U2 and a USB terminal, a power supply terminal of the conversion chip U2 is connected to the USB terminal, and the conversion chip is connected to the analog switch module 500 and the storage medium module, respectively.
In this embodiment, the chip signal of the conversion chip U2 is GL823K, and the conversion chip U2 is a chip for converting the storage medium signal (SD signal) into the data transmission line readable signal (USB signal), as long as the conversion function is satisfied, and the conversion chip is not limited herein.
Specifically, the tenth pin of the conversion chip U2 is connected to the USB terminal, the USB terminal is grounded through the capacitor C4, and the capacitor C4 is a filter capacitor, so that the voltage at the USB terminal is stable, and stable power supply is provided to the conversion chip U2. The thirteenth pin of the conversion chip U2 is connected to the VDD terminal, the VDD terminal is grounded through a capacitor C5, and the capacitor C5 is a filter capacitor, so as to ensure the voltage stability of the VDD terminal. The ninth pin of the converting chip U2 is also connected to the VDD terminal, and the ninth pin of the converting chip U2 is grounded through the capacitor C6. The fifteenth pin and the sixteenth pin of the conversion chip U2 are connected to a data transmission line, and transmit the converted data through the data transmission line.
When the data conversion module is used, when a data transmission line is inserted into the data interface, the R _ VSD _ CTRL interface outputs a high level, the transistor Q3 is turned on to turn on the field-effect transistor Q2, and the USB 5V terminal supplies power to the USB terminal to start the signal conversion module 300.
As shown in fig. 1 to 6, the storage medium module 200 includes a storage unit CON1, a field effect transistor Q1, a resistor R1, a resistor R2, and a capacitor C1, a gate of the field effect transistor Q1 is connected to the VSD _ CTRL interface through a resistor R2, a source of the field effect transistor Q1 is connected to the 3V3 terminal, a drain of the field effect transistor Q1 is grounded through the capacitor C1, a first terminal of the resistor R1 is connected to the source of the field effect transistor Q1, a second terminal of the resistor R1 is connected to the gate of the field effect transistor Q1, and a fourth pin of the storage unit CON1 is connected to the drain of the field effect transistor Q1.
In this embodiment, the storage unit CON1 is an SD card, and may be a storage medium such as a TF card, an MMC, or an MSPRO, which are not limited herein. When the storage unit CON1 has two operation modes, SPI and SD, the SPI mode is adopted when communicating with the processing module 100; the SD mode is employed when communicating with an external device.
Specifically, when the VSD _ CTRL interface is at a low level, the field effect transistor Q1 is turned on and supplies power to the memory cell CON 1. When the VSD _ CTRL interface is high, the fet Q1 turns off and powers down the memory cell CON 1. When the processing module 100 detects that the level of the USB _ DET interface changes from a low level to a high level, the processing module sets the level of the VSD _ CTRL interface high, delays for a period of time, and then sets the VSD _ CTRL interface low, so as to perform a power-down and power-up operation on the storage unit. Therefore, the condition of virtual high of the level at the USB _ DET interface can be effectively avoided, the phenomenon that the level is driven to change due to the virtual high condition is prevented, the misoperation that the processing module 100 outputs high level to the R _ VSD _ CTRL interface and the SPI _ CTRL interface is influenced, and the accurate operability of the device is further improved.
In addition, the resistor R2 is a current limiting resistor, and current is guaranteed to be in a reasonable range. The resistor R1 is a pull-up resistor, which ensures that the field-effect transistor Q1 is turned off under an uncertain level state of the VSD _ CTRL interface, thereby preventing damage to the memory cell CON 1. The field effect transistor Q1 is a PMOS transistor, and serves as a power-on switch of the memory cell CON 1. The capacitor C1 is a filter capacitor at the end 3V3, and the power supply stability of the capacitor is guaranteed.
An output pin of the memory cell CON1 is connected to the analog switch module 500 and the signal conversion module 300, respectively, and a pull-up functional resistor is disposed on an output pin of the memory cell CON 1.
Specifically, the number of the pull-up functional resistors is six, and the pull-up functional resistors are respectively a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and a resistor R8, and are used for ensuring stability of data transmission.
As shown in fig. 1 to 8, the analog switch module 500 includes a switch chip U1 and a resistor R9, a first pin of the switch chip U1 is connected to the SPI _ CTRL interface, a first end of the resistor R9 is connected to a first pin of the switch chip U1, and a second end of the resistor R9 is grounded.
In this embodiment, the model of the switch chip U1 is CH440R, but the switch chip U1 may be a chip that can equally implement this function, and is not limited herein.
The sixteenth pin of the switch chip U1 is connected to the 3V3 terminal, and the sixteenth pin of the switch chip U1 is grounded through a capacitor C2, so that the 3V3 terminal can stably supply power to the switch chip U1.
The foregoing is merely a preferred embodiment of the invention and is not intended to limit the invention in any manner. Those skilled in the art can make numerous possible variations and modifications to the present teachings, or modify equivalent embodiments to equivalent variations, without departing from the scope of the present teachings, using the methods and techniques disclosed above. Therefore, all equivalent changes made according to the shape, structure and principle of the present invention without departing from the technical scheme of the present invention shall be covered by the protection scope of the present invention.
Claims (10)
1. An apparatus for automatically switching the read/write direction of a storage medium, comprising:
a processing module; and the processing module is respectively electrically connected with:
the storage medium module is electrically connected with the signal conversion module;
the data transmission line detection module is used for detecting whether a data transmission line is inserted into the data interface or not and supplying power to the signal conversion module;
the analog switch module is used for switching a communication object of the storage medium module according to the insertion state of the data transmission line;
when the data transmission line is not inserted into the data interface, the storage medium module performs read-write operation with the processing module through the analog switch module;
when the data transmission line is accessed into the data interface, the storage medium module performs read-write operation with the external device through the analog switch module and the signal conversion module.
2. The apparatus according to claim 1, wherein the processing module comprises a USB _ DET interface, a VSD _ CTRL interface, a R _ VSD _ CTRL interface, and an SPI _ CTRL interface, the USB _ DET interface and the R _ VSD _ CTRL interface are electrically connected to the data transmission line detection module, the VSD _ CTRL interface is electrically connected to the storage medium module, and the SPI _ CTRL interface is electrically connected to the analog switch module.
3. The apparatus of claim 2, wherein the data transmission line detection module comprises, electrically connected to each other:
the data transmission line identification circuit is electrically connected with the USB _ DET interface and used for inputting an identification level signal into the processing module so as to judge the insertion state of the data transmission line;
and the power supply circuit is electrically connected with the R _ VSD _ CTRL interface and is used for receiving a power supply level signal to control the signal conversion module to be started or closed.
4. The apparatus of claim 3, wherein the data line identification circuit comprises a USB _5V terminal, a capacitor C3, a resistor R10, and a resistor R12, a first terminal of the resistor R10 is connected to the USB _5V terminal, a second terminal of the resistor R10 is connected to a first terminal of the resistor R12, the capacitor C3 is connected to the resistor R12 in parallel, a first terminal of the capacitor C3 is connected to the USB _ DET interface, and a second terminal of the capacitor C3 is grounded;
the first end of the resistor R10 and the second end of the resistor R12 are respectively connected with the power supply circuit.
5. The apparatus of claim 3, wherein the power supply circuit comprises a USB terminal, a FET Q2, a transistor Q3, a resistor R11, a resistor R13, and a resistor R14, wherein a drain of the FET Q2 is connected to the USB terminal, a gate of the FET Q2 is connected to a first terminal of the resistor R11 and the resistor R13, respectively, a second terminal of the resistor R13 is connected to a collector of the transistor Q3, and a base of the transistor Q3 is connected to the R _ VSD _ CTRL interface through the resistor R14;
the source electrode of the field effect transistor Q2, the second end of the resistor R11 and the emitter electrode of the triode Q3 are respectively connected with the data transmission line identification circuit.
6. The apparatus of claim 5, wherein the signal conversion module comprises a conversion chip U2 and the USB port, a power supply port of the conversion chip U2 is connected to the USB port, and the conversion chip is connected to the analog switch module and the storage medium module, respectively.
7. The apparatus of claim 2, wherein the storage medium module comprises a storage unit CON1, a FET Q1, a resistor R1, a resistor R2 and a capacitor C1, the gate of the FET Q1 is connected to the VSD _ CTRL interface through the resistor R2, the source of the FET Q1 is connected to the 3V3 terminal, the drain of the FET Q1 is grounded through the capacitor C1, the first terminal of the resistor R1 is connected to the source of the FET Q1, the second terminal of the resistor R1 is connected to the gate of the FET Q1, and the fourth pin of the storage unit CON1 is connected to the drain of the FET Q1.
8. The apparatus of claim 7, wherein an output pin of the memory unit CON1 is connected to the analog switch module and the signal conversion module, respectively, and a pull-up function resistor is disposed on an output pin of the memory unit CON 1.
9. The apparatus of claim 2, wherein the analog switch module comprises a switch chip U1 and a resistor R9, a first pin of the switch chip U1 is connected to the SPI _ CTRL interface, a first terminal of the resistor R9 is connected to a first pin of the switch chip U1, and a second terminal of the resistor R9 is grounded.
10. The apparatus according to claim 5, wherein the FET Q2 is a P-type MOS transistor.
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