CN219980806U - Signal level dynamic switching circuit for TF card and corresponding electronic equipment - Google Patents
Signal level dynamic switching circuit for TF card and corresponding electronic equipment Download PDFInfo
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- CN219980806U CN219980806U CN202320781336.0U CN202320781336U CN219980806U CN 219980806 U CN219980806 U CN 219980806U CN 202320781336 U CN202320781336 U CN 202320781336U CN 219980806 U CN219980806 U CN 219980806U
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Abstract
The utility model discloses a TF card-oriented signal level dynamic switching circuit and corresponding electronic equipment, comprising a power supply unit, a TF card slot, a system-level chip and a switching circuit; the power supply unit is connected with the switching circuit, the switching circuit is connected with the system-in-chip, and the system-in-chip is connected with the TF card slot. The utility model can realize the switching of the output voltage through simple and ingenious circuit design, saves development cost, reduces complexity of process realization, ensures the working stability of the circuit because the switching of the output voltage is linear.
Description
Technical Field
The utility model relates to a signal level dynamic switching circuit for a TF card, and also relates to corresponding electronic equipment, belonging to the technical field of intelligent cards.
Background
TF cards, also known as T-Flash cards, are widely used in mobile phones, GPS devices, portable music players and Flash memory discs. SDIO (Secure Digital Input and Output, secure digital input output interface) is an interface developed on the basis of SD memory card interfaces, and its technical standard defines two types of cards, namely a full-speed card and a low-speed card. The full-speed card needs to be externally connected with 1.8V voltage, and the low-speed card needs to be externally connected with 3.3V voltage under the requirement of the transmission rate. For the SOC chip in the security industry, some chips can be switched in power supply, but some SOC chips do not support the power supply switching. To achieve mode switching of TF cards requires external level switching, e.g. analog switches connected to the power pins of TF cards are controlled by the SOC chip, but this approach has drawbacks: because the power supply of the SOC chip has a power-on time sequence requirement, if the power supply for supplying power to the analog switch delays the power supply, the inside of the analog switch is unstable, the phenomenon that the high level flows backward to the low level occurs, and the automatic mode switching according to the type of the TF card is difficult to realize.
In the Chinese utility model with the patent number ZL 202221089673.5, an automatic switching circuit for the working mode of a TF card is disclosed. The circuit comprises: the system comprises a power supply module, a TF card slot module, a main control chip for identifying the type of the TF card inserted into the TF card slot module and a feedback module for controlling the output voltage of the power supply module according to the output level of a mode switching pin of the main control chip; the output end of the power supply module is respectively connected with the power supply input end of the main control module and the power supply input end of the TF card slot module; the communication end of the TF card slot module is connected with the communication end of the main control chip; one end of the feedback module is connected with the power module, and the other end of the feedback module is connected with a mode switching pin of the main control chip. The circuit has a simple structure, can automatically complete the mode switching of the TF card and has no backflow problem.
However, the above technical solution is to add a power conversion module to realize mode switching, which has high manufacturing cost, complex process implementation, and nonlinear switching of output voltage, resulting in lower stability.
Disclosure of Invention
The primary technical problem to be solved by the utility model is to provide a TF-card-oriented signal level dynamic switching circuit.
Another technical problem to be solved by the present utility model is to provide an electronic device including the signal level dynamic switching circuit.
In order to achieve the technical purpose, the utility model adopts the following technical scheme:
according to a first aspect of an embodiment of the present utility model, there is provided a TF-card-oriented signal level dynamic switching circuit, including a power supply unit, a TF card slot, a system-in-chip, and a switching circuit;
the power supply unit is connected with the switching circuit, the switching circuit is connected with the system-in-chip, and the system-in-chip is connected with the TF card slot;
and the switching circuit realizes the voltage switching of the output end of the power supply unit according to the CTL signal level of the system-in-chip.
Wherein preferably the power supply unit comprises a 1.8V output and a 3.3V output; the 3.3V output end is connected with one end of the first resistor, one end of the first capacitor and the source electrode of the first MOS tube respectively, and the 1.8V output end is connected with the drain electrode of the second MOS tube.
Wherein preferably, the TF card slot comprises a CLK interface, a CMD interface and a DATA interface; the input end of the CLK interface, the input end of the CMD interface and the input end of the DATA interface are respectively connected with the corresponding CLK interface, the CMD interface and the DATA interface in the system-level chip, and the output end of the CLK interface, the output end of the CMD interface and the output end of the DATA interface are respectively connected with the corresponding interfaces of the TF card connected with the card slot.
Wherein preferably, the system-on-chip comprises a CLK interface, a CMD interface, a DATA interface, a VDD SDIO interface and a CTL interface; the VDD SDIO interface and the CTL interface are respectively connected with the switching circuit.
Preferably, the switching circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a first MOS tube, a second MOS tube and a first transistor; the other end of the first resistor, the other end of the first capacitor, the grid electrode of the first MOS tube and one end of the second resistor are connected with the CTL interface; the drain electrode of the first MOS tube, one end of the second capacitor and one end of the third capacitor are connected with the VDD SDIO interface; the other end of the second resistor and one end of the third resistor are connected with the base electrode of the first triode; the other end of the third resistor is grounded; the emitter of the first triode is grounded, and the collector of the first triode is respectively connected with the other end of the second capacitor, one end of the fourth resistor and the grid electrode of the second MOS tube; the other end of the fourth resistor is connected with one end of the second capacitor; the source electrode of the second MOS tube is connected with one end of the second capacitor; the other end of the third capacitor is grounded.
Preferably, the first MOS tube and the second MOS tube are PNP type MOS tubes, and the first triode is an NPN type triode.
Preferably, the working state of the TF card connected to the TF card slot is switched between a low-speed working state and a high-speed working state.
Preferably, when the TF card is in a low-speed working state, the CTL signal of the system-in-chip is at a low level, so that the switching circuit is conducted with a line of the 3.3V output end of the power supply unit, and the line of the 1.8V output end is not conducted, so that the input voltage of the VDD SDIO interface is 3.3V.
Preferably, when the TF card is in a high-speed working state, the CTL signal of the system-in-chip is at a high level, so that the switching circuit is not conducted with a line of the 3.3V output end of the power supply unit, and a line of the 1.8V output end is conducted, so that the input voltage of the VDD SDIO interface is 1.8V.
According to a second aspect of the embodiment of the present utility model, an electronic device is provided, which includes the signal level dynamic switching circuit described above.
Compared with the prior art, the utility model can realize the switching of the output voltage through simple and ingenious circuit design, saves development cost, reduces complexity of process realization, ensures the working stability of the circuit because the switching of the output voltage is linear.
Drawings
Fig. 1 is a block diagram of an embodiment of a TF-card-oriented signal level dynamic switching circuit provided by the present utility model;
fig. 2 is a schematic diagram of a signal level dynamic switching circuit for TF card according to the present utility model;
Detailed Description
The technical contents of the present utility model will be described in detail with reference to the accompanying drawings and specific examples.
The embodiment of the utility model provides a signal level dynamic switching circuit for a TF card, which can be applied to various system-level chips (such as Hi3516DV300, BCM5892, IMX6UL, MH1905 and the like). In one embodiment of the utility model, a MH1905 chip is illustrated.
As shown in fig. 1, the embodiment of the utility model discloses a signal level dynamic switching circuit for a TF card, which at least comprises a power supply unit, a TF card slot, a MH1905 chip serving as a system-in-chip, and a switching circuit. The power supply unit is connected with the switching circuit, the switching circuit is connected with the MH1905 chip, and the MH1905 chip is connected with the TF card slot.
As shown in fig. 2, their specific composition and working principle are described as follows:
in one embodiment of the utility model, the power supply unit includes a 1.8V output and a 3.3V output. The 3.3V output end is connected with one end of the first resistor R1, one end of the first capacitor C1, and the source electrode of the first MOS transistor M1, and the 1.8V output end is connected with the drain electrode of the second MOS transistor M2. The power supply unit is used for providing electric energy for the TF card under different working modes.
In one embodiment of the utility model, the TF card slot includes a clock interface (CLK), a CMD interface, and a DATA interface. The input end of the CLK interface, the input end of the CMD interface and the input end of the DATA interface are respectively connected with the corresponding CLK interface, CMD interface and DATA interface in the MH1905 chip, and the output end of the CLK interface, the output end of the CMD interface and the output end of the DATA interface are respectively connected with the corresponding interfaces of the TF card connected with the card slot.
In one embodiment of the utility model, the MH1905 chip includes a CLK interface, a CMD interface, a DATA interface, a VDD SDIO interface, and a CTL interface. The VDD SDIO interface and the CTL interface are respectively connected with the switching circuit. The MH1905 chip functions as: and sending a CTL signal to the switching circuit according to the working state of the TF card, and controlling the switching circuit to switch the circuit.
In one embodiment of the present utility model, the switching circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first MOS transistor M1, a second MOS transistor M2, and a first transistor Q1. The first MOS transistor M1 and the second MOS transistor M2 are PNP type MOS transistors, and the first transistor Q1 is an NPN type transistor. The other end of the first resistor R1, the other end of the first capacitor C1, the grid electrode of the first MOS tube M1 and one end of the second resistor R2 are connected with the CTL interface; the drain electrode of the first MOS tube M1, one end of the second capacitor C2 and one end of the third capacitor C3 are connected with the VDD SDIO interface; the other end of the second resistor R2 and one end of the third resistor R3 are connected with the base electrode of the first triode Q1; the other end of the third resistor R3 is grounded; the emitter of the first triode Q1 is grounded, and the collector of the first triode Q1 is respectively connected with the other end of the second capacitor C2, one end of the fourth resistor R4 and the grid electrode of the second MOS tube M2; the other end of the fourth resistor R4 is connected with one end of the second capacitor C2; the source electrode of the second MOS tube M2 is connected with one end of the second capacitor C2; the other end of the third capacitor C3 is grounded.
The working principle of the signal level dynamic switching circuit provided by the utility model is explained as follows:
the working state of the TF card connected into the TF card slot can be switched between a low-speed working state (namely an initial working state) and a high-speed working state, namely the CTL signal of the MH1905 chip serving as a system-in-chip can be switched between a low level and a high level, and because the PNP type MOS tube is conducted at the low level and is not conducted at the high level, the NPN type triode is conducted at the high level and is not conducted at the low level, so that the PNP type MOS tube is formed by the steps of:
when the TF card is in a low-speed working state, the CTL signal of the MH1905 chip is in a low level, the first MOS tube M1 is in a low level conduction state, the first triode Q1 is in a non-conduction state, the second MOS tube M2 is in a non-conduction state, namely, the switching circuit is conducted with a circuit of the 3.3V output end of the power supply unit and is not conducted with a circuit of the 1.8V output end of the power supply unit, so that the output voltage is stabilized to be 3.3V, namely, the input voltage of the VDD SDIO interface is 3.3V, the initialization is completed in the SDIO 3.0 technical standard, and the low-speed transmission requirement is met.
When the TF card is in a high-speed working state, the CTL signal of the MH1905 chip is in a high level, the first MOS tube M1 is in a high level non-conducting state, the first triode Q1 is in a conducting state, the second MOS tube M2 is in a conducting state, namely, the switching circuit is non-conducting with a line of a 3.3V output end of the power supply unit and is conducting with a line of a 1.8V output end of the power supply unit, so that the output voltage is further stabilized to be 1.8V, namely, the input voltage of the VDD SDIO interface is 1.8V, and the requirement of high-speed transmission in the SDIO 3.0 technical standard is met.
The embodiment of the utility model further provides electronic equipment, which comprises the signal level dynamic switching circuit. The electronic device can be various electronic devices adopting TF cards, such as digital cameras, smart phones, tablet computers and the like.
It should be noted that the above embodiments are only examples, and the technical solutions of the embodiments may be combined, which are all within the protection scope of the present utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The TF-card-oriented signal level dynamic switching circuit and the corresponding electronic equipment provided by the utility model are described in detail. Any obvious modifications to the present utility model, without departing from the spirit thereof, would constitute an infringement of the patent rights of the utility model and would take on corresponding legal liabilities.
Claims (10)
1. A TF card-oriented signal level dynamic switching circuit is characterized by comprising a power supply unit, a TF card slot, a system-level chip and a switching circuit;
the power supply unit is connected with the switching circuit, the switching circuit is connected with the system-in-chip, and the system-in-chip is connected with the TF card slot;
and the switching circuit realizes the voltage switching of the output end of the power supply unit according to the CTL signal level of the system-in-chip.
2. The signal level dynamic switching circuit of claim 1, wherein:
the power supply unit comprises a 1.8V output end and a 3.3V output end; the 3.3V output end is connected with one end of the first resistor, one end of the first capacitor and the source electrode of the first MOS tube respectively, and the 1.8V output end is connected with the drain electrode of the second MOS tube.
3. The signal level dynamic switching circuit of claim 1, wherein:
the TF card slot comprises a CLK interface, a CMD interface and a DATA interface; the input end of the CLK interface, the input end of the CMD interface and the input end of the DATA interface are respectively connected with the corresponding CLK interface, the CMD interface and the DATA interface in the system-level chip, and the output end of the CLK interface, the output end of the CMD interface and the output end of the DATA interface are respectively connected with the corresponding interfaces of the TF card connected with the card slot.
4. The signal level dynamic switching circuit of claim 1, wherein:
the system-on-chip comprises a CLK interface, a CMD interface, a DATA interface, a VDD SDIO interface and a CTL interface; the VDD SDIO interface and the CTL interface are respectively connected with the switching circuit.
5. The signal level dynamic switching circuit of claim 1, wherein:
the switching circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a first MOS tube, a second MOS tube and a first transistor; the other end of the first resistor, the other end of the first capacitor, the grid electrode of the first MOS tube and one end of the second resistor are connected with the CTL interface; the drain electrode of the first MOS tube, one end of the second capacitor and one end of the third capacitor are connected with the VDD SDIO interface; the other end of the second resistor and one end of the third resistor are connected with the base electrode of the first triode; the other end of the third resistor is grounded; the emitter of the first triode is grounded, and the collector of the first triode is respectively connected with the other end of the second capacitor, one end of the fourth resistor and the grid electrode of the second MOS tube; the other end of the fourth resistor is connected with one end of the second capacitor; the source electrode of the second MOS tube is connected with one end of the second capacitor; the other end of the third capacitor is grounded.
6. The signal level dynamic switching circuit of claim 5, wherein:
the first MOS tube and the second MOS tube are PNP type MOS tubes, and the first triode is an NPN type triode.
7. The signal level dynamic switching circuit of claim 1, wherein:
the working state of the TF card connected into the TF card slot is switched between a low-speed working state and a high-speed working state.
8. The signal level dynamic switching circuit of claim 7, wherein:
when the TF card is in a low-speed working state, the CTL signal of the system-in-chip is in a low level, so that the switching circuit is conducted with a line of a 3.3V output end of the power supply unit, and a line of a 1.8V output end is not conducted, and further the input voltage of the VDD SDIO interface is 3.3V.
9. The signal level dynamic switching circuit of claim 7, wherein:
when the TF card is in a high-speed working state, the CTL signal of the system-in-chip is in a high level, so that the switching circuit is not conducted with a line of a 3.3V output end of the power supply unit, and is conducted with a line of a 1.8V output end, and further the input voltage of the VDD SDIO interface is 1.8V.
10. An electronic device comprising the signal level dynamic switching circuit of any one of claims 1 to 9.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320781336.0U CN219980806U (en) | 2023-04-10 | 2023-04-10 | Signal level dynamic switching circuit for TF card and corresponding electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320781336.0U CN219980806U (en) | 2023-04-10 | 2023-04-10 | Signal level dynamic switching circuit for TF card and corresponding electronic equipment |
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| CN219980806U true CN219980806U (en) | 2023-11-07 |
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| CN202320781336.0U Active CN219980806U (en) | 2023-04-10 | 2023-04-10 | Signal level dynamic switching circuit for TF card and corresponding electronic equipment |
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| CN (1) | CN219980806U (en) |
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- 2023-04-10 CN CN202320781336.0U patent/CN219980806U/en active Active
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