CN114967570B - Programmable control circuit structure and control method for I2C slave machine address - Google Patents
Programmable control circuit structure and control method for I2C slave machine address Download PDFInfo
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
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- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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Abstract
The invention discloses an I2C slave address programmable control circuit structure and a control method, which comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are connected with the MCU controller through I2C buses, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, can realize the I2C address control only through software, and better meets the application requirement.
Description
Technical Field
The invention relates to an I2C bus circuit, in particular to an I2C slave address programmable control circuit structure and a control method.
Background
In the prior art, I2C communication is a relatively common communication control protocol. If a plurality of ICs are used on the bus at the same time, the address of the I2C slave of a certain chip is 1010ABC, wherein A, B and C are self-defined address values of the chip, the I2C slave address of the chip can be set to 8 different values, and 8 ICs can be used on the same bus. To support a customized I2C address, a corresponding pin must be provided to allow the user to decide the address value at his or her discretion, and this is usually done by a hardware designer. Therefore, the conventional I2C communication mode cannot realize the arbitrary setting of the I2C address, and is not beneficial to circuit design and application.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide an I2C slave address programmable control circuit structure and control method, which can arbitrarily set an I2C address, can change a default slave address by sending an I2C command, and can realize I2C address control by software, in view of the deficiencies of the prior art.
In order to solve the technical problems, the invention adopts the following technical scheme.
The I2C slave address programmable control circuit structure comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are all connected with the MCU controller through I2C buses, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN.
Preferably, the maximum value of n in the communication chips U0 to Un is 127.
Preferably, when the switch pin PDN inputs a low level, the communication chip is in a closed state and is not allowed to be written or read by the I2C bus; when the switch pin PDN inputs high, the communication chip is in an active state, allowing data to be written or read by the I2C bus.
A control method of an I2C slave address programmable control circuit structure comprises the following steps: step S1, setting an I2C slave address of a master chip: setting the communication chip U0 as a main chip, and sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU (microprogrammed control unit) controller, wherein at the moment, NEW pins of all the communication chips are in a default high-level state, and switch pin PDN input signals of the communication chips U1 to Un are kept at 0 bit, so that the communication chips U1 to Un do not act on signals on an I2C bus; step S2, setting I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, so that the fact that the address setting is already finished is indicated, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 can be controlled by an I2C bus at the moment, the MCU controller sends an instruction to change the address of the communication chip U1 to h01, after the instruction takes effect, the address of the communication chip U1 is changed, and meanwhile, the output pin NEW of the communication chip U1 outputs a high level; s3, because an output pin NEW of the communication chip U1 is connected to a switch pin PDN of the communication chip U2, at the moment, the MCU controller can modify the address of the slave machine of the communication chip U2; and repeating the steps until all slave addresses of the communication chips U2 to Un are modified.
Preferably, in step S2, when the slave address is modified, the new I2C slave address value sent by the MCU controller should be an even number, and if the value sent by the MCU controller to change the I2C slave address is an odd number, the communication chip does not respond, and continues to use the default slave address.
Preferably, the method further comprises the steps of resetting and restoring the default address: when the communication chips U0 to Un are powered on again after power failure, the communication chips U0 to Un are all restored to the default I2C slave machine address, and meanwhile, an output pin NEW of the communication chip outputs a low level and restores to an initial address state.
Preferably, the method further comprises the step of setting the I2C slave address register REGA: the register REGA has 8 configurable bits of D7-D0, D7-D1 is used for setting I2C slave addresses, D0 is used for function setting, when the D0 bit is set to 0, the I2C slave addresses (D7-D1 bits) set by the register are used, when the D0 bit is set to 1, the default I2C addresses are used, when a NEW slave address is configured, an even number must be written, so that a NEW device address of a communication chip is effective, and at the same time, NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are always opposite, and when PDN =0, the output level of NEW is always 0.
Preferably, the method further comprises the step of holding and setting the address of the I2C device: after the communication chips U0 to Un are set with NEW I2C device addresses, when the system is to be restarted without power loss or enters a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0 to Un are sequentially turned off, so that all of the communication chips U0 to Un enter a low power standby state, and at this time, the REGA data of the communication chips U0 to Un are not changed, and thus the I2C device addresses are still maintained at the set values.
Preferably, the PDN functions of the switch pins of the communication chips U0 to Un include: when the PDN of the switch pin is 0, an I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus; when the switch pin PDN is 0, the output pin NEW always outputs a low level; when the switch pin PDN is an arbitrary value, the value of any bit of the data of the communication chip REGA is not changed, and the actual I2C device address of the communication chip is determined by the REGA; when the PDN is 1, the I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through the I2C bus; when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs high level, because the output NEW is connected with the switch pin PDN of one chip, the communication chip uses the I2C address set by the REGA (D7-D1), so that the next communication chip is started to perform I2C communication, when the REGA-D0 bit is set to 1, the output NEW is changed into low level again, and the communication chip restores the default I2C address.
Preferably, the communication chips U0 to Un may not use the default address, but change the default value of the register REGA to a value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 regardless of the value, and the output pin NEW of the communication chip outputs a low level in the default condition to indicate that the address is not reconfigured, but uses the default I2C device address.
The I2C slave address programmable control circuit structure disclosed by the invention can realize the control of the most I2C slave equipment by using fewer pins, the I2C slave address can be completely operated in a software mode without excessive intervention of hardware, each communication chip can be realized by only 4 pins, and the output of an MCU (micro control unit) controller only needs 3 pins. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, can realize the I2C address control only through software, and better meets the application requirement.
Drawings
FIG. 1 is a circuit block diagram of an I2C slave address programmable control circuit structure according to the present invention;
fig. 2 is a circuit block diagram of an I2C slave address programmable control circuit structure in another application scenario of the present invention;
FIG. 3 is a diagram of a register structure;
FIG. 4 is a circuit diagram of a pull-up resistor connected to a register.
Detailed Description
The invention is described in more detail below with reference to the figures and examples.
The invention discloses an I2C slave address programmable control circuit structure, please refer to fig. 1, which comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un respectively comprise a data pin M, a switch pin PDN and an output pin NEW, the switch pin PDN is used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are respectively connected with the MCU controller through an I2C bus, the switch pin PDN of the communication chip U0 is connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pin NEW and the switch pin PDN. Among the communication chips U0 to Un, the maximum value of n is 127, that is, the maximum number of communication chips is 128.
Regarding the setting of the switch pin PDN, in the present invention, when the switch pin PDN inputs a low level, the communication chip is in an off state, and data is not allowed to be written or read by the I2C bus; when the switch pin PDN inputs high, the communication chip is in an active state, allowing data to be written or read by the I2C bus.
The programmable control circuit structure of the I2C slave machine address disclosed by the invention can realize the control of the most I2C slave machine equipment by using fewer pins, the I2C slave machine address can be completely realized by software operation without excessive intervention of hardware, each communication chip can be realized by only 4 pins, and the output of an MCU controller only needs 3 pins. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, can realize the I2C address control only through software, and better meets the application requirement.
On the basis of the I2C slave address programmable control circuit structure, the invention also discloses a control method, which comprises the following steps:
step S1, setting an I2C slave address of a master chip: setting the communication chip U0 as a main chip, sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU (microprogrammed control unit) controller, and simultaneously keeping the switch pin PDN input signals of the communication chips U1 to Un at 0 position so that the communication chips U1 to Un do not act on signals on an I2C bus;
step S2, setting I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, so that the fact that the address setting is already finished is indicated, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 can be controlled by an I2C bus at the moment, an MCU controller sends an instruction, the address of the communication chip U1 is changed into h02, after the instruction takes effect, the address of the communication chip U1 is changed, and meanwhile, the output pin NEW of the communication chip U1 outputs the high level;
s3, because an output pin NEW of the communication chip U1 is connected to a switch pin PDN of the communication chip U2, at the moment, the MCU controller can modify the slave machine address of the communication chip U2;
and repeating the steps until all the slave addresses of the communication chips U2 to Un are modified.
In the step S2, when the slave address is modified, the new I2C slave address value sent by the MCU controller should be an even number, and if the value sent by the MCU controller to change the I2C slave address is an odd number, the communication chip does not respond, and continues to use the default slave address.
Specifically, when modifying the slave address, the data value of the change address sent to the communication chip by the MCU controller must be an even number, i.e., the D0 bit of the REGA is 0. If an odd number is sent, i.e. the D0 bit of the REGA is 1, this indicates that the default slave address is used.
In addition, the invention also includes the steps of resetting and restoring the default address: when the communication chips U0 to Un are powered on again after power failure, the communication chips U0 to Un are all restored to the default I2C slave machine address, and meanwhile, the output pin NEW of the communication chips outputs low level and is restored to the initial address state.
On the basis, the invention also comprises a step of setting an I2C slave address register REGA: the register REGA has 8 configurable bits of D7-D0, D7-D1 is used for setting I2C slave addresses, D0 is used for function setting, when the D0 bit is set to 0, the I2C slave addresses (D7-D1 bits) set by the register are used, when the D0 bit is set to 1, the default I2C addresses are used, when a NEW slave address is configured, an even number must be written, so that a NEW device address of a communication chip is effective, and at the same time, NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are always opposite, and when PDN =0, the output level of NEW is always 0.
The invention also comprises an I2C equipment address keeping setting step: after the communication chips U0 to Un are provided with NEW I2C device addresses, when the system is to be restarted without power loss or enters a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0 to Un are sequentially turned off, so that all of the communication chips U0 to Un enter a low power standby state, and at this time, the REGA data of the communication chips U0 to Un are not changed, and therefore the I2C device addresses are still maintained at the set values.
In practical application, the PDN functions of the switch pins of the communication chips U0 to Un include:
when the PDN of the switch pin is 0, an I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus;
when the switch pin PDN is 0, the output pin NEW always outputs a low level;
when the PDN is an arbitrary value, the value of any bit of the REGA data of the communication chip is not changed, and the actual I2C device address of the communication chip is determined by the REGA;
when the PDN is 1, an I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through an I2C bus;
when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs high level, because the output NEW is connected with the switch pin PDN of one chip, the communication chip uses the I2C address set by the REGA (D7-D1), so that the next communication chip is started to perform I2C communication, when the REGA-D0 bit is set to 1, the output NEW is changed into low level again, and the communication chip restores the default I2C address.
Preferably, the communication chips U0 to Un may not use the default address, but change the default value of the register REGA to a certain value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 regardless of the value, and the output pin NEW of the communication chip outputs a low level in the default condition to indicate that the address is not reconfigured, but uses the default I2C device address.
The I2C slave address programmable control circuit structure disclosed by the invention can be realized by sequentially connecting a plurality of communication chips in series, and in practical application, the circuit structure shown in figure 2 can be adopted to realize independent control, and under the condition, at most 2 communication chips are adopted.
The invention discloses an I2C slave address programmable control circuit structure and a control method thereof, and the circuit structure and the working principle under the practical application scene can refer to the following embodiments.
Example one
In this embodiment, please refer to fig. 1 to 4, the default I2C address of the chip a is set to h36 (16-ary value, corresponding binary value is 0110110), wherein the chip has 3 pins, ABC, and can be used to set the slave addresses, and the binary value of the settable address is 0110ABC, so that a total of 8I 2C slave addresses can be set. A total of 8 chips a can be used on the bus to communicate without interference.
The chip B adopts an I2C address mode which can be set by a user, a 1byte register is built inside the chip B and used for storing the I2C slave addresses of the chip (D7-D1 bits are valid, the default address is indicated when D0 writes 1, and the address set by the register is indicated when 0 writes). In this way, theoretically, a maximum of 128 chips can be connected in parallel to the same I2C bus, address setting can be performed on each chip in sequence, and after the setting is completed, the chips will operate at the new I2C address, so that theoretically, a maximum of 128 chips can be connected in parallel to the same I2C bus, because the 128 chips are all reset with different device addresses.
First, since it is theoretically supported that a maximum of 128 chips use the same I2C bus, but before setting the address, the chips have the same device address (assuming the default value h 36), such chips must have a PDN switch pin control, and can control the I2C bus switch or the chips to be completely off. When the PDN inputs low level, the chip is in a closed state, and data operation on the I2C cannot be influenced. When the PDN input is high, it can be written by I2C.
Second, the I2C slave address of the master chip is set. The 128 chips must have a default main chip (marked as U0), and at this time, the MCU sends the PDN signal to be directly connected to the main chip (U0), and when the MCU outputs PDN =1, U0 can be written, and at this time, the PDN input signals of U1 to U127 must be kept at 0, and no action is generated on the signal on the I2C bus.
After that, the I2C slave addresses of the other chips are set. After the NEW address is completed by the main chip (U0), when the MCU sets a NEW I2C slave address (assumed to be h 00) to U0, the output pin NEW of U0 outputs a high level (default output low level), indicating that the address setting has been completed and the default address is no longer used. And the NEW pin of U0 is connected to the PDN input pin of U1. At this time, U1 can be controlled by the I2C bus, at this moment, since the MCU does not transmit the command for changing the address, the address of U1 is still the default value h36, at this moment, the MCU is allowed to transmit a command to change the address of U1 to h02 (the transmission value must be an even number, since the D0 bit is 1, indicating that the default slave address is used), after the command is validated, the address is changed, and the NEW of U1 outputs high level. Since the NEW pin of U1 is connected to the PDN input pin of U2, the slave address of U2 can be modified. And so on, until U127.
Further, in the process of resetting and restoring the default address, when all chips are powered on again after power failure, at this time, all chips output the default I2C slave address (h 36), and the NEW outputs a low level to restore to the state of the initial default set I2C address.
Preferably, when the I2C slave address is set in the register, the register has a total of 8 configurable bits D7-D0, and D7-D1 are used for setting the I2C slave address. The D0 bit is used for function setting, when the D0 bit is set to be 0, the I2C slave addresses (D7-D1 bits) set by the register are used, and when the D0 bit is set to be 1, the default I2C addresses are used.
In practical applications, after the new I2C device addresses of all chips are set by modifying the value of the REGA, the I2C addresses of all chips need to be reset when the system is powered down. However, if the system MCU inputs a low level to the PDN pin of the chip 0, the chips 0 to 127 are sequentially turned off, and when all chips enter a low power consumption standby state, the REGA data of all chips is not changed, so that the set I2C device address is still maintained.
The PDN leg functions must be:
1. when PDN =0 is input, an I2C bus interface of the chip is closed, and the MCU cannot read and write any data to the chip through the I2C bus;
2. when PDN =0 is input, the NEW pin always outputs high, and all will be turned off successively as shown in the figure;
3. when the input PDN pin is any value, the value of any bit of the chip REGA cannot be changed, and the actual I2C equipment address of the chip is always determined by the REGA;
4. when PDN =1 is input, an I2C port of the chip is opened, and the MCU can communicate with the chip through the I2C port to read and write data;
5. when PDN =1 is input and REGA-D0 bit =0, the NEW pin outputs high, and if the NEW pin is connected to the PDN pin of the next chip, the next chip is turned on to allow I2C communication for the next chip. Once the REGA-D0 bit is set to 1, the NEW pin goes low again.
Finally, when the communication chip is implemented and designed, the default address may not be used, but the default value of the register REGA is changed to a certain value to set the default I2C address, and no matter what value is changed, the power-on default value of the REGA-D0 bit must be 1, so that the NEW pin of the chip outputs a low level in the default condition, which indicates that the address is not reconfigured, but the default I2C device address is used, and likewise, the control chain can be validated.
In the programmable control circuit structure and the control method for the I2C slave address disclosed by the invention, the mode of setting the I2C address can be set at will, and after the circuit structure disclosed by the invention is used, the default slave address value can be changed by sending an I2C instruction. In addition, on the basis of the circuit structure, only 1 default I2C address is required to be reserved generally, a plurality of pins are not required to be provided for setting by a user, and the setting and control of the I2C address can be realized through a complete software operation mode.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents or improvements made within the technical scope of the present invention should be included in the scope of the present invention.
Claims (4)
1. The control method of the I2C slave machine address programmable control circuit structure is characterized in that the I2C slave machine address programmable control circuit structure comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise a data pin M, a switch pin PDN and an output pin NEW, the switch pin PDN is used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are connected to the MCU controller through an I2C bus, the switch pin PDN of the communication chip U0 is connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pin NEW and the switch pin PDN;
the control method comprises the following steps:
step S1, setting an I2C slave address of a master chip: setting the communication chip U0 as a main chip, and sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU (microprogrammed control unit) controller, wherein at the moment, NEW pins of all the communication chips are in a default high-level state, and switch pin PDN input signals of the communication chips U1 to Un are kept at 0 bit, so that the communication chips U1 to Un do not act on signals on an I2C bus;
step S2, setting I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, so that the fact that the address setting is finished is indicated, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 can be controlled by an I2C bus at the moment, an MCU controller sends an instruction, the address of the communication chip U1 is changed into h01, after the instruction takes effect, the address of the communication chip U1 is changed, and meanwhile, the output pin NEW of the communication chip U1 outputs the high level;
s3, because an output pin NEW of the communication chip U1 is connected to a switch pin PDN of the communication chip U2, at the moment, the MCU controller can modify the address of the slave machine of the communication chip U2;
repeating the steps until all slave addresses of the communication chips U2 to Un are modified;
the method also comprises a step of setting an I2C slave address register REGA: the register REGA is provided with 8 configurable bits of D7-D0, D7-D1 is used for setting an I2C slave address, D0 is used for function setting, when the D0 bit is set to be 0, the I2C slave address set by the register is used, when the D0 bit is set to be 1, a default I2C address is used, when a NEW slave address is configured, an even number is written, so that a NEW equipment address of a communication chip can be effective, and meanwhile, NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are opposite all the time, and when PDN =0, the output level of NEW is 0 all the time;
further comprising an I2C device address holding setting step: after the communication chips U0 to Un are provided with NEW I2C device addresses, when the system is to be restarted without power loss or enters a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0 to Un are sequentially turned off to allow all of the communication chips U0 to Un to enter a low power standby state, and at this time, the REGA data of the communication chips U0 to Un are not changed, so that the I2C device addresses are still maintained at the set values;
the PDN functions of the switch pins of the communication chips U0 to Un comprise:
when the PDN of the switch pin is 0, an I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus;
when the switch pin PDN is 0, the output pin NEW always outputs a low level;
when the switch pin PDN is an arbitrary value, the value of any bit of the data of the communication chip REGA is not changed, and the actual I2C device address of the communication chip is determined by the REGA;
when the PDN is 1, the I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through the I2C bus;
when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs a high level, because the output pin NEW is connected to the switch pin PDN of one chip, the communication chip uses the I2C address set by REGA, so that the next communication chip is turned on to perform I2C communication on the next communication chip, and when the REGA-D0 bit is set to 1, the output pin NEW becomes a low level again, and the communication chip restores the default I2C address.
2. The method as claimed in claim 1, wherein in step S2, when modifying the slave address, the new value of the I2C slave address sent by the MCU controller should be even, and if the value of the I2C slave address sent by the MCU controller is changed to be odd, the communication chip does not respond and continues to use the default slave address.
3. The method for controlling an I2C slave address programmable control circuit structure according to claim 1, further comprising the steps of resetting and restoring the default address: when the communication chips U0 to Un are powered on again after power failure, the communication chips U0 to Un are all restored to the default I2C slave machine address, and meanwhile, the output pin NEW of the communication chips outputs low level and is restored to the initial address state.
4. The method as claimed in claim 1, wherein the communication chips U0-Un may not use the default address, and the default value of the register REGA is changed to a value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 no matter what value is changed, and the output pin NEW of the communication chip outputs a low level in the default condition to indicate that the address is not reconfigured, and the default I2C device address is used.
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