CN114967570A - I2C slave address programmable control circuit structure and control method - Google Patents

I2C slave address programmable control circuit structure and control method Download PDF

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CN114967570A
CN114967570A CN202210890609.5A CN202210890609A CN114967570A CN 114967570 A CN114967570 A CN 114967570A CN 202210890609 A CN202210890609 A CN 202210890609A CN 114967570 A CN114967570 A CN 114967570A
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address
pdn
communication
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CN114967570B (en
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魏亨儒
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Shenzhen Tangcheng Technology Co ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423Input/output
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24215Scada supervisory control and data acquisition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The invention discloses an I2C slave address programmable control circuit structure and a control method, which comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are connected with the MCU controller through I2C buses, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, and can realize the I2C address control only by software, thereby better meeting the application requirement.

Description

I2C slave address programmable control circuit structure and control method
Technical Field
The invention relates to an I2C bus circuit, in particular to an I2C slave address programmable control circuit structure and a control method.
Background
In the prior art, the I2C communication is a relatively common communication control protocol. If a plurality of ICs are used on a bus at the same time, the device has a function of setting the address by a user, for example, the I2C address of one chip is 1010ABC, A, B, C is a custom address value of the chip, the I2C slave addresses of the chip can be set to 8 different values altogether, and 8 ICs can be used on the same bus altogether. To support a custom I2C address, a corresponding pin must be provided to allow the user to decide the address value at his or her discretion, and is typically done by a hardware designer. Therefore, the conventional I2C communication mode cannot realize arbitrary setting of the I2C address, and is not beneficial to circuit design and application.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a programmable control circuit structure and a control method for I2C slave addresses, which can arbitrarily set an I2C address, change a default slave address by sending an I2C command, and realize I2C address control through software, in order to overcome the shortcomings of the prior art.
In order to solve the technical problems, the invention adopts the following technical scheme.
An I2C slave address programmable control circuit structure comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are all connected with the MCU controller through an I2C bus, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN.
Preferably, the maximum value of n in the communication chips U0-Un is 127.
Preferably, when the switch pin PDN input is low, the communication chip is in an off state and is not allowed to be written or read by the I2C bus; when the switch pin PDN inputs high, the communication chip is in an active state, allowing data to be written or read by the I2C bus.
A control method of an I2C slave address programmable control circuit structure comprises the following steps: step S1, set the I2C slave address of the master chip: setting the communication chip U0 as a main chip, sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU controller, wherein at the moment, NEW pins of all the communication chips are in a default high-level state, and the PDN input signals of the switch pins of the communication chips U1 to Un are kept at 0 bit, so that the communication chips U1 to Un do not act on signals on an I2C bus; step S2, set I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, thereby indicating that the address setting is completed, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 at this time can be controlled by the I2C bus, and then the MCU controller sends an instruction to change the address of the communication chip U1 to h01, after the instruction takes effect, the address of the communication chip U1 is changed, and at the same time, the output pin NEW of the communication chip U1 outputs a high level; step S3, since the output pin NEW of the communication chip U1 is connected to the switch pin PDN of the communication chip U2, at this time, the MCU controller may modify the slave address of the communication chip U2; and repeating the steps until all the slave addresses of the communication chips U2-Un are modified.
Preferably, in step S2, when the slave address is modified, the new value of the I2C slave address sent by the MCU controller should be an even number, and if the value of the I2C slave address is changed to an odd number by the MCU controller, the communication chip does not respond and continues to use the default slave address.
Preferably, the method further comprises the steps of resetting and restoring the default address: when the communication chips U0-Un are powered on again after power failure, all the communication chips U0-Un are restored to the default I2C slave addresses, and meanwhile, the output pins NEW of the communication chips output low levels to be restored to the initial address state.
Preferably, the method further comprises a step of setting the I2C slave address register REGA: the register REGA is provided with 8 configurable bits of D7-D0, D7-D1 are used for setting an I2C slave address, D0 is used for setting a function, when a D0 bit is set to be 0, the I2C slave address (D7-D1 bits) set by the register is used, when a D0 bit is set to be 1, a default I2C address is used, when a NEW slave address is configured, an even number is written, so that a NEW device address of a communication chip is effective, and NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are opposite, and when PDN =0, the output level of NEW is always 0.
Preferably, the method further comprises the step of setting the address of the I2C device: after the communication chips U0-Un are set with NEW I2C device addresses, when the system is to be restarted without power loss or enter a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0-Un are sequentially turned off, and all of the communication chips U0-Un enter a low power standby state, at this time, the REGA data of the communication chips U0-Un are not changed, and therefore the I2C device addresses are still maintained at the set values.
Preferably, the PDN functions of the communication chip U0 to the switch pin of the communication chip Un include: when the PDN of the switch pin is 0, the I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus; when the switch pin PDN is 0, the output pin NEW always outputs a low level; when the switch pin PDN is an arbitrary value, the value of any bit of the REGA data of the communication chip is not changed, and the actual I2C device address of the communication chip is determined by the REGA; when the switch pin PDN is 1, the I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through the I2C bus; when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs high level, because the output NEW is connected with the switch pin PDN of one chip, the communication chip uses the I2C address set by the REGA (D7-D1), so that the next communication chip is started to perform I2C communication, when the REGA-D0 bit is set to 1, the output NEW is changed to low level again, and the communication chip restores the default I2C address.
Preferably, the communication chips U0-Un may not use the default address, but change the default value of the register REGA to a value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 regardless of any value, and the output pin NEW of the communication chip outputs a low level in the default condition to indicate that the address is not reconfigured, but uses the default I2C device address.
The I2C slave address programmable control circuit structure disclosed by the invention can realize the control of the most I2C slave equipment by using fewer pins, the I2C slave address can realize the operation by complete software without excessive intervention of hardware, each communication chip can be realized by only 4 pins, and the output of an MCU controller only needs 3 pins. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, and can realize the I2C address control only by software, thereby better meeting the application requirement.
Drawings
FIG. 1 is a circuit block diagram of a programmable control circuit structure of I2C slave address according to the present invention;
FIG. 2 is a circuit block diagram of a programmable control circuit structure of the slave address of I2C according to another application scenario of the present invention;
FIG. 3 is a diagram illustrating a register structure;
FIG. 4 is a circuit diagram of a pull-up resistor connected to a register.
Detailed Description
The invention is described in more detail below with reference to the figures and examples.
The invention discloses an I2C slave address programmable control circuit structure, please refer to fig. 1, which comprises an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the start-stop state of the communication chips, the data pins M of the communication chips U0-Un are all connected with the MCU controller through an I2C bus, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN. Among the communication chips U0 to Un, the maximum value of n is 127, that is, the maximum number of communication chips is 128.
Regarding the setting of the switch pin PDN, in the present invention, when the switch pin PDN inputs a low level, the communication chip is in an off state, and data is not allowed to be written or read by the I2C bus; when the switch pin PDN inputs high, the communication chip is in an active state, allowing data to be written or read by the I2C bus.
The I2C slave address programmable control circuit structure disclosed by the invention can realize the control of the most I2C slave equipment by using fewer pins, the I2C slave address can realize the operation by complete software without excessive intervention of hardware, each communication chip can be realized by only 4 pins, and the output of an MCU controller only needs 3 pins. Compared with the prior art, the invention can arbitrarily set the I2C address, can change the default slave address by sending the I2C instruction, and can realize the I2C address control only by software, thereby better meeting the application requirement.
On the basis of the I2C slave address programmable control circuit structure, the invention also discloses a control method, which comprises the following steps:
step S1, set the I2C slave address of the master chip: setting the communication chip U0 as a main chip, sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU controller, and simultaneously keeping the switch pin PDN input signals of the communication chip U1-communication chip Un at 0 bit to enable the communication chip U1-communication chip Un not to act on the signal on the I2C bus;
step S2, set I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, thereby indicating that the address setting is completed, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 at this time can be controlled by the I2C bus, and then the MCU controller sends an instruction to change the address of the communication chip U1 to h02, after the instruction takes effect, the address of the communication chip U1 is changed, and at the same time, the output pin NEW of the communication chip U1 outputs a high level;
step S3, since the output pin NEW of the communication chip U1 is connected to the switch pin PDN of the communication chip U2, at this time, the MCU controller may modify the slave address of the communication chip U2;
and repeating the steps until all slave addresses of the communication chips U2-Un are modified.
In the above step S2, when the slave address is modified, the new value of the I2C slave address sent by the MCU controller should be an even number, and if the value of the I2C slave address is changed to an odd number by the MCU controller, the communication chip does not respond and continues to use the default slave address.
Specifically, when modifying the slave address, the data value of the change address sent to the communication chip by the MCU controller must be an even number, i.e., the D0 bit of the REGA is 0. If an odd number is sent, i.e. the D0 bit of the REGA is 1, this indicates that the default slave address is used.
In addition, the invention also includes the steps of resetting and restoring the default address: when the communication chips U0-Un are powered on again after power failure, all the communication chips U0-Un are restored to the default I2C slave addresses, and meanwhile, the output pin NEW of the communication chips outputs low level and is restored to the initial address state.
On the basis, the invention also comprises a step of setting the slave address register REGA by I2C: the register REGA is provided with 8 configurable bits of D7-D0, D7-D1 are used for setting an I2C slave address, D0 is used for setting a function, when a D0 bit is set to be 0, the I2C slave address (D7-D1 bits) set by the register is used, when a D0 bit is set to be 1, a default I2C address is used, when a NEW slave address is configured, an even number is written, so that a NEW device address of a communication chip is effective, and NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are opposite, and when PDN =0, the output level of NEW is always 0.
The invention also comprises an I2C equipment address holding setting step: after the communication chips U0-Un are set with NEW I2C device addresses, when the system is to be restarted without power loss or enter a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0-Un are sequentially turned off, and all of the communication chips U0-Un enter a low power standby state, at this time, the REGA data of the communication chips U0-Un are not changed, and therefore the I2C device addresses are still maintained at the set values.
In practical application, the PDN functions of the switch pins of the communication chips U0 to Un include:
when the PDN of the switch pin is 0, the I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus;
when the switch pin PDN is 0, the output pin NEW always outputs a low level;
when the switch pin PDN is an arbitrary value, the value of any bit of the REGA data of the communication chip is not changed, and the actual I2C device address of the communication chip is determined by the REGA;
when the switch pin PDN is 1, the I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through the I2C bus;
when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs high level, because the output NEW is connected with the switch pin PDN of one chip, the communication chip uses the I2C address set by the REGA (D7-D1), so that the next communication chip is started to perform I2C communication, when the REGA-D0 bit is set to 1, the output NEW is changed to low level again, and the communication chip restores the default I2C address.
Preferably, the communication chips U0-Un may not use the default address, but change the default value of the register REGA to a value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 regardless of the default value, and the NEW output pin of the communication chip outputs a low level by default, indicating that the address is not reconfigured, and uses the default I2C device address.
The I2C slave address programmable control circuit structure disclosed by the invention can be realized by sequentially connecting a plurality of communication chips in series, and in practical application, the circuit structure shown in figure 2 can be adopted to realize individual control, and under the condition, at most 2 communication chips are adopted.
The invention discloses a programmable control circuit structure of I2C slave addresses and a control method thereof, and the circuit structure and the working principle thereof under the practical application scene can refer to the following embodiments.
Example one
In the present embodiment, please refer to fig. 1 to 4, the default I2C address of the chip a is set to h36 (16-ary value, corresponding binary value is 0110110), wherein the chip has 3 pins, ABC, which can be used to set the slave address, and the settable address binary value is 0110ABC, so that a total of 8I 2C slave addresses can be set. A total of 8 chips a can be used on the bus to communicate without interference.
The chip B adopts an I2C address mode which can be set by a user, a 1byte register is built inside the chip B and used for storing the I2C slave addresses of the chip (D7-D1 bits are valid, and the D0 indicates that the default address is used when writing 1 and indicates that the address set by the register is used when writing 0). In this way, theoretically, a maximum of 128 chips can be connected in parallel to the same I2C bus, address setting can be performed on each chip in turn, and after the setting is completed, the chips will operate under the new I2C address, so that theoretically, a maximum of 128 chips can be connected in parallel to the same I2C bus because the 128 chips are reset with different device addresses.
First, since it is theoretically supported that up to 128 chips use the same I2C bus, but before setting the address, the chips have the same device address (assuming the default value h 36), such chips must have a PDN switch pin control, which can control the I2C bus switch or the chip to turn off completely. When the PDN input is low level, the chip is in a closed state and does not affect data operation on I2C. When the PDN input is high, it may be written by I2C.
Second, the I2C slave address of the master chip is set. The 128 chips must have a default main chip (marked as U0), at this time, the MCU sends PDN signals to be directly connected to the main chip (U0), when the MCU outputs PDN =1, writing can be carried out on U0, at this time, PDN input signals of U1-U127 must be kept at 0, and signals on an I2C bus are not acted.
Thereafter, the I2C slave addresses of the other chips are set. After the master chip (U0) completes the NEW address, when the MCU sets a NEW I2C slave address to U0 (assumed to be h 00), the NEW output pin of U0 outputs a high level (default output low level) indicating that the address setting has been completed and the default address is no longer used. And the NEW pin of U0 is connected to the PDN input pin of U1. At this time, the U1 can be controlled by the I2C bus, and at this moment, since the MCU does not send the command for changing the address, the address of U1 remains as the default value h36, at this moment, the MCU is allowed to send a command to change the address of U1 to h02 (the sending value must be even, since the D0 bit is 1, indicating that the default slave address is used), after the command is validated, the address is changed, and the NEW of U1 outputs high level. Since the NEW pin of U1 is connected to the PDN input pin of U2, the slave address of U2 can be modified. And so on, until U127 is modified.
Further, in the process of resetting and restoring the default address, when all chips are powered on again after being powered off, all chips default I2C slave addresses (h 36) at this time, and the NEW outputs low level to restore to the state of the initial default set I2C address.
Preferably, when the I2C slave address sets the register, the register has a total of 8 configurable bits D7-D0, and D7-D1 are used to set the I2C slave address. The D0 bit is used for function setting, when the D0 bit is set to 0, the I2C slave address (D7-D1 bit) set by the register is used, and when the D0 bit is set to 1, the default I2C address is used.
In practical applications, after the new I2C device addresses of all chips are set by modifying the value of the REGA, the I2C addresses of all chips need to be reset when the system is powered down. However, if the system MCU inputs a low level to the PDN pin of the chip 0, the chips 0 to 127 are sequentially turned off, and when all chips enter a low power standby state, the REGA data of all chips is not changed at this time, and thus the set I2C device address is still maintained.
The PDN leg functions must be:
1. when PDN =0 is input, the I2C bus interface of the chip is closed, and the MCU cannot read and write any data to the chip through the I2C bus;
2. when PDN =0 is input, the NEW pin always outputs high, and all will be turned off successively as shown in the figure;
3. when the input PDN pin is an arbitrary value, the value of any bit of the chip REGA is not changed, and the actual I2C device address of the chip is always determined by the REGA;
4. when PDN =1 is input, an I2C port of the chip is opened, and the MCU can communicate with the chip through I2C to read and write data;
5. when PDN =1 is input and REGA-D0 bit =0, the NEW pin outputs high, and if the NEW pin is connected to the PDN pin of the next chip, the next chip is turned on to allow I2C communication for the next chip. Once the REGA-D0 bit is set to 1, the NEW pin goes low again.
Finally, the communication chip may be implemented and designed without using the default address, but instead changing the default value of the register REGA to a value to set the default I2C address, and whatever value is changed, the power-on default value of the REGA-D0 bit must be 1, so that the NEW pin of the chip outputs a low level by default, indicating that the address is not reconfigured, but instead uses the default I2C device address, and likewise, the control chain can take effect.
In the programmable control circuit structure and the control method of the I2C slave address disclosed by the invention, the mode of the I2C address can be set arbitrarily, and after the circuit structure disclosed by the invention is used, the default slave address value can be changed by sending an I2C instruction. In addition, on the basis of the circuit structure, only 1 default I2C address is required to be reserved, a plurality of pins are not required to be provided for setting by a user, and setting and control of the I2C address can be realized through a full software operation mode.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents or improvements made within the technical scope of the present invention should be included in the scope of the present invention.

Claims (10)

1. The I2C slave address programmable control circuit structure is characterized by comprising an MCU controller and communication chips U0-Un, wherein the communication chips U0-Un comprise data pins M, switch pins PDN and output pins NEW, the switch pins PDN are used for controlling the starting and stopping states of the communication chips, the data pins M of the communication chips U0-Un are connected with the MCU controller through an I2C bus, the switch pins PDN of the communication chips U0 are connected with the MCU controller, and the communication chips U0-Un are sequentially connected in series through the output pins NEW and the switch pins PDN.
2. The I2C slave address programmable control circuit structure of claim 1, wherein the maximum value of n in the communication chips U0-Un is 127.
3. The I2C slave address programmable control circuit structure of claim 1, wherein when switch pin PDN input is low, the communication chip is in off state, not allowing data to be written or read by I2C bus; when the switch pin PDN inputs high, the communication chip is in an active state, allowing data to be written or read by the I2C bus.
4. A method for controlling an I2C slave address programmable control circuit structure according to claim 1, comprising the steps of:
step S1, set the I2C slave address of the master chip: setting the communication chip U0 as a main chip, sending a high-level signal to a switch pin PDN of the communication chip U0 by an MCU controller, wherein at the moment, NEW pins of all the communication chips are in a default high-level state, and the PDN input signals of the switch pins of the communication chips U1 to Un are kept at 0 bit, so that the communication chips U1 to Un do not act on signals on an I2C bus;
step S2, set I2C slave addresses of other communication chips: after the NEW address is set by the communication chip U0, the output pin NEW of the communication chip U0 outputs a high level, thereby indicating that the address setting is completed, because the NEW pin of the communication chip U0 is connected to the switch pin PDN of the communication chip U1, the communication chip U1 at this time can be controlled by the I2C bus, and then the MCU controller sends an instruction to change the address of the communication chip U1 to h01, after the instruction takes effect, the address of the communication chip U1 is changed, and at the same time, the output pin NEW of the communication chip U1 outputs a high level;
step S3, since the output pin NEW of the communication chip U1 is connected to the switch pin PDN of the communication chip U2, at this time, the MCU controller may modify the slave address of the communication chip U2;
and repeating the steps until all slave addresses of the communication chips U2-Un are modified.
5. The method as claimed in claim 4, wherein in step S2, when the slave address is modified, the new value of the I2C slave address sent by the MCU controller should be even, if the MCU controller sends a value for changing the I2C slave address to be odd, the communication chip does not respond and continues to use the default slave address.
6. The method for controlling the I2C slave address programmable control circuit structure according to claim 4, further comprising the steps of resetting and restoring the default address: when the communication chips U0-Un are powered on again after power failure, all the communication chips U0-Un are restored to the default I2C slave addresses, and meanwhile, the output pin NEW of the communication chips outputs low level and is restored to the initial address state.
7. The method for controlling the I2C slave address programmable control circuit structure of claim 4, further comprising the I2C slave address register REGA setting step of: the register REGA is provided with 8 configurable bits of D7-D0, D7-D1 are used for setting an I2C slave address, D0 is used for setting a function, when a D0 bit is set to be 0, the I2C slave address (D7-D1 bits) set by the register is used, when a D0 bit is set to be 1, a default I2C address is used, when a NEW slave address is configured, an even number is written, so that a NEW device address of a communication chip is effective, and NEW outputs a high level, therefore, when PDN =1, the value of the D0 bit and the output level of NEW are opposite, and when PDN =0, the output level of NEW is always 0.
8. The method for controlling the I2C slave address programmable control circuit structure according to claim 4, further comprising the I2C device address hold setting step of: after the communication chips U0-Un are set with NEW I2C device addresses, when the system is to be restarted without power loss or enter a standby state, the MCU controller needs to input a low level to the switch pin PDN of the communication chip U0, so that the NEW of the communication chip U0 also becomes a low level, and the communication chips U0-Un are sequentially turned off, and all of the communication chips U0-Un enter a low power standby state, at this time, the REGA data of the communication chips U0-Un are not changed, and therefore the I2C device addresses are still maintained at the set values.
9. The method for controlling the I2C slave address programmable control circuit structure according to claim 8, wherein the switch pin PDN function of the communication chip U0-communication chip Un includes:
when the PDN of the switch pin is 0, the I2C bus interface of the communication chip is closed, and the MCU cannot read and write any data to the communication chip through the I2C bus;
when the PDN is 0, the NEW always outputs low level;
when the switch pin PDN is an arbitrary value, the value of any bit of the REGA data of the communication chip is not changed, and the actual I2C device address of the communication chip is determined by the REGA;
when the switch pin PDN is 1, the I2C data pin of the communication chip is opened, and the MCU controller can read and write data to the communication chip through the I2C bus;
when the switch pin PDN is 1 and the REGA-D0 bit =0, the output NEW pin outputs high level, because the output NEW is connected with the switch pin PDN of one chip, the communication chip uses the I2C address set by the REGA (D7-D1), so that the next communication chip is started to perform I2C communication, when the REGA-D0 bit is set to 1, the output NEW is changed to low level again, and the communication chip restores the default I2C address.
10. The method as claimed in claim 4, wherein the communication chips U0-Un may use no default address, and the default value of the register REGA is changed to a value to set the default I2C address, and the power-on default value of the REGA-D0 bit is 1 no matter what value is changed, when the output pin NEW of the communication chip outputs low level in default condition to indicate that the address is not reconfigured and the default I2C device address is used.
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