CN114944382A - 半导体装置和制造半导体装置的方法 - Google Patents

半导体装置和制造半导体装置的方法 Download PDF

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CN114944382A
CN114944382A CN202210131922.0A CN202210131922A CN114944382A CN 114944382 A CN114944382 A CN 114944382A CN 202210131922 A CN202210131922 A CN 202210131922A CN 114944382 A CN114944382 A CN 114944382A
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semiconductor device
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里卡多·杨多克
迪尔德·乔杜里
伊利亚斯·德查尔
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Abstract

本发明涉及一种半导体装置，包括MOSFET管芯、第一GaN管芯和第二GaN管芯。第一GaN管芯和第二GaN管芯以级联方式布置。第二GaN管芯的位置设置成倒置取向。该MOSFET管芯控制该第一GaN管芯和该第二GaN管芯。

Description

半导体装置和制造半导体装置的方法
技术领域
本发明涉及一种半导体装置，该半导体装置包括以级联构造的一个MOSFET管芯和两个GaN管芯。本发明还涉及一种制造半导体装置的方法。
背景技术
本领域中已知GaN技术，特别是硅上GaN HEMT(GaN-on-Silicon HEMT)技术在过去几年中已经变得非常令人感兴趣。GaN技术可以用于需要大功率性能和高频切换的应用。GaN技术是未来大功率以及高频应用的乐观申请者，未来功率高频应用前景广阔。。特别地，在Si衬底上生长的GaN高电子迁移率晶体管(HEMT)适合于高频和大功率切换的应用。
考虑到GaN HEMT装置的物理和电学性质，存在一个明显的挑战。GaN HEMT的自然操作模式是作为具有自然接通(“ON”)的状态的损耗模式FET。GaN HEMT与装置的自然断开(“OFF”)的状态的老式装置不同。从安全的角度看，使用“OFF”的装置也是有益的。因此，需要GaN HEMT的自然状态附近的工作来自然地实现装置的“OFF”操作。目前，存在两种解决该挑战的主要方法。一种是改变装置的结构以在增强模式(或E模式)下操作。第二种是图1a所示的堆叠的管芯级联封装装置，该装置具有与自然“ON”的GaN HEMT装置10串联设置的自然“OFF”的低电压低RDSon硅MOSFET 12。图1a所示的装置是本领域已知的单个级联电路的示例。
图1b示出了本领域已知的另一种装置。在这种情况下，使用单个FET18来控制两个HEMT装置，即第一HEMT装置14和第二HEMT装置16。还应注意，本领域技术人员可以使用单个FET来控制两个或多个HEMT装置。
通常，使用GaN表面安装封装代替传统的通孔封装的目的是减小封装电阻、寄生电感以及产品装置的尺寸。使用GaN表面安装封装也有助于增加功率密度。
此外，使用铜(Cu)夹片互连设计的GaN封装是有益的，因为这在较小的覆盖区域上改善了封装电阻和电感。
如上所述的半导体装置的缺点在于，对于并联布局的多个快速切换封装装置，很难实现稳定的性能。
发明内容
各种示例性实施例针对如上所述的缺点和/或从以下公开内容中可以变得明显的其它缺点。
根据本发明的实施例，半导体装置包括MOSFET管芯、第一GaN管芯和第二GaN管芯。第一GaN管芯和第二GaN管芯以级联构造(cascode arrangement)来布置。在这种构造中，第一GaN管芯以正常/非倒置取向布置。第二GaN管芯以倒置取向布置。
MOSFET管芯控制第一GaN管芯和第二GaN管芯。
半导体装置还可以包括具有通过系杆连接的两个独立部分的第一夹片。第一夹片的第一部分位于第一GaN管芯的源极焊垫上。第一夹片的连接到第一GaN管芯的源极焊垫的第一部分作为MOSFET的管芯焊盘，而第一夹片的第二部分是第一GaN管芯的漏极连接端。
半导体装置还可以包括具有支柱的第二和公共附接夹片。第二附接夹片位于第二GaN管芯上，以使第一GaN管芯和第二GaN管芯两者的栅极与MOSFET管芯的源极连接。
附接在第一夹片/管芯焊盘上的MOSFET的漏极与第一GaN管芯和第二GaN管芯两者的公共源极端子连接。
第二GaN管芯的漏极同样使用公共端子，该公共端子延伸到封装的外部，形成鸥翼引线。
如上述实施例中的半导体装置也可以由技术人员利用底部冷却或利用双重冷却来实现。
本发明还涉及一种制造半导体装置的方法。该方法包括以下步骤：
--在半导体装置的管芯焊垫上，印刷/沉积第一焊料或粘合剂并附接第一GaN管芯，
--在第一GaN管芯的漏极焊垫和源极焊垫上印刷/沉积第二焊料或粘合剂，
--在第一GaN管芯的顶部上附接具有系杆的第一两部分夹片，
--在所述第一两部分夹片上，印刷/沉积第三焊料或粘合剂，
--附接MOSFET管芯，
--以倒置/翻转取向附接第二GaN管芯，
--在MOSFET管芯和所述第二GaN管芯的顶部上，印刷/沉积第四焊料或粘合剂，
--在MOSFET管芯和所述第二GaN管芯的顶部上，附接具有支柱的第二夹片，以使第一GaN管芯的栅极和第二GaN管芯的栅极两者与MOSFET管芯的源极连接，以及
--为MOSFET管芯附接栅极夹片或诸如导线或带的任何连接，以完成电路。
此外，该方法可以包括在半导体装置的制造中常见的其他步骤：
--模制，
--除飞边，
--电镀，
--除毛刺，
--成形，
--切割外部系杆，以及
--切单(singulation)。
根据上述实施例的半导体装置，其中第一GaN管芯和第二GaN管芯堆叠布置，确保了非常稳定的性能。与其中第一GaN管芯和第二GaN管芯以平行方式布置的已知半导体装置相比，堆叠布置的性能好得多。
第一GaN管芯和第二GaN管芯堆叠的这种布置确保了装置的更一致的性能，特别是低封装电阻和低寄生电感。而且，半导体装置的尺寸显著减小，使得本发明非常节省成本。
此外，本发明描述了一种允许封装/半导体装置的非常好的热控制的创造性布置/布局。
附图说明
为了能够详细地理解本发明公开的特征，详见实施例中更具体的描述，其中一些描述结合附图示出。然而，应当注意，附图仅示出了典型的实施例，因此不应被认为是对本发明的范围的限制。附图是为了便于理解本发明公开，因此不一定按比例绘制。在结合附图阅读本说明书之后，所要求保护的主题的优点对于本领域技术人员将变得显而易见。在附图中，相同的附图标记用于表示相同的元件，并且其中：
图1a和1b示出了已知的半导体装置；
图2示出了根据本发明实施例的半导体装置；
图3示出了根据本发明实施例的制造半导体装置的方法。
具体实施方式
图2示出了本发明的实施例。半导体装置封装100包括金属氧化物半导体场效应晶体管(MOSFET)管芯102和两个GaN管芯104和106，即，第一GaN管芯104和第二GaN管芯106。第一GaN管芯104和第二GaN管芯106以级联形式布置(即堆叠)。MOSFET管芯102布置成驱动或开关第一GaN管芯104和第二GaN管芯106两者。MOSFET管芯也可以是FET管芯。第一GaN管芯可以是第一HEMT管芯。第二GaN管芯可以是第二HEMT管芯。
半导体装置100内的这种布置，其中第一GaN管芯104和第二GaN管芯106堆叠，确保了半导体的尺寸显著减小并且还具有更好的电气性能。
在本发明的实施例中，第一GaN管芯104以正常取向即通常取向定位，其中第一GaN管芯104的漏极和源极在半导体装置100内指向上。第二GaN管芯106以倒置的取向定位，其中第二GaN管芯106的漏极和源极在半导体装置100内指向下。
由系杆(图中未示出)组合的第一两部分夹片108和105用在第一GaN104的顶部上。第一部分成为MOSFET管芯102的管芯焊盘105，而第二部分将是第一GaN管芯104和第二GaN管芯106的公共漏极夹片108。在第二GaN管芯106的顶部使用具有支柱107的第二附接夹片，以使第一GaN管芯104和第二GaN管芯106的栅极与MOSFET管芯102的源极连接。
此外，MOSFET管芯附接在管芯焊盘105上，作为MOSFET管芯的漏极，焊盘105与第一GaN管芯104和第二GaN管芯106两者的公共源极端子连接。第二GaN管芯的漏极也使用公共端子，该公共端子延伸到半导体装置的外部，以这种方式形成鸥翼引线，从而显著地改善了相应的板级可靠性性能。
根据本发明的实施例，上述半导体装置可以用于图2所示的底部冷却封装120和双冷却封装122。
根据本发明的实施例，公开了一种制造半导体装置的方法。该半导体装置包括堆叠在半导体装置内的MOSFET管芯、第一GaN管芯和第二GaN管芯。图3中说明了该方法。
该方法包括：
--图3中的附图标记200：
在半导体装置的管芯焊垫230上，印刷或沉积第一焊料或第一粘合剂并附接第一GaN管芯222，
在第一GaN管芯222的漏极焊垫上和源极焊垫上印刷或沉积第二焊料或第二粘合剂234；
--图3中的附图标记202：
在第一GaN管芯222的源极和漏极上附接通过系杆233集成的第一两部分夹片232；
图3中的附图标记204：
附接MOSFET管芯220，
沿倒置取向附接第二GaN管芯224(其中源极和漏极可焊接焊垫未在图3中示出)，
在MOSFET管芯220和第二GaN管芯224的顶部，印刷或沉积第三焊料或第三粘合剂236；
--图3中的附图标记206：
在MOSFET管芯220的顶部暴露表面和第二GaN管芯224的暴露表面上附接具有支柱238的第二夹片，以将第一GaN管芯222的栅极和第二GaN管芯224的栅极两者与MOSFET管芯220的源极连接，
在MOSFET的栅极上朝向栅极焊垫240处附接第三夹片239或进行任何方式的互连(例如导线或带)，以完成装置电路；
--图3中的附图标记208：
模制，
除飞边，
电镀；
--图3中的附图标记210：
坝条切割(dambar cutting)，
除毛刺，
成形；
--图3中的附图标记212：
切割外部系杆，以及
切单(singulation)。
根据本发明的实施方案，如上所述，第一GaN管芯和第二GaN管芯的漏极和源极两者通过具有外部系杆的两部分夹片连接。通过切割外部系杆，断开第一GaN管芯和第二GaN管芯的源极端子和漏极端子。
与第一GaN管芯和第二GaN管芯以平行方式布置的已知半导体装置相比，本实施例提供的第一GaN管芯和第二GaN管芯以堆叠的方式布置的半导体装置确保了非常稳定的性能。
通常，通过增大GaN管芯尺寸可以实现减小漏源导通电阻(RDSon)。然而，制造的GaN管芯太大会引入对例如扩展电阻、管芯纵横比、成品率、组装可靠性等的限制。
通过本发明的实施例中描述的半导体装置完全解决了该问题。用单个MOSFET管芯控制多个GaN管芯的夹片接合GaN封装是有利的，原因如下：
--通过使用多个且平行的GaN管芯可以切换得到更多的功率：
低寄生电感、低开关损耗，以及
低导通电阻(RDSon)，低传导损耗。
仅使用一个大的MOSFET管芯确保了所有GaN管芯同时切换。
这种创新的布置/布局使封装/半导体装置具有非常好的热控制。
大的MOSFET管芯可以设置为底部冷却封装/半导体装置，或者双侧冷却封装/半导体装置。
另外，第一GaN管芯和第二GaN管芯处于级联布置能够使印刷电路板节省空间，这使得本发明也非常节省成本。
本发明并不限于上述实施例。本发明涵盖所有类似的实施例和上述实施例的明显变型。本发明的一些应用包括：GaN封装、夹片接合封装、功率半导体封装等
本发明的特定和优选方面在所附独立权利要求中进行了阐述。从属权利要求和/或独立权利要求的特征的组合可以适当地组合，而不仅仅是如权利要求中所阐述的。
本发明公开的范围包括其中明确地或隐含地公开的任何新颖性特征或特征的组合或其任何概括，而不管其是否涉及所要求保护的发明或减轻本发明解决的任何或所有问题。申请人特此声明，在本申请或从其导出的任何这种进一步申请的审查期间，可以针对这些特征提出新的权利要求。特别地，参考所附权利要求，来自从属权利要求的特征可以与独立权利要求的特征组合，并且来自各个独立权利要求的特征可以以任何适当的方式组合，而不仅仅是在权利要求中列举的特定组合。
在单独实施例的上下文中描述的特征也可以在单个实施例中组合提供。相反，为了简洁起见，在单个实施例的上下文中描述的各种特征也可以单独地或以任何合适的子组合提供。
术语“包括”不排除其它元件或步骤，术语“一”或“一个”不排除多个。权利要求中的附图标记不应被解释为限制权利要求的范围。

Claims (10)

1.一种半导体装置，包括：
--MOSFET管芯，
--第一GaN管芯和第二GaN管芯，其中所述第一GaN管芯和所述第二GaN管芯以级联方式布置，其中所述第二GaN管芯的位置设置成倒置取向，
--其中所述MOSFET管芯控制所述第一GaN管芯和所述第二GaN管芯。
2.根据权利要求1所述的半导体装置，其中所述半导体装置还包括第一附接夹片，所述第一附接夹片包括由系杆连接的两个部分。
3.根据权利要求2所述的半导体装置，其中第一附接夹片位于第一GaN管芯和第二GaN管芯之间，并且其中第一附接夹片是第一GaN管芯和第二GaN管芯的公共源极夹片和公共漏极夹片。
4.根据权利要求3所述的半导体装置，其中所述漏极夹片朝向所述半导体装置的外部延伸，以便形成外部引线。
5.根据前述权利要求中任一项所述的半导体装置，其中所述半导体装置还包括具有支柱的第二夹片，所述第二夹片位于所述第二GaN管芯的顶部，以使所述第一GaN管芯和所述第二GaN管芯两者的栅极与所述MOSFET管芯的源极连接。
6.根据前述权利要求中任一项所述的半导体装置，其中所述MOSFET管芯作为MOSFET管芯漏极附接在管芯的焊盘上，其中所述MOSFET管芯漏极与所述第一GaN管芯和所述第二GaN管芯两者的公共源极端子连接。
7.根据权利要求6所述的半导体装置，其中所述第二GaN管芯的漏极也与延伸到所述半导体装置外部的所述公共漏极端子连接，以形成鸥翼形引线。
8.根据前述权利要求中任一项所述的半导体装置，其中，所述半导体装置包括底部实现的冷却或双重实现的冷却。
9.一种制造半导体装置的方法，所述方法包括以下步骤：
--在半导体装置的管芯焊垫上印刷或沉积第一焊料或粘合剂并附接第一GaN管芯，
--在所述第一GaN管芯的漏极焊垫上和源极焊垫上印刷或沉积第二焊料或粘合剂，
--在所述第一GaN管芯的顶部附接具有系杆的第一两部分夹片，
--在所述第一两部分夹片上印刷或沉积第三焊料或粘合剂，
--附接MOSFET管芯，
--以倒置/翻转的取向附接第二GaN管芯，
--在所述MOSFET管芯和所述第二GaN管芯的顶部印刷或沉积第四焊料或粘合剂，
--在所述MOSFET管芯和所述第二GaN管芯的顶部附接具有支柱的第二夹片，以使所述第一GaN管芯的栅极和所述第二GaN管芯的栅极两者与所述MOSFET管芯的源极连接，以及
--在所述MOSFET栅极上朝向栅极焊垫附接第三夹片或如导线或带的任何连接件。
10.如权利要求7所述的制造半导体装置的方法，其中所述方法还包括步骤：
--模制，
--除飞边，
--电镀，
--除毛刺，
--成形，
--切割外部系杆，以及
--切单。
CN202210131922.0A 2021-02-16 2022-02-14 半导体装置和制造半导体装置的方法 Pending CN114944382A (zh)

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