CN114937675A - Image sensor and method for manufacturing the same - Google Patents
Image sensor and method for manufacturing the same Download PDFInfo
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- CN114937675A CN114937675A CN202210613400.4A CN202210613400A CN114937675A CN 114937675 A CN114937675 A CN 114937675A CN 202210613400 A CN202210613400 A CN 202210613400A CN 114937675 A CN114937675 A CN 114937675A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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Abstract
The invention provides an image sensor and a manufacturing method thereof. Wherein the method comprises the following steps: providing a substrate, wherein the substrate comprises a pixel area and a logic area; forming a gate material layer, wherein the gate material layer covers the surfaces of the pixel region and the logic region; forming a patterned photoresist layer, wherein the patterned photoresist layer shields the logic region and exposes the gate material layer positioned in the pixel region; and performing an ion implantation process to dope an adsorption material in the exposed gate material layer. Therefore, the adsorption material is doped into the grid material layer of the pixel region, so that the metal ions in the pixel region are adsorbed by utilizing the adsorbability of the adsorption material, the problem of white pixels caused by diffusion of the metal ions is solved, and the pixel performance and the imaging quality are improved. Meanwhile, the ion implantation process has no influence on the circuit structure of the logic area, a new mask is not needed, and the process operation is simple.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an image sensor and a preparation method thereof.
Background
An image sensor is a semiconductor device that converts an optical signal into an electrical signal. Depending on the principle used, they can be classified into Charge-Coupled Device (CCD) image sensors and Complementary Metal Oxide Semiconductor (CMOS) image sensors. The CMOS image sensor can be classified into a Front Side Illumination (FSI) image sensor and a Back Side Illumination (BSI) image sensor according to the incident light.
In the back-illuminated image sensor, light is directly irradiated to the photodiode from the back of the substrate without passing through a logic circuit, so that the light receiving efficiency is improved, and the imaging effect is greatly improved. However, due to various factors such as raw material variation, process fluctuation, impurity ion contamination, etc., the back-illuminated image sensor is prone to White Pixel (WP) problems. Under normal conditions, no light is incident on the pixel unit, and the dark current generated by the pixel unit is small. However, when there is metal impurity contamination, the pixel unit itself generates charges, and the dark current increases, so that the pixel unit also has a bright spot in a completely dark field, i.e. a white pixel, which has a serious influence on the imaging effect.
Therefore, a new method for manufacturing an image sensor is needed to improve the white pixel problem and improve the pixel performance.
Disclosure of Invention
The invention aims to provide an image sensor and a preparation method thereof, which aim to solve the problem of improving white pixels.
In order to solve the above technical problem, the present invention provides a method for manufacturing an image sensor, including:
providing a substrate, wherein the substrate comprises a pixel area and a logic area;
forming a gate material layer, wherein the gate material layer covers the surfaces of the pixel region and the logic region;
forming a patterned photoresist layer, wherein the patterned photoresist layer shields the logic region and exposes the gate material layer positioned in the pixel region;
and performing an ion implantation process to dope an adsorption material in the exposed gate material layer.
Optionally, in the method for manufacturing an image sensor, during the ion implantation process, the implanted ion species include carbon ions.
Optionally, in the method for manufacturing an image sensor, before the gate material layer is formed, shallow trench isolation structures are formed in the substrate, and the shallow trench isolation structures are distributed in the pixel region and the logic region.
Optionally, in the method for manufacturing an image sensor, after the shallow trench isolation structure is formed, a plurality of photodiodes are formed in the pixel region, and a P-well region and an N-well region are formed in the logic region; the shallow trench isolation structure is arranged between the adjacent photodiodes, and the shallow trench isolation structure is also arranged between the adjacent P well region and the N well region.
Optionally, in the method for manufacturing an image sensor, after the photodiode, the P-well region, and the N-well region are formed, an oxide layer is formed on the substrate to cover the surfaces of the logic region and the pixel region.
Optionally, in the method for manufacturing an image sensor, the gate material layer is formed on the oxide layer.
Optionally, in the method for manufacturing an image sensor, after ion implantation is performed, the patterned photoresist layer is removed, and the gate material layer is etched, so that a first gate structure is formed in the pixel region, and a second gate structure is formed in the logic region.
Based on the same inventive concept, the present invention also provides an image sensor, comprising:
a substrate including a pixel region and a logic region;
the oxide layer covers the surfaces of the pixel area and the logic area;
the first grid structure and the second grid structure are formed on the oxide layer, the first grid structure is positioned in the pixel area, and the second grid structure is positioned in the logic area; wherein the first gate structure is doped with an adsorption material.
Optionally, in the image sensor, the adsorbing material includes carbon ions.
Optionally, in the image sensor, a plurality of photodiodes are formed in the pixel region, a P-well region and an N-well region are formed in the logic region, a shallow trench isolation structure is disposed between adjacent photodiodes, and a shallow trench isolation structure is also disposed between adjacent P-well regions and adjacent N-well regions.
In summary, the present invention provides an image sensor and a method for manufacturing the same. Wherein, the method comprises the following steps: providing a substrate, wherein the substrate comprises a pixel area and a logic area; forming a gate material layer, wherein the gate material layer covers the surfaces of the pixel region and the logic region; forming a patterned photoresist layer, wherein the patterned photoresist layer shields the logic region and exposes the gate material layer positioned in the pixel region; and performing an ion implantation process to dope an adsorption material in the exposed gate material layer. Therefore, the adsorption material is doped into the grid material layer of the pixel region, so that the metal ions in the pixel region are adsorbed by utilizing the adsorbability of the adsorption material, the problem of white pixels caused by diffusion of the metal ions is solved, and the pixel performance and the imaging quality are improved. Meanwhile, the ion implantation process has no influence on the circuit structure of the logic area, a new photomask is not needed, and the process operation is simple.
Drawings
Fig. 1 is a flowchart of a method for manufacturing an image sensor according to an embodiment of the present invention.
Fig. 2 is a top view of a back-illuminated image sensor in an embodiment of the invention.
Fig. 3-6 are schematic views of semiconductor structures during a manufacturing method of an image sensor according to an embodiment of the present invention.
Fig. 7 is a line drawing comparing white pixels doped with carbon ions and undoped with carbon ions for the first gate structure in an embodiment of the invention.
Wherein the reference numbers in the drawings refer to:
100-a substrate; 101-shallow trench isolation structure; 102-an oxide layer; 103-a layer of gate material; 103 a-a first gate structure; 103 b-a second gate structure; 104-patterning the photoresist layer;
11-logical area; a 111-P well region; 112-N well regions;
12-a pixel region; 121-photodiode.
Detailed Description
To further clarify the objects, advantages and features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is to be noted that the drawings are in greatly simplified form and are not to scale, but are merely intended to facilitate and clarify the explanation of the embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently. It should also be understood that the terms "first," "second," "third," and the like in the description are used for distinguishing between various components, elements, steps, and the like, and not for describing a sequential or logical relationship between various components, elements, steps, or the like, unless otherwise specified or indicated.
Referring to fig. 1, the present embodiment provides a method for manufacturing an image sensor, including:
step one S10: providing a substrate, wherein the substrate comprises a pixel area and a logic area;
step two S20: forming a gate material layer, wherein the gate material layer covers the surfaces of the pixel region and the logic region;
step three S30: forming a patterned photoresist layer which shields the logic region and exposes the gate material layer positioned in the pixel region;
step four S40: and performing an ion implantation process to dope an adsorption material in the exposed gate material layer.
Therefore, in the manufacturing method of the image sensor provided by the embodiment, the gate material layer of the pixel region is doped with the adsorbing material, so that the metal ions in the pixel region are adsorbed by utilizing the adsorbability of the adsorbing material, the problem of white pixels caused by diffusion of the metal ions is solved, and the pixel performance and the imaging quality are improved. Meanwhile, the ion implantation process has no influence on the circuit structure of the logic area, a mask does not need to be additionally arranged, and the process operation is simple.
The method for manufacturing the image sensor provided in this embodiment is specifically described below with reference to fig. 2 to 6.
Step one S10: referring to fig. 2-3, a substrate 100 is provided, wherein the substrate 100 includes a logic region 11 and a pixel region 12.
Fig. 2 is a top view of the image sensor, and the logic area 11 is located in a peripheral area of the pixel area 12. A logic circuit is disposed in the logic area 11, and a plurality of pixel units are disposed in the pixel area 12 to realize conversion between optical signals and electrical signals. Fig. 3 is a cross-sectional view of a partial area of the image sensor, that is, on the same substrate 100, the partial area is the logic area 11, and the partial area is the pixel area 12. The device structure shown in this embodiment is merely an illustrative example, and does not limit the specific arrangement position of each device.
Referring to fig. 3, the substrate 100 may provide an operation platform for a subsequent process, which may be any substrate known to those skilled in the art for carrying components of a semiconductor integrated circuit, such as a bare die, or a wafer processed by an epitaxial growth process, and further, the substrate 100 may be a silicon-on-insulator (SOI) substrate, a bulk silicon (bulk silicon) substrate, a germanium substrate, a silicon-germanium substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, or a germanium-on-insulator (ge) substrate. Further, the substrate 100 is divided into at least a logic area 11 and a pixel area 12. The pixel region 12 is used to form a plurality of pixel units including a plurality of photodiodes, transfer gates, floating drains, and the like. The logic area 11 is used for forming a logic circuit, and includes NMOS devices, PMOS devices, various metal interconnection structures, and the like.
Further, a shallow trench isolation structure 101 is formed on the substrate 100 to define an active region and provide electrical isolation for a subsequently formed device. Preferably, the shallow trench isolation structure 101 is made of silicon dioxide or polysilicon. After the shallow trench isolation structure 101 is formed, an ion implantation process is performed on the logic region 11 and the pixel region 12, respectively, so as to form a plurality of well regions in the logic region 11 and form a photodiode 121 in the pixel region 12. The well regions formed in the logic region 11 include P-well regions 111 and N-well regions 112. The formed P-well region 111 is used for forming NMOS devices subsequently, and the formed N-well region 112 is used for forming PMOS devices subsequently. Further, the P-well region 111 is doped with P-type ions, such as: boron ions or gallium ions, etc. The N-well region 112 is doped with N-type ions, such as: phosphorus ions or arsenic ions, etc. It should be noted that the positions of the N-well region 112 and the P-well region 111 shown in fig. 3 are only exemplary illustrations, and the present embodiment does not limit the specific positions of the subsequently formed NMOS device and PMOS device.
Further, the shallow trench isolation structures 101 are distributed in the logic area 11 and the pixel area 12. Moreover, the shallow trench isolation structure 101 is disposed between the adjacent photodiodes 121, and the shallow trench isolation structure 101 is also disposed between the adjacent P-well region 111 and the adjacent N-well region 112, so as to avoid interference between the photodiodes 121 and interference between subsequently formed NMOS devices and PMOS devices.
With reference to fig. 3, after the P-well region 111, the N-well region 112 and the photodiode 121 are formed, an oxide layer 102 is formed on the substrate 100 to cover the surfaces of the logic region 11 and the pixel region 12. The oxide layer 102 is used to protect the surface of the substrate 100, and the material of the oxide layer includes, but is not limited to, silicon dioxide. Optionally, the oxide layer 102 is formed on the surface of the substrate 100 through a thermal oxidation process.
Step two S20: referring to fig. 4, a gate material layer 103 is formed, wherein the gate material layer 103 covers the surfaces of the pixel region 12 and the logic region 11.
Optionally, a chemical vapor deposition process is used to form the gate material layer 103 on the oxide layer 102. The gate material layer 103 is used for forming gate structures of NMOS devices and PMOS devices in the logic region 11 and forming transfer gates in the pixel region 12. Further, the gate material layer 103 is made of polysilicon.
Step three S30: referring to fig. 5, a patterned photoresist layer 104 is formed, wherein the patterned photoresist layer 104 shields the logic region 11 and exposes the gate material layer 103 in the pixel region 12.
Specifically, a photoresist layer is coated on the surface of the gate material layer 103, and then the patterned photoresist layer 104 is formed through an existing photomask, i.e., a photomask used for ion implantation in the pixel region 12. The patterned photoresist layer 104 is used as a barrier layer for a subsequent ion implantation process, and the patterned photoresist layer 104 shields the logic region 11 from affecting the logic region 11 and exposes the gate material layer 103 in the pixel region 12.
Step four S40: referring to fig. 5-6, an ion implantation process is performed to dope the exposed gate material layer 103 with an absorption material.
Under the blocking of the patterned photoresist layer 104, the ion implantation process only ion-dopes the gate material layer 103 in the pixel region 12, and has no influence on the logic region 11. Further, the implanted ion species include carbon ions. The carbon ions have strong adsorbability, and can adsorb metal impurities in the pixel region 12, so that the problem that serious white pixels are generated in the pixel region 12 due to pollution of the metal impurities is avoided, and the performance of the pixels and the imaging quality of the image sensor are improved. Further, the doping concentration of the carbon ions is not limited in this embodiment, and may be set according to the specific requirements of the device.
After the ion implantation process is performed, the patterned photoresist layer 104 is cleaned and removed, a patterned mask layer (not shown) is formed on the gate material layer 103, and then the gate material layer 103 is etched by using a dry etching process with the patterned mask layer as an etching barrier layer, so as to form a first gate structure 103a in the pixel region 12 and a second gate structure 103b in the logic region 11. As shown in fig. 6, one first gate structure 103a is disposed on each photodiode 121. And the first gate structure 103a shields a portion of the photodiode 121 to serve as a transfer gate of the photodiode 121. Further, the second gate structures 103b are disposed on both the P-well region 111 and the N-well region 112 to be gates of NMOS and PMOS, respectively. It should be noted that the second gate structure 103b on the P-well region 111 and the second gate structure 103b on the N-well region 112 may be connected or may be separately disposed, and the specific structural arrangement may be determined according to the design requirement of a logic circuit.
In the subsequent process, the NMOS and PMOS source-drain structures in the logic region 11, the metal connection lines, and other circuit structures, and the pixel structures in the pixel region 12 are further completed, which is not described herein again.
Based on the same inventive concept, the embodiment also provides an image sensor. Referring to fig. 6, the image sensor includes:
a substrate 100, the substrate 100 including a pixel region 12 and a logic region 11;
an oxide layer 102, where the oxide layer 102 covers surfaces of the pixel region 12 and the logic region 11, and is used to protect the pixel region 12 and the logic region 11;
a first gate structure 103a and a second gate structure 103b, wherein the first gate structure 103a and the second gate structure 103b are formed on the oxide layer 102, the first gate structure 103a is located in the pixel region 12, and the second gate structure 103b is located in the logic region 11; wherein the first gate structure 103a is doped with an adsorption material.
Further, the adsorbing material includes carbon ions, has strong adsorbability, and is used for adsorbing metal impurities in the pixel region 12, so as to alleviate the problem of white pixels generated in the pixel region 12 due to pollution of the metal impurities, and improve pixel performance and imaging quality. Wherein, a plurality of photodiodes 121 are formed in the pixel region 12 for realizing photoelectric conversion. A P-well region 111 and an N-well region 112 are formed in the logic region 11 for subsequently forming NMOS devices and PMOS devices. Further, in order to ensure electrical isolation, a shallow trench isolation structure 101 is disposed between adjacent photodiodes 121, and the shallow trench isolation structure 101 is also disposed between adjacent P-well regions 111 and N-well regions 112. Each of the photodiodes 121 is correspondingly provided with one of the first gate structures 103 a. And the first gate structure 103a shields a portion of the photodiode 121 to serve as a transfer gate of the photodiode 121. And the second gate structures 103b are disposed on both the P-well region 111 and the N-well region 112 to be gates of NMOS and PMOS, respectively.
In order to verify the effect of the image sensor and the manufacturing method thereof provided by the present embodiment on improving the white pixel problem, the applicant performed a comparison test on an image sensor not doped with carbon ions and an image sensor doped with carbon ions. Referring to fig. 7, a curve a is a variation curve of a white pixel without doped carbon ions, and a curve b is a variation curve of a white pixel with doped carbon ions. Obviously, the white pixels of curve a are significantly higher than the white pixels of curve b for the same pixel values. Therefore, it can be understood that the doping of carbon ions in the first gate structure 103a can better alleviate the white pixel problem of the image sensor, and improve the imaging quality.
In summary, the present embodiment provides an image sensor and a method for manufacturing the same. Wherein the method comprises the following steps: providing a substrate 100, wherein the substrate 100 comprises a pixel area 12 and a logic area 11; forming a gate material layer 103, wherein the gate material layer 103 covers the surfaces of the pixel region 12 and the logic region 11; forming a patterned photoresist layer 104, wherein the patterned photoresist layer 104 shields the logic region 11 and exposes the gate material layer 103 in the pixel region 12; an ion implantation process is performed to dope an adsorption material in the exposed gate material layer 103. It can be seen that in the present embodiment, the gate material layer 103 of the pixel region 12 is doped with the adsorbing material to utilize the adsorbability of the adsorbing material to adsorb the metal ions in the pixel region 12, so that the problem of white pixels caused by diffusion of the metal ions is alleviated, and the pixel performance and the imaging quality are improved. Meanwhile, the ion implantation process has no influence on the circuit structure of the logic region 11, a new mask is not needed, and the process operation is simple.
It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the protection scope of the technical solution of the present invention, unless the content of the technical solution of the present invention is departed from.
Claims (10)
1. A method of manufacturing an image sensor, comprising:
providing a substrate, wherein the substrate comprises a pixel area and a logic area;
forming a gate material layer, wherein the gate material layer covers the surfaces of the pixel region and the logic region;
forming a patterned photoresist layer, wherein the patterned photoresist layer shields the logic region and exposes the gate material layer positioned in the pixel region;
and performing an ion implantation process to dope an adsorption material in the exposed gate material layer.
2. The method of claim 1, wherein the implanted ion species comprise carbon ions during the ion implantation process.
3. The method of claim 1, wherein shallow trench isolation structures are formed in the substrate before the gate material layer is formed, and the shallow trench isolation structures are distributed in the pixel region and the logic region.
4. The method of claim 3, wherein after the shallow trench isolation structure is formed, a plurality of photodiodes are formed in the pixel region, and a P-well region and an N-well region are formed in the logic region; the shallow trench isolation structure is arranged between the adjacent photodiodes, and the shallow trench isolation structure is also arranged between the adjacent P well region and the N well region.
5. The method of claim 4, wherein an oxide layer is formed on the substrate to cover the logic region and the surface of the pixel region after the photodiode, the P-well region, and the N-well region are formed.
6. The method of claim 5, wherein the gate material layer is formed on the oxide layer.
7. The method of claim 1, wherein after the ion implantation is performed, the patterned photoresist layer is removed and the gate material layer is etched to form a first gate structure in the pixel region and a second gate structure in the logic region.
8. An image sensor, comprising:
a substrate including a pixel region and a logic region;
the oxide layer covers the surfaces of the pixel area and the logic area;
the first grid structure and the second grid structure are formed on the oxide layer, the first grid structure is positioned in the pixel area, and the second grid structure is positioned in the logic area; wherein the first gate structure is doped with an adsorption material.
9. The image sensor of claim 8, wherein the adsorptive material comprises carbon ions.
10. The image sensor of claim 8, wherein a plurality of photodiodes are formed in the pixel region, a P-well region and an N-well region are formed in the logic region, and a shallow trench isolation structure is disposed between adjacent photodiodes and between adjacent P-well and N-well regions.
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| CN114335045A (en) * | 2022-03-10 | 2022-04-12 | 合肥晶合集成电路股份有限公司 | Method for reducing dark current of CMOS image sensor |
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| CN114005846A (en) * | 2021-10-29 | 2022-02-01 | 上海华力微电子有限公司 | Method for manufacturing image sensor |
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