CN114814658B - Timing polarity tester - Google Patents
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- CN114814658B CN114814658B CN202210492492.5A CN202210492492A CN114814658B CN 114814658 B CN114814658 B CN 114814658B CN 202210492492 A CN202210492492 A CN 202210492492A CN 114814658 B CN114814658 B CN 114814658B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/62—Testing of transformers
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Abstract
The invention provides a timing polarity tester, which is used for testing the polarity of a plurality of devices to be tested in a plurality of test loops, and comprises the following components: the device testing device comprises a programmable logic controller and a testing waveform output module, wherein the programmable logic controller determines delay information between each cycle test corresponding to each piece of device information to be tested according to the acquired pieces of device information to be tested, controls the device to be tested to carry out the cycle test when meeting a certain device testing condition according to the delay information between each cycle test corresponding to each piece of device information to be tested, outputs each test pulse signal generated by the device to be tested to the waveform output module, generates a polarity cycle test result according to each test pulse signal generated by the device to be tested in the waveform output module, effectively improves the polarity test efficiency, flexibly adjusts the delay information between each cycle test of the same device to be tested, and expands the testing application range.
Description
Technical Field
The invention relates to the field of polarity testing, in particular to a timing polarity tester.
Background
The Current Transformer (CT) and the voltage transformer (PT) are subjected to polarity tests before and during use to determine the polarities of the Current Transformer (CT) and the voltage transformer (PT).
However, when the polarity test of the Current Transformer (CT) and the voltage transformer (PT) is performed, the conventional polarity tester generally performs the switching control through a relay to perform the cyclic test, so as to control the on-off time and the on-off state of the polarity test circuit.
Disclosure of Invention
The invention aims to solve the problems in the prior art, innovatively provides a timing polarity tester, effectively solves the problems that a plurality of test loops cannot be tested due to the prior art, and the delay time in each test cannot be flexibly adjusted in the polarity test process, effectively improves the polarity test efficiency, and expands the test application range.
The first aspect of the present invention provides a timing polarity tester for performing polarity testing on a plurality of devices to be tested in a plurality of test loops, including: the device comprises a programmable logic controller and a waveform output module, wherein the programmable logic controller acquires a plurality of pieces of device information to be tested, determines delay information between each cycle test corresponding to the piece of device information to be tested according to the acquired pieces of device information to be tested, controls the device to be tested to carry out the cycle test according to the delay information between each cycle test corresponding to the piece of device information to be tested when a certain device test condition to be tested is met, outputs each test pulse signal generated by the device to be tested to the waveform output module, and generates a polar cycle test result according to each test pulse signal generated by the device to be tested in the waveform output module.
Optionally, the test circuit further comprises a plurality of first power modules, wherein the first power modules are arranged in each test circuit and are used for supplying power to the devices to be tested in each test circuit.
Further, the first power module is a battery.
Optionally, the primary input end of the device to be tested in each test loop is electrically connected with the positive electrode of the first power supply module, and the primary output end of the device to be tested in each test loop is electrically connected with the negative electrode of the first power supply module through an output contact of the programmable logic controller; the secondary input end of the device to be tested in each test loop is connected with a zero line binding post in the waveform output module, and the secondary output end of the device to be tested in each test loop is connected with a phase line positive binding post in the waveform output module.
Further, the generating a polarity cycle test result according to each test pulse signal generated by the device to be tested in the waveform output module specifically includes:
if a certain phase waveform of the waveform output module points to the upper part of the X axis, the connected primary input end of the device to be tested is the same-name end with the secondary output end of the device to be tested, which is connected with the phase wiring column in the waveform output module; if a certain phase waveform of the waveform output module points to the lower part of the X axis, the connected primary input end of the device to be tested and the secondary output end of the device to be tested, which is connected with the phase connecting wire column in the waveform output module, are non-homonymous ends.
Optionally, a second power module is further included, the second power module providing power to the programmable logic device.
Optionally, determining delay information between each cycle test corresponding to the device information to be tested according to the acquired plurality of device information to be tested specifically includes:
acquiring information of a device to be tested;
determining delay information between each cycle test corresponding to the device information to be tested according to the device information to be tested and the corresponding relation database; the corresponding relation database stores the corresponding relation between the device information to be tested and the delay information between each cycle test.
Further, the device information to be tested comprises device type information to be tested, device model information to be tested, device manufacturer information to be tested and delay error correction self-setting information of the device to be tested.
Optionally, when a test condition of a device to be tested is met, controlling the device to be tested to perform a cyclic test, and outputting a pulse signal for each test generated by the device to be tested to a waveform output module specifically includes:
when a certain device to be tested testing condition is met, delay information between each cycle test corresponding to the device to be tested is obtained;
controlling a test loop where the device to be tested is positioned to be sequentially closed and conducted according to the delay information, and performing a cyclic test;
and sequentially outputting each test pulse signal generated by the device to be tested to a waveform output module.
Optionally, delay information between each cycle of testing corresponding to the device information to be tested is a delay time sequence.
Optionally, the device to be tested includes a voltage transformer and a current transformer.
The technical scheme adopted by the invention comprises the following technical effects:
1. according to the invention, the programmable logic controller determines the delay information between each cycle test corresponding to the device information to be tested according to the acquired device information to be tested, and controls the device to be tested to carry out the cycle test according to the delay information between each cycle test corresponding to the device information to be tested when a certain device to be tested is met, thereby effectively solving the problems that a plurality of test loops cannot be tested due to the prior art and the delay time in each test cannot be flexibly adjusted in the polarity test process, effectively improving the polarity test efficiency, flexibly adjusting the delay information between each cycle test of the same device to be tested and expanding the test application range.
2. According to the technical scheme, the first power supply module is arranged in each test loop to supply power for the device to be tested in each test loop, so that independent power supply of different test loops can be realized, convenience is provided for independent test of the device to be tested in each test loop, and the independence of test control of the device to be tested in different test loops is improved.
3. According to the technical scheme, delay information between each cycle test corresponding to the device information to be tested is determined according to the device information to be tested and the corresponding relation database; the device to be tested information comprises device type information to be tested, device model information to be tested, device manufacturer information to be tested and delay error correction self-setting information of the device to be tested, delay information between each cycle of test corresponding to the device information to be tested can be flexibly adjusted according to specific conditions of the device to be tested, the test application range is enlarged, and the reliability of polarity test is improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed.
Drawings
For a clearer description of embodiments of the invention or of the solutions of the prior art, reference will be made to the accompanying drawings, which are used in the description of the embodiments or of the prior art, and it will be obvious to those skilled in the art that other drawings can be obtained from these without inventive labour.
FIG. 1 is a schematic diagram of a first embodiment of the present invention including a plurality of test loops;
FIG. 2 is a schematic diagram showing a specific structure of a single test loop according to a first embodiment of the present invention;
fig. 3 is a schematic diagram of a specific structure of a programmable logic controller according to a first embodiment of the present invention.
Detailed Description
In order to clearly illustrate the technical features of the present solution, the present invention will be described in detail below with reference to the following detailed description and the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different structures of the invention. In order to simplify the present disclosure, components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily obscure the present invention.
Example 1
As shown in fig. 1, the present invention provides a timing polarity tester for performing polarity testing on a plurality of devices under test 11 in a plurality of test circuits 1, comprising: the programmable logic controller 2 and the waveform output module 3, the programmable logic controller 2 obtains the information of a plurality of devices 11 to be tested, determines delay information between each cycle test corresponding to the information of each device to be tested according to the obtained information of the plurality of devices to be tested, controls the devices 11 to be tested to carry out the cycle test according to the delay information between each cycle test corresponding to the information of each device to be tested, outputs each test pulse signal generated by the devices 11 to be tested to the waveform output module 3 when the test condition of a certain device 11 to be tested is met, and generates a polar cycle test result according to each test pulse signal generated by the devices 11 to be tested in the waveform output module 3.
Preferably, a plurality of first power modules 12 are further included, the first power modules 12 being provided in each test loop 1 for supplying power to the devices under test 11 in each test loop 1. Specifically, the first power module 12 may be a dry cell. The voltage range of the dry battery can be 1V-220V, and can be flexibly adjusted according to actual conditions, and the invention is not limited herein.
That is, the connection relationship between the first power module 12 and the device under test 11 in each test loop 1 is shown in fig. 2 (a current transformer is used as an example for illustration), the primary input end P1 of the device under test 11 in each test loop 1 is electrically connected with the positive electrode of the first power module 12, and the primary output end P2 of the device under test 11 in each test loop 1 is electrically connected with the negative electrode of the first power module 12 through an output contact Y00 of the programmable logic controller 2; the secondary input end S1 of the device to be tested 11 in each test loop 1 is connected with a zero line binding post in the waveform output module 3, and the secondary output end S2 of the device to be tested 11 in each test loop 1 is connected with a phase line positive binding post in the waveform output module 3.
Correspondingly, the waveform output module 3 may be a high-precision oscilloscope, and when an output pulse (alternating current) of the secondary side of the device to be tested is obtained, the direction is indicated by the waveform of the oscilloscope, and the secondary polarity is judged.
Specifically, the generating a polarity cycle test result according to each test pulse signal generated by the device to be tested in the waveform output module specifically includes:
if a certain phase (for example, B phase) waveform of the waveform output module 3 points to the upper part of the X axis, the accessed primary input end of the device to be tested is the same-name end with the secondary output end of the device to be tested, which is connected with the phase positive wiring column in the waveform output module; if a certain phase waveform of the waveform output module points to the lower part of the X axis, the connected primary input end of the device to be tested and the secondary output end of the device to be tested, which is connected with the phase connecting wire column in the waveform output module, are non-homonymous ends.
Preferably, a second power module 4 is also included, the second power module 4 powering the programmable logic device 2. The power supply voltage range of the second power supply module 4 may be 12V-24V, or may be flexibly adjusted according to practical situations, which is not limited in the present invention.
The programmable logic device 2 can be a PLC (Programmable Logic Controlle, programmable logic controller) logic controller, the polarity test function of the device 11 to be tested in different circuits can be realized by each path of independent control through a self-editing logic program, and 8 single-path time relays are replaced by the PLC logic controller, so that the device is simpler than the single-path relay; the multi-path joint control can be realized, and the circulation is arbitrarily nested; the method supports input waiting and conditional transfer, easily realizes sequential flow and branch control of a plurality of different test loops, supports instructions such as 'if/and/or output function, delay/timing, count/conditional transfer', and the like, can be combined with delay control and logic control, realizes timing circulation and timing permission.
Specifically, on-off control of contact delay is realized on the Z00 program group, the Z00 program group is nested in the Z17 logic control program group, the Z17 logic control group is nested in the Z16 calendar timing program group, and the Z00 program group in the Z17 logic control group can only run in a preset time period (namely, the Z16 calendar timing program group setting is met).
As shown in fig. 3, an input working area and an output working area are set in the programmable logic controller 2, each input end in the input working area corresponds to each output contact of the output working area, the input end of the input working area can be in the form of a key or a sensor input, when the test condition of a device to be tested in a certain test loop is met, the input end of the input working area is controlled to be closed and conducted, meanwhile, the corresponding output contact of the corresponding output working area is controlled to be closed and conducted, the test loop is conducted, and the polarity test is started; each output contact of the output working area corresponds to the closed on or off state of each test loop, for example, the input working area comprises input ends (or input contacts) X00-X07 (for example, less than 8 test loops), correspondingly, the output contacts of the output working area comprise Y00-Y07, and the input ends (or input contacts) X00-X07 and the output contacts comprise Y00-Y07 in a one-to-one correspondence.
The specific operation flow is as follows: pressing a start button, conducting an X00 contact at an internal input end, executing a program with a step number of 000 in a Z00 program, conducting delay time information of a first cyclic test to be 0, controlling the Y00 contact to be closed, conducting a programmable logic controller in a time-limited polarity tester with a primary circuit of a device to be tested (conducting time can be 1S), then executing a program with a step number of 001, controlling the Y00 contact to be disconnected, disconnecting the programmable logic controller in the time-limited polarity tester with the primary circuit of the device to be tested, and controlling the Y00 contact to be closed again after a delay time of 03:00 seconds (the disconnection duration can be 3S), conducting a second cyclic test, and ending after the process from the push to 999 program steps (each program step number represents one program operation). And this logic is run in the Z017 control logic running in the Z016 calendar timing logic group, the Z017 logic control is executed in the timing time, and the logic is nested in turn. The output end of the programmable logic controller is internally provided with a 10A relay, when the programmable logic controller and a test loop where the device to be tested is located form a test closed loop, and after the test condition of the device to be tested is met, the programmable logic controller controls the output node to conduct at regular time, the first power supply module, namely 1 dry battery is connected into a primary loop of the device to be tested, and the output direct current voltage is 1.5V.
Wherein, Z00 group: delay control, group Z016: calendar timing, Z017 group: logic control. 000-XXX: for program step number within program group, X00-X07: for key or sensor input contacts, Y00-Y07: the logic judgment is followed by outputting the contact.
Specifically, the programmable logic controller determines delay information between each cycle test corresponding to the device information to be tested according to the acquired device information to be tested, and specifically includes:
acquiring information of a device to be tested;
determining delay information between each cycle test corresponding to the device information to be tested according to the device information to be tested and the corresponding relation database; the corresponding relation database stores the corresponding relation between the device information to be tested and the delay information between each cycle test.
When a certain device to be tested testing condition (generally, calendar timing, namely, time setting condition) is met, the device to be tested is controlled to carry out cyclic testing, and each test pulse signal generated by the device to be tested is output to a waveform output module, wherein the waveform output module specifically comprises:
when a certain device to be tested testing condition is met, delay information between each cycle test corresponding to the device to be tested is obtained;
controlling a test loop where the device to be tested is positioned to be sequentially closed and conducted according to the delay information, and performing a cyclic test;
and sequentially outputting each test pulse signal generated by the device to be tested to a waveform output module.
Specifically, when a certain device to be tested testing condition is met, delay information between each cycle of testing corresponding to the device to be tested is obtained; starting to perform a first cycle test, wherein delay time information of the first cycle test can be (0, 1), namely after 0S, the Y00 contact is controlled to be closed, at the moment, a programmable logic controller in the timing polarity tester is conducted with a primary circuit of a device to be tested (the conduction time can be 1S), then the Y00 contact is controlled to be disconnected, at the moment, the programmable logic controller in the timing polarity tester is disconnected with the primary circuit of the device to be tested, and a result of the first cycle test is output; and then starting to perform a second cycle test, wherein the delay time information of the first cycle test is (3, 1), namely after 3 seconds, the Y00 contact is controlled to be closed again, at the moment, a programmable logic controller in the timing polarity tester is conducted with a primary loop of a device to be tested (the conduction time can be 1S), then the Y00 contact is controlled to be disconnected again, the result of the second cycle test is output, and so on until the preset cycle test times (which can be 10000 times) are reached. Namely, the delay time corresponding to each cycle test in the embodiment of the invention is divided into an opening duration (the time from opening to closing of a test loop, namely the time from opening to closing of a certain output contact of a programmable logic controller) and a conducting duration (the time from closing to opening of a test loop, namely the time from closing to opening of a certain output contact of a programmable logic controller). The corresponding delay time information of each cycle test forms a delay time information sequence which is stored in a corresponding relation database in advance so as to be convenient to call. The corresponding delay time information of each cycle test can be the same, and can be flexibly selected and adjusted according to actual conditions, and the invention is not limited herein.
The device information to be tested in the corresponding relation database comprises device type information to be tested, device model information to be tested, device manufacturer information to be tested and delay error correction self-setting information of the device to be tested. The type information of the device to be tested is specifically a current sensor or a voltage sensor, different types of devices to be tested, different manufacturers of devices to be tested and the like correspond to delay time information in different cyclic test processes, and the corresponding relation between the type information of the device to be tested, the manufacturer information of the device to be tested and the delay time information corresponding to each cyclic test is established through establishing a corresponding relation database, so that the delay time information of each cyclic test of the device to be tested can be conveniently obtained, different delay time information can be conveniently selected according to the specific conditions of the device to be tested, and the flexibility and reliability of the polar cyclic test of the device to be tested are improved.
Further, the corresponding relational database also stores delay error correction self-setting information of the device to be tested, and the delay error correction self-setting information of the device to be tested can be set according to human experience, namely, an experience value is set, or can be determined according to the environment (such as temperature, humidity and the like) in which the device to be tested is located, or can be determined in other manners, and the invention is not limited herein. According to the technical scheme, the delay error of the device to be tested is corrected, and the self-setting information is set, so that the test error caused by accidental test conditions can be further compensated, and the reliability and accuracy of the polarity test are further improved.
It should be noted that, the device to be tested in the technical scheme of the invention may include a voltage transformer and a current transformer.
According to the invention, the programmable logic controller determines the delay information between each cycle test corresponding to the device information to be tested according to the acquired device information to be tested, and controls the device to be tested to carry out the cycle test according to the delay information between each cycle test corresponding to the device information to be tested when a certain device to be tested is met, thereby effectively solving the problems that a plurality of test loops cannot be tested due to the prior art and the delay time in each test cannot be flexibly adjusted in the polarity test process, effectively improving the polarity test efficiency, flexibly adjusting the delay information between each cycle test of the same device to be tested and expanding the test application range.
According to the technical scheme, the first power supply module is arranged in each test loop to supply power for the device to be tested in each test loop, so that independent power supply of different test loops can be realized, convenience is provided for independent test of the device to be tested in each test loop, and the independence of test control of the device to be tested in different test loops is improved.
According to the technical scheme, delay information between each cycle test corresponding to the device information to be tested is determined according to the device information to be tested and the corresponding relation database; the device to be tested information comprises device type information to be tested, device model information to be tested, device manufacturer information to be tested and delay error correction self-setting information of the device to be tested, delay information between each cycle of test corresponding to the device information to be tested can be flexibly adjusted according to specific conditions of the device to be tested, the test application range is enlarged, and the reliability of polarity test is improved.
While the foregoing description of the embodiments of the present invention has been presented in conjunction with the drawings, it should be understood that it is not intended to limit the scope of the invention, but rather, it is intended to cover all modifications or variations within the scope of the invention as defined by the claims of the present invention.
Claims (7)
1. A time-limited polarity tester for testing the polarity of a plurality of devices under test in a plurality of test loops, comprising: the device comprises a programmable logic controller and a waveform output module, wherein the programmable logic controller acquires a plurality of pieces of device information to be tested, determines delay information between each cycle test corresponding to the piece of device information to be tested according to the acquired pieces of device information to be tested, controls the device to be tested to carry out the cycle test according to the delay information between each cycle test corresponding to the piece of device information to be tested when a certain device test condition to be tested is met, outputs each test pulse signal generated by the device to be tested to the waveform output module, and generates a polarity cycle test result according to each test pulse signal generated by the device to be tested in the waveform output module; the method for determining delay information between each cycle test corresponding to the device information to be tested according to the acquired device information to be tested specifically comprises the following steps:
acquiring information of a device to be tested; the device to be tested information comprises device type information to be tested, device model information to be tested, device manufacturer information to be tested and delay error correction self-setting information of the device to be tested; the delay error correction self-setting information of the device to be tested is determined by the environmental information of the device to be tested;
determining delay information between each cycle test corresponding to the device information to be tested according to the device information to be tested and the corresponding relation database; the corresponding relation database stores the corresponding relation between the device information to be tested and the delay information between each cycle test;
when a test condition of a certain device to be tested is met, the device to be tested is controlled to perform a cyclic test, and each test pulse signal generated by the device to be tested is output to a waveform output module, wherein the waveform output module specifically comprises:
when a certain device to be tested testing condition is met, delay information between each cycle test corresponding to the device to be tested is obtained;
controlling a test loop where the device to be tested is positioned to be sequentially closed and conducted according to the delay information, and performing a cyclic test;
and sequentially outputting each test pulse signal generated by the device to be tested to a waveform output module.
2. The timing polarity tester of claim 1, further comprising a plurality of first power modules disposed in each test loop for powering devices under test in each test loop.
3. The meter of claim 2, wherein the first power module is a battery.
4. The timing polarity tester of claim 2, wherein the primary input of the device under test in each test loop is electrically connected to the positive pole of the first power module, and the primary output of the device under test in each test loop is electrically connected to the negative pole of the first power module through an output contact of the programmable logic controller; the secondary input end of the device to be tested in each test loop is connected with a zero line binding post in the waveform output module, and the secondary output end of the device to be tested in each test loop is connected with a phase line positive binding post in the waveform output module.
5. The timing polarity tester according to claim 4, wherein generating the polarity cycle test result according to each test pulse signal generated by the device under test in the waveform output module comprises:
if a certain phase waveform of the waveform output module points to the upper part of the X axis, the primary input end of the connected device to be tested is the same-name end with the secondary output end of the device to be tested, which is connected with the phase wiring column in the waveform output module; if a certain phase waveform of the waveform output module points to the lower part of the X axis, the primary input end of the connected device to be tested is non-identical-name end with the secondary output end of the device to be tested, which is connected with the phase wiring column in the waveform output module.
6. The timing polarity tester of claim 1, further comprising a second power module, the second power module providing power to the programmable logic device.
7. A time-limited polarity tester according to any one of claims 1-6 wherein said devices to be tested include voltage transformers and current transformers.
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| CN109752628A (en) * | 2019-01-15 | 2019-05-14 | 国网辽宁省电力有限公司鞍山供电公司 | A kind of multifunctional mutual-inductor polarity test instrument based on embedded RTU |
| CN112731219A (en) * | 2020-12-01 | 2021-04-30 | 国网宁夏电力有限公司检修公司 | Polarity testing method, medium and system of mutual inductor |
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| JPH08122387A (en) * | 1994-10-20 | 1996-05-17 | Toshiba Corp | Method and apparatus for testing polarity of current transformer |
| CN101592719A (en) * | 2009-06-30 | 2009-12-02 | 深圳市科陆电子科技股份有限公司 | Current transformer method of testing and system thereof |
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| CN107918069A (en) * | 2017-10-16 | 2018-04-17 | 大唐微电子技术有限公司 | System and method are tested in a kind of power down |
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| CN114814658A (en) | 2022-07-29 |
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