CN101470655B - Mainboard test device - Google Patents
Mainboard test device Download PDFInfo
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- CN101470655B CN101470655B CN2007102035221A CN200710203522A CN101470655B CN 101470655 B CN101470655 B CN 101470655B CN 2007102035221 A CN2007102035221 A CN 2007102035221A CN 200710203522 A CN200710203522 A CN 200710203522A CN 101470655 B CN101470655 B CN 101470655B
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Abstract
The invention relates to a main board power on/off testing device, which comprises a pulse signal generating circuit, a first control circuit and a second control circuit, wherein the input end of the pulse signal generating circuit receives a stand-by voltage signal, and a pulse signal is produced on the output end. The first control circuit comprises a first input end, a second input end and an output end, wherein the first input end receives the pulse signal, a first control signal is output on the output end to an input output controller on a computer main board, and the input output controller controls a computer to start up after receiving a low level first control signal. The second control circuit comprises a first input end, a second input end and an output end, wherein the first input end receives the stand-by voltage signal, the second input end receives a system voltage signal of the main board, the output end of the computer outputs a second control signal to the second input end of the first control circuit after the computer is soft-off, which leads the first input end of the first control circuit to be started up again after receiving a low level pulse signal.
Description
Technical field
The present invention relates to a kind of main-board on-off proving installation, particularly a kind of main-board on-off proving installation that can carry out the test of cycling switch machine to computer main board.
Background technology
Computer production firm is in the quality proof procedure to computer, and the DC Power on/off of computer main board tests, i.e. dc switch machine test is an important checking project.Traditional method of testing is that the tester regularly manually presses the computer power button and makes computer main board power on, and the essence of manually pressing the computer power button is to low level signal of the input/output control unit on the computer main board, and described input/output control unit is put back high level after decontroling the computer power button, finishes booting computer thus.Behind booting computer, carry out test procedure, tester's manual operation computer soft-off after start reaches the regular hour.And when close computer after a period of time again by the computer power button, so move in circles and carry out switching on and shutting down operations, after testing time reaches predetermined times, stop test.In order to finish this test, need the cost great amount of manpower, increased production cost.
Summary of the invention
In view of foregoing, be necessary to provide a kind of proving installation of main-board on-off cheaply, can carry out the test of cycling switch machine to computer main board automatically.
A kind of main-board on-off proving installation comprises:
One pulse signal generation circuit, it comprises an input end and an output terminal, described input end receives a standby voltage signal, and produces a pulse signal at output terminal;
One first control circuit, it comprises one first triode, one second triode, one the 3rd triode, one field effect transistor, one diode, one first resistance, one second resistance, one the 3rd resistance and one first electric capacity, the base stage of described first triode links to each other with the output terminal of pulse signal generation circuit, the collector of described first triode links to each other with the base stage of second triode, the grounded emitter of described first triode, the collector of described second triode connects the input/output control unit on the computer main board, the emitter of described second triode links to each other with the collector of the 3rd triode, the grounded emitter of described the 3rd triode, the base stage of described the 3rd triode links to each other with the drain electrode of field effect transistor, and receive described standby voltage signal through second resistance, the source ground of described field effect transistor, the grid of described field effect transistor is through first capacity earth, and it is continuous with the negative electrode of described diode through the 3rd resistance, the anode of described diode receives the system voltage signal of described mainboard, described first control circuit is exported one first and is controlled signal to input/output control unit, and described input/output control unit is the controlling computer start after receiving low level first control signal; And
One second control circuit, it comprises a first input end, one second input end and an output terminal, described first input end receives described standby voltage signal, described second input end receives described system voltage signal, the output terminal of described second control circuit links to each other with the grid of described field effect transistor, and computer described second control circuit behind soft-off is exported one second and controlled signal to first control circuit, makes first control circuit can start shooting once more after receiving low level pulse signal.
Compare prior art, described main-board on-off proving installation can not need tester's manual operation computer main board to be measured to power on and shut down, control described first control circuit by pulse signal and export to the high-low level signal of input/output control unit and can carry out Automatic Cycle switching on and shutting down tests to mainboard, its circuit is simple, cost is lower, be easy to realize.
Description of drawings
In conjunction with embodiment the present invention is described in further detail with reference to the accompanying drawings:
Fig. 1 is the circuit diagram of the better embodiment of main-board on-off proving installation of the present invention.
Embodiment
Please refer to Fig. 1, the better embodiment of main-board on-off proving installation of the present invention comprises a pulse signal generation circuit 10, a first control circuit 20 and a second control circuit 30.
Described pulse signal generation circuit 10 comprises one 555 timer U1, two resistance R 6, R7, and two capacitor C 3, C4, described 555 timer U1 comprise a power end 11, one low triggering end, 12, one clear terminals, 13, one control ends 14, one high-triggering end, 15, one discharge ends 16, an output terminal 17 and an earth terminal 18.The 5V_STBY voltage that connects a computer main board to be measured after described power end 11 links to each other with clear terminal 13, described low triggering end 12 links to each other with high-triggering end 15 after described capacitor C 3 ground connection, and the described resistance R 6 of process is connected described 5V_STBY voltage with R7, described discharge end 16 links to each other with the connected node between described resistance R 6 and the R7, and described control end 14 is through described capacitor C 4 ground connection.
Described first control circuit 20 comprises three triode T1, T2, T3, a field effect transistor Q1, a diode D1, five resistance R 1, R2, R3, R4, R5 and two capacitor C 1, C2.The base stage of described triode T1 links to each other through the output terminal 17 of resistance R 4 with 555 timer U1, and the collector of described triode T1 links to each other the grounded emitter of described triode T1 with the base stage of triode T2.The collector of described triode T2 connects the input/output control unit on the computer main board, the collector of described triode T2 is through capacitor C 2 ground connection, and through the described 5V_STBY voltage of resistance R 5 connections, the emitter of described triode T2 links to each other with the collector of triode T3.The grounded emitter of described triode T3, the base stage of described triode T3 links to each other with the drain electrode of field effect transistor Q1, and connects described 5V_STBY voltage through second resistance R 2.The source ground of described field effect transistor Q1, the grid of described field effect transistor Q1 are through capacitor C 1 ground connection, and process resistance R 3 is continuous with the negative electrode of described diode D1, and the anode of described diode D1 connects the 5V_SYS voltage of described mainboard.
Described second control circuit 30 comprises a comparer U2, one triode T4 and four resistance R 8, R9, R10, R11, the in-phase input end of described comparer U2 connects described 5V_STBY voltage through resistance R 8, and through resistance R 9 ground connection, the inverting input of described comparer U2 connects described 5V_SYS voltage, the output terminal of described comparer U2 connects the base stage of described triode T4 through resistance R 10, the collector of described triode T4 is through the grid of the described field effect transistor Q1 of resistance R 11 connections, the grounded emitter of described triode T4.Triode T1 wherein, T2, T3, T4 are NPN type triode, and field effect transistor Q1 is a N-channel MOS type field effect transistor.
When using main-board on-off proving installation of the present invention that computer main board to be measured is tested, the power supply unit with mainboard inserts civil power and closed its switch earlier, and mainboard to be measured is promptly exported described 5V_STBY voltage.Described 5V_STBY voltage is given described capacitor C 3 chargings by resistance R 6 and resistance R 7, the voltage on capacitor C 3 be charged to 5V_STBY voltage 2/3rds before, the output terminal 17 of described 555 timer U1 is exported high level signal always.When the voltage on the capacitor C 3 be charged to 5V_STBY voltage 2/3rds the time, described capacitor C 3 is by discharge end 16 discharges of resistance R 7 to described 555 timer U1, this moment described 555 timer U1 output terminal 17 output low levels.The output terminal 17 that described capacitor C 3 constantly discharges and recharges at described 555 timer U1 produces pulse signal.When output terminal 17 output low levels of described 555 timer U1, this moment is because the also not output of 5V_SYS voltage, the grid of field effect transistor Q1 is that low level is ended, the base stage of triode T3 is high level and conducting, and being low level, the base stage of triode T1 ends, make that the base stage of triode T2 is high level and conducting, the current collection of described triode T2 is low level very, and be equivalent to the tester and manually supress power button this moment.Exporting each group system voltage when described input/output control unit receives low level signal makes mainboard to be measured power on, 5V_SYS voltage is given described capacitor C 1 charging by diode D1 and resistance R 3, be charged to the forward voltage of field effect transistor Q1 at the voltage on the capacitor C 1 after, field effect transistor Q1 conducting, make that the base stage of described triode T3 is that low level is ended, described triode T2 also ends, and be equivalent to the tester and decontroled power button again this moment, finished the computer Auto Power On thus.
Described input/output control unit is sent off signal and is made the computer soft-off after booting computer reaches a Preset Time, and this moment, 5V_SYS voltage was closed, but 5V_STBY voltage is still exported.The output terminal of described comparer U2 output high level makes described triode T4 conducting, and described capacitor C 1 is by resistance R 11 discharges.When the voltage on the capacitor C 1 is put cut-off voltage to field effect transistor Q1, field effect transistor Q1 ends once more, triode T3 conducting once more, when the also conducting once more of described triode T2 during output low level once more of the output terminal 17 of described 555 timer U1, computer also can be started shooting once more.The high-low level pulse signal of constantly exporting by the output terminal 17 of described 555 timer U1 has been realized the cycling switch machine test to mainboard to be measured thus.
Described main-board on-off proving installation can carry out the test of cycling switch machine to computer main board automatically, has advantages such as simple in structure, practical, that cost is lower.
Claims (7)
1. main-board on-off proving installation comprises:
One pulse signal generation circuit, it comprises an input end and an output terminal, described input end receives a standby voltage signal, and produces a pulse signal at output terminal;
One first control circuit, it comprises one first triode, one second triode, one the 3rd triode, one field effect transistor, one diode, one first resistance, one second resistance, one the 3rd resistance and one first electric capacity, the base stage of described first triode links to each other with the output terminal of pulse signal generation circuit, the collector of described first triode links to each other with the base stage of second triode, the grounded emitter of described first triode, the collector of described second triode connects the input/output control unit on the computer main board, the emitter of described second triode links to each other with the collector of the 3rd triode, the grounded emitter of described the 3rd triode, the base stage of described the 3rd triode links to each other with the drain electrode of field effect transistor, and receive described standby voltage signal through second resistance, the source ground of described field effect transistor, the grid of described field effect transistor is through first capacity earth, and it is continuous with the negative electrode of described diode through the 3rd resistance, the anode of described diode receives the system voltage signal of described mainboard, described first control circuit is exported one first and is controlled signal to input/output control unit, and described input/output control unit is the controlling computer start after receiving low level first control signal; And
One second control circuit, it comprises a first input end, one second input end and an output terminal, described first input end receives described standby voltage signal, described second input end receives described system voltage signal, the output terminal of described second control circuit links to each other with the grid of described field effect transistor, and computer described second control circuit behind soft-off is exported one second and controlled signal to first control circuit, makes first control circuit can start shooting once more after receiving low level pulse signal.
2. main-board on-off proving installation as claimed in claim 1 is characterized in that: described first control circuit also comprises one the 4th resistance, and described the 4th resistance is connected between the base stage of the output terminal of pulse signal generation circuit and first triode.
3. main-board on-off proving installation as claimed in claim 1, it is characterized in that: described first control circuit also comprises one the 5th resistance and one second electric capacity, the collector of described second triode receives described standby voltage signal through the 5th resistance, and through second capacity earth.
4. main-board on-off proving installation as claimed in claim 1, it is characterized in that: described pulse signal generation circuit comprises one 555 timers, one the 6th resistance, one the 7th resistance, one the 3rd electric capacity and one the 4th electric capacity, described 555 timers comprise a power end, one low triggering end, one clear terminal, one control end, a high-triggering end, a discharge end and an output terminal, described power end links to each other with clear terminal as the input end of pulse signal generation circuit, described low triggering end links to each other with high-triggering end after the 3rd capacity earth, and receives described standby voltage signal through the 6th resistance and the 7th resistance, and described discharge end links to each other with the connected node between the 6th resistance and the 7th resistance, described control end is through the 4th capacity earth, and the output terminal of described 555 timers is as the output terminal of described pulse signal generation circuit.
5. main-board on-off proving installation as claimed in claim 4, it is characterized in that: described second control circuit comprises a comparer, one the 4th triode, one the 8th resistance, one the 9th resistance, 1 the tenth resistance and 1 the 11 resistance, the in-phase input end of described comparer receives described standby voltage signal as the first input end of second control circuit through the 8th resistance, and through the 9th resistance eutral grounding, the inverting input of described comparer is as second input end of second control circuit, the output terminal of described comparer connects the base stage of described the 4th triode through the tenth resistance, the collector of described the 4th triode connects the grid of described field effect transistor, the grounded emitter of described the 4th triode as the output terminal of second control circuit through the 11 resistance.
6. main-board on-off proving installation as claimed in claim 5 is characterized in that: described first, second, third, fourth triode is NPN type triode.
7. main-board on-off proving installation as claimed in claim 1 is characterized in that: described field effect transistor is a N-channel MOS type field effect transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007102035221A CN101470655B (en) | 2007-12-28 | 2007-12-28 | Mainboard test device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007102035221A CN101470655B (en) | 2007-12-28 | 2007-12-28 | Mainboard test device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101470655A CN101470655A (en) | 2009-07-01 |
| CN101470655B true CN101470655B (en) | 2011-12-21 |
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| CN2007102035221A Expired - Fee Related CN101470655B (en) | 2007-12-28 | 2007-12-28 | Mainboard test device |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102025354A (en) * | 2009-09-23 | 2011-04-20 | 鸿富锦精密工业（深圳）有限公司 | Time sequence control circuit |
| CN103135051B (en) * | 2011-12-02 | 2017-02-08 | 宁波中嘉科贸有限公司 | Test fixture for power source restarting |
| CN104101772B (en) * | 2013-04-08 | 2016-12-28 | 中国长城计算机深圳股份有限公司 | A kind of PG signal-testing apparatus |
| CN104731680A (en) * | 2013-12-24 | 2015-06-24 | 鸿富锦精密工业(武汉)有限公司 | Startup and shutdown testing circuit |
| CN105896464B (en) * | 2015-01-26 | 2019-01-29 | 苏州益而益电器制造有限公司 | Energy-saving protective device and electrical equipment |
| CN106648012B (en) * | 2017-01-03 | 2019-07-16 | 深圳铂睿智恒科技有限公司 | One kind stirring control switch electromechanics road |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1963777A (en) * | 2005-11-08 | 2007-05-16 | 佛山市顺德区顺达电脑厂有限公司 | Method and apparatus for testing mainboard of computer |
| CN1979438A (en) * | 2005-12-09 | 2007-06-13 | 鸿富锦精密工业（深圳）有限公司 | Computer main-board on-off testing system and method |
-
2007
- 2007-12-28 CN CN2007102035221A patent/CN101470655B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1963777A (en) * | 2005-11-08 | 2007-05-16 | 佛山市顺德区顺达电脑厂有限公司 | Method and apparatus for testing mainboard of computer |
| CN1979438A (en) * | 2005-12-09 | 2007-06-13 | 鸿富锦精密工业（深圳）有限公司 | Computer main-board on-off testing system and method |
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| CN101470655A (en) | 2009-07-01 |
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Granted publication date: 20111221 Termination date: 20121228 |