CN104731680A - Startup and shutdown testing circuit - Google Patents
Startup and shutdown testing circuit Download PDFInfo
- Publication number
- CN104731680A CN104731680A CN201310719137.8A CN201310719137A CN104731680A CN 104731680 A CN104731680 A CN 104731680A CN 201310719137 A CN201310719137 A CN 201310719137A CN 104731680 A CN104731680 A CN 104731680A
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- electronic switch
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- power supply
- output pin
- supply unit
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Abstract
A startup and shutdown testing circuit is used for testing startup and shutdown of a mainboard and comprises first to fifth electronic switches, first to sixth resistors, first and second capacitors and first and second diodes. The startup and shutdown testing circuit controls startup of the mainboard by connecting or disconnecting the first and the second electronic switch and controls shutdown of the mainboard by connecting or disconnecting the third to the fifth electronic switches, repeatedly like this, startup and shutdown of the mainboard is simulated, and labor demand is reduced.
Description
Technical field
The present invention relates to a kind of on/off test circuit.
Background technology
Existing computer direct current switching on and shutting down test usually need Test Engineer repeatedly the manual power button by computer power on power-off to verify quality and the fiduciary level of computer, need the manpower costed a lot of money.
Summary of the invention
In view of above content, be necessary to provide a kind of on/off test circuit, carry out switching on and shutting down test with the automatic mainboard to computer.
A kind of on/off test circuit, for carrying out switching on and shutting down test to a mainboard, described mainboard also connects a power supply unit, described power supply unit is used for described main board power supply, described on/off test circuit is connected between the output pin of the video graphics array connector on the starting-up signal output pin of starting key on described mainboard and described mainboard, the starting-up signal output pin of described starting key connects the control pin of described power supply unit, described on/off test circuit comprises the first to the 5th electronic switch, first to the 6th resistance, first and second electric capacity and first and second diode, first output pin of described power supply unit is connected with the control end of described first electronic switch by described first resistance, the control end of described first electronic switch is also by described first capacity earth, the first end of described first electronic switch connects the second output pin of described power supply unit by described second resistance, second end ground connection of described first electronic switch, the first end of described first electronic switch connects the control end of described second electronic switch, the first end of described second electronic switch connects the starting-up signal output pin of described starting key, second end ground connection of described second electronic switch, first output pin of the video graphics array connector on described mainboard connects the anode of described first diode, the negative electrode of described first diode connects the control end of described 3rd electronic switch by described 3rd resistance, the first end of described 3rd electronic switch connects the first output pin of described power supply unit by described 4th resistance, second end ground connection of described 3rd electronic switch, the first end of described 3rd electronic switch also connects the control end of described 4th electronic switch by described second electric capacity, the control end of described 4th electronic switch also connects the first output pin of described power supply unit by described 5th resistance, the first end of described 4th electronic switch connects the first output pin of described power supply unit by described 6th resistance, second end ground connection of described 4th resistance switch, the first end of described 4th electronic switch also connects the control end of described 5th electronic switch, the first end of described 5th electronic switch connects the starting-up signal output pin of described starting key, second end ground connection of described 5th electronic switch, the control end of described 5th electronic switch also connects the anode of described second diode, the negative electrode of described second diode connects the negative electrode of described first diode, when the control end of the described first to the 5th electronic switch receives high level signal, the first end of the described first to the 5th electronic switch and the conducting respectively of the second end, when the control end of the described first to the 5th electronic switch receives low level signal, first end and second end of the described first to the 5th electronic switch disconnect.
Above-mentioned on/off test circuit utilizes the conducting of first and second electronic switch whether to control the start of described mainboard, the conducting of described 3rd to the 5th electronic switch is utilized whether to control the shutdown of described mainboard, circulate the switching on and shutting down operation of simulating described mainboard and so forth, to reduce manpower requirement.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the better embodiment of on/off test circuit of the present invention.
Main element symbol description
| On/off test circuit | 100 |
| Mainboard | 10 |
| Starting key | 20 |
| Power supply unit | 30 |
| VGA connector | 40 |
| Field effect transistor | Q1、Q4、Q5 |
| Triode | Q2、Q3、 |
| Resistance | R1-R6 |
| Electric capacity | C1-C3 |
| Diode | D1、D2 |
Following embodiment will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with accompanying drawing and better embodiment, the present invention is described in further detail:
Please refer to Fig. 1, on/off test circuit 100 of the present invention is for carrying out switching on and shutting down test to a mainboard 10, described on/off test circuit 100 is connected between the output pin P3 of the starting-up signal output pin P of starting key 20 on described mainboard 10 and Video Graphics Array (Video Graphics Array, the VGA) connector 40 of described mainboard.
Described mainboard 10 is also connected with a power supply unit 30, and described power supply unit 30 is powered for giving described mainboard 10.The starting-up signal output pin P of described starting key 20 connects the control pin B of described power supply unit 30, the grounding pin GND ground connection of described starting key 20.After described power supply unit 30 is electrically connected with city, the output pin A2 of described power supply unit 30 exports a 5V_STBY power supply.After described starting key 20 is pressed, the starting-up signal output pin P of described starting key 20 export in a flash low level signal to the control pin B of described power supply unit 30, the output pin A1 of described power supply unit 30 exports a 5V_SYS power supply and starts to power to described mainboard 10, and described mainboard 10 is started shooting.When the time that described starting key 20 is pressed exceedes low level shutdown requirement (being 4 seconds in present embodiment) of described mainboard 10, the starting-up signal output pin P of described starting key 20 exports the low level signal of one 4 seconds to the control pin B of described power supply unit 30, the output pin A1 of described power supply unit 30 stops exporting 5V_SYS power supply and stops powering to described mainboard 10 simultaneously, and described mainboard 10 shuts down.
The better embodiment of described on/off test circuit 100 comprises electronic switch (being field effect transistor Q1, Q4, Q5 and triode Q2, Q3 in the present embodiment), resistance R1-R6, electric capacity C1-C3 and diode D1, D2.The output pin A1 of described power supply unit 30 is connected with the grid of field effect transistor Q1 by described resistance R1, the grid of described field effect transistor Q1 is also by described electric capacity C1 ground connection, the drain electrode of described field effect transistor Q1 connects the output pin A2 of described power supply unit 30, the source ground of described field effect transistor Q1 by described resistance R2.The drain electrode of described field effect transistor Q1 is by described electric capacity C2 ground connection and the base stage connecting described triode Q2, and the collector of described triode Q2 connects the starting-up signal output pin P of described starting key 20, the grounded emitter of described triode Q2.
The output pin P3 of described VGA connector 40 connects the anode of described diode D1, the negative electrode of described diode D1 connects the base stage of described triode Q3 by described resistance R3, the collector of described triode Q3 connects the output pin A1 of described power supply unit 30, the grounded emitter of described triode Q3 by described resistance R4.The collector of described triode Q3 also connects the grid of described field effect transistor Q4 by described electric capacity C3, the grid of described field effect transistor Q4 also connects the output pin A1 of described power supply unit 30 by described resistance R5, the drain electrode of described field effect transistor Q4 connects the output pin A1 of described power supply unit 30, the source ground of described field effect transistor Q4 by described resistance R6.The drain electrode of described field effect transistor Q4 also connects the grid of described field effect transistor Q5, and the drain electrode of described field effect transistor Q5 connects the starting-up signal output pin P of described starting key 20, the source ground of described field effect transistor Q5.The grid of described field effect transistor Q5 also connects the anode of described diode D2, and the negative electrode of described diode D2 connects the negative electrode of described diode D1.After described mainboard 10 is started shooting, the output pin P3 of described VGA connector 40 can export an of short duration high level signal.
Be described to the principle of work of above-mentioned on/off test circuit 100 below:
During use, after described mainboard 10 is not started shooting and described power supply unit 30 is electrically connected with city, the output pin A2 of described power supply unit 30 continues to export 5V_STBY power supply signal, and the base stage of described triode Q2 receives the 5V_STBY power supply signal and then conducting that the output pin A2 from described power supply unit 30 exports.Now, the collector of described triode Q2 exports a low level signal.The control pin B of described power supply unit 30 opens after receiving the low level signal from described triode Q2 collector and passes through its output pin A1 output 5V_SYS power supply.The grid of described field effect transistor Q1 receives 5V_SYS power supply signal and then conducting, the base stage of described triode Q2 receives the low level signal and then cut-off that drain from described field effect transistor Q1, the collector of described triode Q2 stops output low level signal, the control pin B of described power supply unit 30 receives the moment low level signal and then start to power to described mainboard 10 of the collector from described triode Q2, and described mainboard 10 is started shooting.
After described mainboard 10 is started shooting, the output pin P3 of described VGA connector 40 exports high level signal in a flash.When described output pin P3 export be high level signal time, the base stage of described triode Q3 receives high level signal and then conducting, and the output pin A1 of described power supply unit 30 begins through described resistance R5 and charges to described electric capacity C3.The level signal moment of the grid of described field effect transistor Q4 becomes the drain electrode of low level and then described field effect transistor Q4 from high level and source electrode becomes cut-off from conducting, the grid of described field effect transistor Q5 receives 5V_SYS power supply signal from the output pin A1 of described power supply unit 30 and then conducting, and the control pin B of described power supply unit 30 starts to receive one from the low level signal of the drain electrode of described field effect transistor Q5.The output pin A1 of described power supply unit 30 exports 5V_SYS power supply signal to the base stage of described triode Q3 through described diode D2 simultaneously.The signal exported due to the output pin P3 of described VGA connector 40 is moment high level signal, when the signal that described output pin P3 exports becomes low level from high level, the 5V_SYS power supply signal that the output pin A1 from described power supply unit 30 that the base stage of described triode Q3 receives exports makes described triode Q3 to remain unchanged conducting.
After described electric capacity C3 makes described field effect transistor Q4 conducting in charging process, the grid of described field effect transistor Q5 receives a low level signal and then cut-off from the drain electrode of described field effect transistor Q4, and the drain electrode of described field effect transistor Q5 stops output low level signal.Meanwhile, the base stage of described triode Q3 stops receiving high level signal and then cut-off.The resistance value of the capacitance and described resistance R5 that set described electric capacity C3 makes described field effect transistor Q4 be 4 seconds from the time by the end of conducting, the control pin B of described power supply unit 30 is made to receive the low level signal of one 4 seconds, the output pin A1 of described power supply unit 30 stops exporting 5V_SYS power supply and stops powering to described mainboard 10 simultaneously, and described mainboard 10 shuts down.Described electric capacity C3 is discharged by described resistance R5, thinks that the test of switching on and shutting down is next time prepared.
After described mainboard 10 shuts down, the output pin A2 of described power supply unit 30 continues to export 5V_STBY power supply signal.Described electric capacity C1 starts electric discharge by described resistance R1, now described field effect transistor Q1 conducting.When the voltage of described electric capacity C1 is less than the forward voltage of described field effect transistor Q1, described field effect transistor Q1 becomes cut-off from conducting, and the base stage of described triode Q2 receives the 5V_STBY power supply signal and then conducting that the output pin A2 from described power supply unit 30 exports.And then the collector of described triode Q2 exports a low level signal to described power supply unit 30, open after the next described low level signal of control pin B reception of described power supply unit 30 and pass through its output pin A1 output 5V_SYS power supply.The grid of described field effect transistor Q1 receives 5V_SYS power supply signal and then conducting, the base stage of described triode Q2 receives low level signal from the drain electrode of described field effect transistor Q1 and then cut-off, the collector of described triode Q2 stops output low level signal, the control pin B of described power supply unit 30 receives the moment low level signal and then start to power to described mainboard 10 of the collector from described triode Q2, and described mainboard 10 is started shooting again.
Above-mentioned on/off test circuit 100 utilizes field effect transistor Q1, whether the conducting of triode Q2 controls described mainboard 10 starts shooting, utilize described triode Q3, field effect transistor Q4, whether Q5 conducting controls described mainboard 10 shuts down, circulate to simulate the switching on and shutting down operation of described mainboard 10 and so forth to test the switching on and shutting down of mainboard.
As can be seen from description above, described field effect transistor Q1, Q4, Q5 and triode Q2, Q3
All play the effect of electronic switch, in other embodiments, described field effect transistor Q1, Q4, Q5 and triode Q2, Q3 also can replace with other electronic switches.
Claims (6)
1. an on/off test circuit, for carrying out switching on and shutting down test to a mainboard, described mainboard also connects a power supply unit, described power supply unit is used for described main board power supply, described on/off test circuit is connected between the output pin of the video graphics array connector on the starting-up signal output pin of starting key on described mainboard and described mainboard, the starting-up signal output pin of described starting key connects the control pin of described power supply unit, described on/off test circuit comprises the first to the 5th electronic switch, first to the 6th resistance, first and second electric capacity and first and second diode, first output pin of described power supply unit is connected with the control end of described first electronic switch by described first resistance, the control end of described first electronic switch is also by described first capacity earth, the first end of described first electronic switch connects the second output pin of described power supply unit by described second resistance, second end ground connection of described first electronic switch, the first end of described first electronic switch connects the control end of described second electronic switch, the first end of described second electronic switch connects the starting-up signal output pin of described starting key, second end ground connection of described second electronic switch, first output pin of the video graphics array connector on described mainboard connects the anode of described first diode, the negative electrode of described first diode connects the control end of described 3rd electronic switch by described 3rd resistance, the first end of described 3rd electronic switch connects the first output pin of described power supply unit by described 4th resistance, second end ground connection of described 3rd electronic switch, the first end of described 3rd electronic switch also connects the control end of described 4th electronic switch by described second electric capacity, the control end of described 4th electronic switch also connects the first output pin of described power supply unit by described 5th resistance, the first end of described 4th electronic switch connects the first output pin of described power supply unit by described 6th resistance, second end ground connection of described 4th resistance switch, the first end of described 4th electronic switch also connects the control end of described 5th electronic switch, the first end of described 5th electronic switch connects the starting-up signal output pin of described starting key, second end ground connection of described 5th electronic switch, the control end of described 5th electronic switch also connects the anode of described second diode, the negative electrode of described second diode connects the negative electrode of described first diode, when the control end of the described first to the 5th electronic switch receives high level signal, the first end of the described first to the 5th electronic switch and the conducting respectively of the second end, when the control end of the described first to the 5th electronic switch receives low level signal, first end and second end of the described first to the 5th electronic switch disconnect.
2. on/off test circuit as claimed in claim 1, is characterized in that: described on/off test circuit also comprises one the 3rd electric capacity, and the control end of described second electronic switch is by described 3rd capacity earth.
3. on/off test circuit as claimed in claim 1, is characterized in that: the capacitance of described second electric capacity and the resistance value of described 5th resistance make described power supply unit to shut down requirement to the low level that the time of described second capacitor charging extremely described 4th electronic switch conducting meets described mainboard.
4. on/off test circuit as claimed in claim 3, is characterized in that: the time of described 4th electronic switch conducting is 4 seconds.
5. on/off test circuit as claimed in claim 1, it is characterized in that: described first, the 4th and the 5th electronic switch is N channel field-effect pipe, the grid of described N channel field-effect pipe, drain electrode and source electrode be the control end of corresponding first, the 4th and the 5th electronic switch, first end and the second end respectively.
6. on/off test circuit as claimed in claim 1, it is characterized in that: second and third electronic switch described is NPN triode, the base stage of described NPN triode, emitter and collector be the control end of second and third electronic switch corresponding, first end and the second end respectively.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310719137.8A CN104731680A (en) | 2013-12-24 | 2013-12-24 | Startup and shutdown testing circuit |
| TW102149373A TW201530302A (en) | 2013-12-24 | 2013-12-31 | Circuit of on/off switch test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310719137.8A CN104731680A (en) | 2013-12-24 | 2013-12-24 | Startup and shutdown testing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104731680A true CN104731680A (en) | 2015-06-24 |
Family
ID=53455591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310719137.8A Pending CN104731680A (en) | 2013-12-24 | 2013-12-24 | Startup and shutdown testing circuit |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104731680A (en) |
| TW (1) | TW201530302A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105700985A (en) * | 2016-01-15 | 2016-06-22 | 合肥联宝信息技术有限公司 | Notebook computer loop test tool |
| CN109188036A (en) * | 2018-09-07 | 2019-01-11 | 深圳欣旺达智能科技有限公司 | The circuit of circulation timing test can be achieved |
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| TW201230512A (en) * | 2011-01-04 | 2012-07-16 | Hon Hai Prec Ind Co Ltd | Cap and electronic device using the same |
| CN202841089U (en) * | 2012-06-08 | 2013-03-27 | 国基电子（上海）有限公司 | Power on-off circuit and electronic device having power on-off circuit |
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- 2013-12-24 CN CN201310719137.8A patent/CN104731680A/en active Pending
- 2013-12-31 TW TW102149373A patent/TW201530302A/en unknown
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| CN201000602Y (en) * | 2007-01-05 | 2008-01-02 | 鸿富锦精密工业（深圳）有限公司 | Computer shut-down energy-saving circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105700985A (en) * | 2016-01-15 | 2016-06-22 | 合肥联宝信息技术有限公司 | Notebook computer loop test tool |
| CN105700985B (en) * | 2016-01-15 | 2018-12-28 | 合肥联宝信息技术有限公司 | Loop test jig for laptop |
| CN109188036A (en) * | 2018-09-07 | 2019-01-11 | 深圳欣旺达智能科技有限公司 | The circuit of circulation timing test can be achieved |
| CN109188036B (en) * | 2018-09-07 | 2021-03-23 | 深圳欣旺达智能科技有限公司 | Circuit capable of realizing cycle timing test |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201530302A (en) | 2015-08-01 |
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Application publication date: 20150624 |