TW201530302A - Circuit of on/off switch test - Google Patents

Circuit of on/off switch test Download PDF

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Publication number
TW201530302A
TW201530302A TW102149373A TW102149373A TW201530302A TW 201530302 A TW201530302 A TW 201530302A TW 102149373 A TW102149373 A TW 102149373A TW 102149373 A TW102149373 A TW 102149373A TW 201530302 A TW201530302 A TW 201530302A
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Taiwan
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switch
electronic switch
power supply
output pin
electronic
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TW102149373A
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Chinese (zh)
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Jin-Liang Xiong
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Hongfujin Prec Ind Wuhan
Hon Hai Prec Ind Co Ltd
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Publication of TW201530302A publication Critical patent/TW201530302A/en

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Abstract

A circuit of on/off switch test is utilized to test on /off switch of a main board. The circuit of on/off switch test includes first to fifth electronic switches, first to sixth resistors, first and second capacitor, and first and second diodes. Connected or not of the first and second electronic switches manage power on of the main board. Connected or not of the third to fifth electronic switches manage power off of the main board.

Description

開關機測試電路Switching machine test circuit

本發明係關於一種開關機測試電路。The invention relates to a switch test circuit.

習知的電腦直流開關機測試通常需要測試工程師多次手動按電腦的電源按鍵上電與斷電來驗證電腦的品質與可靠度,需要花費很大的人力。The conventional computer DC switch test usually requires the test engineer to manually press the power button of the computer to power on and off to verify the quality and reliability of the computer, which requires a lot of manpower.

鑒於以上內容,有必要提供一種開關機測試電路,以自動對電腦的主機板進行開關機測試。In view of the above, it is necessary to provide a switch test circuit to automatically test the on/off of the computer's motherboard.

一種開關機測試電路,用於對一主機板進行開關機測試,該主機板還連接一電源供應器,該電源供應器用於給該主機板供電,該開關機測試電路連接在該主機板上開機按鍵的開機訊號輸出引腳及該主機板上的視頻圖形陣列連接器的輸出引腳之間,該開機按鍵的開機訊號輸出引腳連接該電源供應器的控制引腳,該開關機測試電路包括第一至第五電子開關、第一至第六電阻、第一及第二電容以及第一及第二二極體,該電源供應器的第一輸出引腳透過該第一電阻與該第一電子開關的控制端相連,該第一電子開關的控制端還透過該第一電容接地,該第一電子開關的第一端透過該第二電阻連接該電源供應器的第二輸出引腳,該第一電子開關的第二端接地,該第一電子開關的第一端連接該第二電子開關的控制端,該第二電子開關的第一端連接該開機按鍵的開機訊號輸出引腳,該第二電子開關的第二端接地,該主機板上的視頻圖形陣列連接器的第一輸出引腳連接該第一二極體的陽極,該第一二極體的陰極透過該第三電阻連接該第三電子開關的控制端,該第三電子開關的第一端透過該第四電阻連接該電源供應器的第一輸出引腳,該第三電子開關的第二端接地,該第三電子開關的第一端還透過該第二電容連接該第四電子開關的控制端,該第四電子開關的控制端還透過該第五電阻連接該電源供應器的第一輸出引腳,該第四電子開關的第一端透過該第六電阻連接該電源供應器的第一輸出引腳,該第四電阻開關的第二端接地,該第四電子開關的第一端還連接該第五電子開關的控制端,該第五電子開關的第一端連接該開機按鍵的開機訊號輸出引腳,該第五電子開關的第二端接地,該第五電子開關的控制端還連接該第二二極體的陽極,該第二二極體的陰極連接該第一二極體的陰極;當該第一至第五電子開關的控制端接收高電平訊號時,該第一至第五電子開關的第一端與第二端分別導通,當該第一至第五電子開關的控制端接收低電平訊號時,該第一至第五電子開關的第一端與第二端斷開。A switch test circuit for testing a switchboard of a motherboard, the motherboard is also connected to a power supply, the power supply is used to supply power to the motherboard, and the test circuit of the switch is connected to the motherboard Between the boot signal output pin of the button and the output pin of the video graphics array connector on the motherboard, the boot signal output pin of the power button is connected to the control pin of the power supply, and the switch test circuit includes First to fifth electronic switches, first to sixth resistors, first and second capacitors, and first and second diodes, the first output pin of the power supply is transmitted through the first resistor and the first The control end of the electronic switch is connected to the control terminal of the first electronic switch, and the first end of the first electronic switch is connected to the second output pin of the power supply through the second resistor. The first end of the first electronic switch is connected to the control end of the second electronic switch, and the first end of the second electronic switch is connected to the boot of the power button An output pin, the second end of the second electronic switch is grounded, and a first output pin of the video graphics array connector on the motherboard is connected to an anode of the first diode, a cathode of the first diode Connecting the third electronic switch to the control end of the third electronic switch, the first end of the third electronic switch is connected to the first output pin of the power supply through the fourth resistor, and the second end of the third electronic switch Grounding, the first end of the third electronic switch is further connected to the control end of the fourth electronic switch through the second capacitor, and the control end of the fourth electronic switch is further connected to the first output of the power supply through the fifth resistor a pin, the first end of the fourth electronic switch is connected to the first output pin of the power supply through the sixth resistor, the second end of the fourth resistance switch is grounded, and the first end of the fourth electronic switch is further Connected to the control end of the fifth electronic switch, the first end of the fifth electronic switch is connected to the power-on signal output pin of the power-on button, the second end of the fifth electronic switch is grounded, and the control end of the fifth electronic switch is further Connect the first An anode of the diode, a cathode of the second diode is connected to a cathode of the first diode; and when the control ends of the first to fifth electronic switches receive a high level signal, the first to fifth electrons The first end and the second end of the switch are respectively turned on. When the control ends of the first to fifth electronic switches receive the low level signal, the first ends and the second ends of the first to fifth electronic switches are disconnected.

上述開關機測試電路利用第一及第二電子開關的導通與否控制該主機板開機,利用該第三至第五電子開關的導通與否控制該主機板關機,如此往復迴圈以模擬該主機板的開關機操作,以減少人力需求。The switch test circuit controls whether the motherboard is powered on by using the first and second electronic switches, and controls whether the motherboard is turned off by using the third to fifth electronic switches, so that the loop is reciprocated to simulate the host. The board is switched on and off to reduce manpower requirements.

圖1是本發明開關機測試電路的較佳實施方式的電路圖。BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram of a preferred embodiment of a switch test circuit of the present invention.

請參考圖1,本發明開關機測試電路100用於對一主機板10進行開關機測試,該開關機測試電路100連接於該主機板10上開機按鍵20的開機訊號輸出引腳P及該主機板的視頻圖形陣列(Video Graphics Array, VGA)連接器40的輸出引腳P3之間。Please refer to FIG. 1 , the switch test circuit 100 of the present invention is used for performing a switch test on a motherboard 10 , and the switch test circuit 100 is connected to the boot signal output pin P of the boot button 20 on the motherboard 10 and the host. Between the output pins P3 of the board's Video Graphics Array (VGA) connector 40.

該主機板10還連接有一電源供應器30,該電源供應器30用於給該主機板10供電。該開機按鍵20的開機訊號輸出引腳P連接該電源供應器30的控制引腳B,該開機按鍵20的接地引腳GND接地。當該電源供應器30與市電連接後,該電源供應器30的輸出引腳A2輸出一5V_STBY電源。當該開機按鍵20被按下後,該開機按鍵20的開機訊號輸出引腳P輸出一瞬間低電平訊號給該電源供應器30的控制引腳B,該電源供應器30的輸出引腳A1輸出一5V_SYS電源並開始給該主機板10供電,該主機板10開機。當該開機按鍵20被按下的時間超過該主機板10的低電平關機要求(本實施方式中為4秒)時,該開機按鍵20的開機訊號輸出引腳P輸出一4秒的低電平訊號給該電源供應器30的控制引腳B,該電源供應器30的輸出引腳A1停止輸出5V_SYS電源同時停止給該主機板10供電,該主機板10關機。The motherboard 10 is also connected to a power supply 30 for powering the motherboard 10. The power-on signal output pin P of the power-on button 20 is connected to the control pin B of the power supply 30, and the ground pin GND of the power-on button 20 is grounded. When the power supply 30 is connected to the mains, the output pin A2 of the power supply 30 outputs a 5V_STBY power supply. When the power-on button 20 is pressed, the power-on signal output pin P of the power-on button 20 outputs a momentary low-level signal to the control pin B of the power supply 30, and the output pin A1 of the power supply 30 A 5V_SYS power supply is output and power is supplied to the motherboard 10, and the motherboard 10 is powered on. When the power-on button 20 is pressed for more than the low-level shutdown requirement of the motherboard 10 (4 seconds in this embodiment), the power-on signal output pin P of the power-on button 20 outputs a low power of 4 seconds. The signal signal is given to the control pin B of the power supply 30. The output pin A1 of the power supply 30 stops outputting the 5V_SYS power supply while stopping the power supply to the motherboard 10. The motherboard 10 is turned off.

該開關機測試電路100的較佳實施方式包括電子開關(在本實施方式中為場效應電晶體Q1、Q4、Q5及電晶體Q2、Q3)、電阻R1-R6、電容C1-C3以及二極體D1、D2。該電源供應器30的輸出引腳A1透過該電阻R1與場效應電晶體Q1的閘極相連,該場效應電晶體Q1的閘極還透過該電容C1接地,該場效應電晶體Q1的汲極透過該電阻R2連接該電源供應器30的輸出引腳A2,該場效應電晶體Q1的源極接地。該場效應電晶體Q1的汲極透過該電容C2接地及連接該電晶體Q2的基極,該電晶體Q2的基極連接該開機按鍵20的開機訊號輸出引腳P,該電晶體Q2的射極接地。The preferred embodiment of the switch test circuit 100 includes an electronic switch (in the present embodiment, field effect transistors Q1, Q4, Q5 and transistors Q2, Q3), resistors R1-R6, capacitors C1-C3, and two poles. Body D1, D2. The output pin A1 of the power supply 30 is connected to the gate of the field effect transistor Q1 through the resistor R1. The gate of the field effect transistor Q1 is also grounded through the capacitor C1. The drain of the field effect transistor Q1 The output pin A2 of the power supply 30 is connected through the resistor R2, and the source of the field effect transistor Q1 is grounded. The drain of the field effect transistor Q1 is grounded through the capacitor C2 and connected to the base of the transistor Q2. The base of the transistor Q2 is connected to the start signal output pin P of the power button 20, and the transistor Q2 is shot. Extremely grounded.

該VGA連接器40的輸出引腳P3連接該二極體D1的陽極,該二極體D1的陰極透過該電阻R3連接該電晶體Q3的基極,該電晶體Q3的基極透過該電阻R4連接該電源供應器30的輸出引腳A1,該電晶體Q3的射極接地。該電晶體Q3的基極還透過該電容C3連接該場效應電晶體Q4的閘極,該場效應電晶體Q4的閘極還透過該電阻R5連接該電源供應器30的輸出引腳A1,該場效應電晶體Q4的汲極透過該電阻R6連接該電源供應器30的輸出引腳A1,該場效應電晶體Q4的源極接地。該場效應電晶體Q4的汲極還連接該場效應電晶體Q5的閘極,該場效應電晶體Q5的汲極連接該開機按鍵20的開機訊號輸出引腳P,該場效應電晶體Q5的源極接地。該場效應電晶體Q5的閘極還連接該二極體D2的陽極,該二極體D2的陰極連接該二極體D1的陰極。當該主機板10開機後,該VGA連接器40的輸出引腳P3會輸出一短暫的高電平訊號。The output pin P3 of the VGA connector 40 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the base of the transistor Q3 through the resistor R3. The base of the transistor Q3 is transmitted through the resistor R4. The output pin A1 of the power supply 30 is connected, and the emitter of the transistor Q3 is grounded. The base of the transistor Q3 is also connected to the gate of the field effect transistor Q4 through the capacitor C3. The gate of the field effect transistor Q4 is also connected to the output pin A1 of the power supply 30 through the resistor R5. The drain of the field effect transistor Q4 is connected to the output pin A1 of the power supply 30 through the resistor R6, and the source of the field effect transistor Q4 is grounded. The drain of the field effect transistor Q4 is also connected to the gate of the field effect transistor Q5. The drain of the field effect transistor Q5 is connected to the turn-on signal output pin P of the power-on button 20, and the field effect transistor Q5 The source is grounded. The gate of the field effect transistor Q5 is also connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the cathode of the diode D1. When the motherboard 10 is powered on, the output pin P3 of the VGA connector 40 outputs a short high level signal.

下面將對上述開關機測試電路100的工作原理進行說明:The working principle of the above-mentioned switch test circuit 100 will be described below:

使用時,在該主機板10未開機而該電源供應器30與市電連接後,該電源供應器30的輸出引腳A2持續輸出5V_STBY電源訊號,該電晶體Q2的基極接收來自該電源供應器30的輸出引腳A2輸出的5V_STBY電源訊號進而導通。此時,該電晶體Q2的基極輸出一低電平訊號。該電源供應器30的控制引腳B接收來自該電晶體Q2基極的低電平訊號後開啟並透過其輸出引腳A1輸出5V_SYS電源。該場效應電晶體Q1的閘極接收5V_SYS電源訊號進而導通,該電晶體Q2的基極接收來自該場效應電晶體Q1汲極的低電平訊號進而截止,該電晶體Q2的基極停止輸出低電平訊號,該電源供應器30的控制引腳B接收來自該電晶體Q2的基極的瞬間低電平訊號進而開始給該主機板10供電,該主機板10開機。In use, after the motherboard 10 is not powered on and the power supply 30 is connected to the mains, the output pin A2 of the power supply 30 continuously outputs a 5V_STBY power signal, and the base of the transistor Q2 is received from the power supply. The 5V_STBY power signal output from the output pin A2 of 30 is turned on. At this time, the base of the transistor Q2 outputs a low level signal. The control pin B of the power supply 30 receives the low level signal from the base of the transistor Q2 and turns on and outputs 5V_SYS power through its output pin A1. The gate of the field effect transistor Q1 receives the 5V_SYS power signal and is turned on. The base of the transistor Q2 receives the low level signal from the drain of the field effect transistor Q1 and is turned off, and the base of the transistor Q2 stops outputting. The low level signal, the control pin B of the power supply 30 receives the instantaneous low level signal from the base of the transistor Q2 to start supplying power to the motherboard 10, and the motherboard 10 is powered on.

該主機板10開機後,該VGA連接器40的輸出引腳P3輸出一瞬間高電平訊號。當該輸出引腳P3輸出的是高電平訊號時,該電晶體Q3的基極接收高電平訊號進而導通,該電源供應器30的輸出引腳A1開始透過該電阻R5給該電容C3充電。該場效應電晶體Q4的閘極的電平訊號瞬間由高電平變為低電平進而該場效應電晶體Q4的汲極和源極由導通變為截止,該場效應電晶體Q5的閘極接收來自該電源供應器30的輸出引腳A1的5V_SYS電源訊號進而導通,該電源供應器30的控制引腳B開始接收一來自該場效應電晶體Q5的汲極的低電平訊號。同時該電源供應器30的輸出引腳A1經該二極體D2輸出5V_SYS電源訊號給該電晶體Q3的基極。由於該VGA連接器40的輸出引腳P3輸出的訊號為瞬間高電平訊號,當該輸出引腳P3輸出的訊號從高電平變為低電平時,該電晶體Q3的基極接收的來自該電源供應器30的輸出引腳A1輸出的5V_SYS電源訊號使得該電晶體Q3依舊導通。After the motherboard 10 is powered on, the output pin P3 of the VGA connector 40 outputs a momentary high level signal. When the output pin P3 outputs a high level signal, the base of the transistor Q3 receives a high level signal and is turned on, and the output pin A1 of the power supply 30 starts to charge the capacitor C3 through the resistor R5. . The level signal of the gate of the field effect transistor Q4 is instantaneously changed from a high level to a low level, and then the drain and source of the field effect transistor Q4 are turned off, and the gate of the field effect transistor Q5 is turned off. The pole receives the 5V_SYS power signal from the output pin A1 of the power supply 30 to be turned on again, and the control pin B of the power supply 30 begins to receive a low level signal from the drain of the field effect transistor Q5. At the same time, the output pin A1 of the power supply 30 outputs a 5V_SYS power signal to the base of the transistor Q3 via the diode D2. Since the signal outputted by the output pin P3 of the VGA connector 40 is an instantaneous high level signal, when the signal outputted by the output pin P3 changes from a high level to a low level, the base of the transistor Q3 receives the received signal. The 5V_SYS power signal outputted by the output pin A1 of the power supply 30 causes the transistor Q3 to remain conductive.

當該電容C3在充電過程中使得該場效應電晶體Q4導通後,該場效應電晶體Q5的閘極從該場效應電晶體Q4的汲極接收一低電平訊號進而截止,該場效應電晶體Q5的汲極停止輸出低電平訊號。同時,該電晶體Q3的基極停止接收高電平訊號進而截止。設定該電容C3的電容值與該電阻R5的電阻值使得該場效應電晶體Q4從截止到導通的時間為4秒,使得該電源供應器30的控制引腳B接收一4秒的低電平訊號,該電源供應器30的輸出引腳A1停止輸出5V_SYS電源同時停止給該主機板10供電,該主機板10關機。該電容C3透過該電阻R5放電,以為下一次開關機測試做準備。When the capacitor C3 turns on the field effect transistor Q4 during charging, the gate of the field effect transistor Q5 receives a low level signal from the drain of the field effect transistor Q4, and the field effect is turned off. The drain of crystal Q5 stops outputting a low level signal. At the same time, the base of the transistor Q3 stops receiving the high level signal and turns off. The capacitance value of the capacitor C3 and the resistance value of the resistor R5 are set such that the time period from the off to the on time of the field effect transistor Q4 is 4 seconds, so that the control pin B of the power supply 30 receives a low level of 4 seconds. Signal, the output pin A1 of the power supply 30 stops outputting the 5V_SYS power supply and stops supplying power to the motherboard 10, and the motherboard 10 is turned off. The capacitor C3 is discharged through the resistor R5 to prepare for the next switch test.

該主機板10關機後,該電源供應器30的輸出引腳A2持續輸出5V_STBY電源訊號。該電容C1透過該電阻R1開始放電,此時該場效應電晶體Q1導通。當該電容C1的電壓小於該場效應電晶體Q1的導通電壓時,該場效應電晶體Q1由導通變為截止,該電晶體Q2的基極接收來自該電源供應器30的輸出引腳A2輸出的5V_STBY電源訊號進而導通。進而該電晶體Q2的基極輸出一低電平訊號給該電源供應器30,該電源供應器30的控制引腳B接收來該低電平訊號後開啟並透過其輸出引腳A1輸出5V_SYS電源。該場效應電晶體Q1的閘極接收5V_SYS電源訊號進而導通,該電晶體Q2的基極接收來自該場效應電晶體Q1的汲極的低電平訊號進而截止,該電晶體Q2的基極停止輸出低電平訊號,該電源供應器30的控制引腳B接收來自該電晶體Q2的基極的瞬間低電平訊號進而開始給該主機板10供電,該主機板10再一次開機。After the motherboard 10 is turned off, the output pin A2 of the power supply 30 continuously outputs a 5V_STBY power signal. The capacitor C1 starts to discharge through the resistor R1, and the field effect transistor Q1 is turned on at this time. When the voltage of the capacitor C1 is less than the turn-on voltage of the field effect transistor Q1, the field effect transistor Q1 is turned off by conduction, and the base of the transistor Q2 receives the output of the output pin A2 from the power supply 30. The 5V_STBY power signal is turned on. Further, the base of the transistor Q2 outputs a low level signal to the power supply 30. The control pin B of the power supply 30 receives the low level signal and then turns on and outputs 5V_SYS power through the output pin A1. . The gate of the field effect transistor Q1 receives the 5V_SYS power signal and is turned on. The base of the transistor Q2 receives the low level signal from the drain of the field effect transistor Q1 and turns off, and the base of the transistor Q2 stops. The low level signal is output, and the control pin B of the power supply 30 receives the instantaneous low level signal from the base of the transistor Q2 to start supplying power to the motherboard 10. The motherboard 10 is turned on again.

上述開關機測試電路100利用場效應電晶體Q1、電晶體Q2的導通與否控制該主機板10開機,利用該電晶體Q3、場效應電晶體Q4、Q5導通與否控制該主機板10關機,如此往復迴圈以模擬該主機板10的開關機操作以對主機板的開關機進行測試。The switch test circuit 100 controls whether the motherboard 10 is powered on by using the field effect transistor Q1 or the transistor Q2, and controls whether the motherboard 10 is turned off by using the transistor Q3 or the field effect transistors Q4 and Q5. The reciprocating loop is thus performed to simulate the on/off operation of the motherboard 10 to test the on/off of the motherboard.

從上面的描述可以看出,該場效應電晶體Q1、Q4、Q5及電晶體Q2、Q3均起到電子開關的作用,其他實施方式中,該場效應電晶體Q1、Q4、Q5及電晶體Q2、Q3亦可用其他電子開關來代替。As can be seen from the above description, the field effect transistors Q1, Q4, Q5 and the transistors Q2, Q3 both function as electronic switches. In other embodiments, the field effect transistors Q1, Q4, Q5 and the transistor Q2 and Q3 can also be replaced by other electronic switches.

綜上所述,本發明確已符合發明專利的要件,爰依法提出專利申請。惟,以上所述者僅為本發明的較佳實施方式,本發明的範圍並不以上述實施方式為限,舉凡熟悉本案技藝的人士援依本發明的精神所作的等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and those skilled in the art will be able to make equivalent modifications or variations in accordance with the spirit of the present invention. It should be covered by the following patent application.

100‧‧‧開關機測試電路100‧‧‧Switching machine test circuit

10‧‧‧主機板10‧‧‧ motherboard

20‧‧‧開機按鍵20‧‧‧Power button

30‧‧‧電源供應器30‧‧‧Power supply

40‧‧‧VGA連接器40‧‧‧ VGA connector

Q1、Q4、Q5‧‧‧場效應電晶體Q1, Q4, Q5‧‧‧ field effect transistor

Q2、Q3‧‧‧電晶體Q2, Q3‧‧‧ transistor

R1-R6‧‧‧電阻R1-R6‧‧‧ resistance

C1-C3‧‧‧電容C1-C3‧‧‧ capacitor

D1、D2‧‧‧二極體D1, D2‧‧‧ diode

no

100‧‧‧開關機測試電路 100‧‧‧Switching machine test circuit

10‧‧‧主機板 10‧‧‧ motherboard

20‧‧‧開機按鍵 20‧‧‧Power button

30‧‧‧電源供應器 30‧‧‧Power supply

40‧‧‧VGA連接器 40‧‧‧ VGA connector

Q1、Q4、Q5‧‧‧場效應電晶體 Q1, Q4, Q5‧‧‧ field effect transistor

Q2、Q3、‧‧‧電晶體 Q2, Q3, ‧‧ ‧ transistors

R1-R6‧‧‧電阻 R1-R6‧‧‧ resistance

C1-C3‧‧‧電容 C1-C3‧‧‧ capacitor

D1、D2‧‧‧二極體 D1, D2‧‧‧ diode

Claims (6)

一種開關機測試電路,用於對一主機板進行開關機測試,該主機板還連接一電源供應器,該電源供應器用於給該主機板供電,該開關機測試電路連接在該主機板上開機按鍵的開機訊號輸出引腳及該主機板上的視頻圖形陣列連接器的輸出引腳之間,該開機按鍵的開機訊號輸出引腳連接該電源供應器的控制引腳,該開關機測試電路包括第一至第五電子開關、第一至第六電阻、第一及第二電容以及第一及第二二極體,該電源供應器的第一輸出引腳透過該第一電阻與該第一電子開關的控制端相連,該第一電子開關的控制端還透過該第一電容接地,該第一電子開關的第一端透過該第二電阻連接該電源供應器的第二輸出引腳,該第一電子開關的第二端接地,該第一電子開關的第一端連接該第二電子開關的控制端,該第二電子開關的第一端連接該開機按鍵的開機訊號輸出引腳,該第二電子開關的第二端接地,該主機板上的視頻圖形陣列連接器的第一輸出引腳連接該第一二極體的陽極,該第一二極體的陰極透過該第三電阻連接該第三電子開關的控制端,該第三電子開關的第一端透過該第四電阻連接該電源供應器的第一輸出引腳,該第三電子開關的第二端接地,該第三電子開關的第一端還透過該第二電容連接該第四電子開關的控制端,該第四電子開關的控制端還透過該第五電阻連接該電源供應器的第一輸出引腳,該第四電子開關的第一端透過該第六電阻連接該電源供應器的第一輸出引腳,該第四電阻開關的第二端接地,該第四電子開關的第一端還連接該第五電子開關的控制端,該第五電子開關的第一端連接該開機按鍵的開機訊號輸出引腳,該第五電子開關的第二端接地,該第五電子開關的控制端還連接該第二二極體的陽極,該第二二極體的陰極連接該第一二極體的陰極;當該第一至第五電子開關的控制端接收高電平訊號時,該第一至第五電子開關的第一端與第二端分別導通,當該第一至第五電子開關的控制端接收低電平訊號時,該第一至第五電子開關的第一端與第二端斷開。A switch test circuit for testing a switchboard of a motherboard, the motherboard is also connected to a power supply, the power supply is used to supply power to the motherboard, and the test circuit of the switch is connected to the motherboard Between the boot signal output pin of the button and the output pin of the video graphics array connector on the motherboard, the boot signal output pin of the power button is connected to the control pin of the power supply, and the switch test circuit includes First to fifth electronic switches, first to sixth resistors, first and second capacitors, and first and second diodes, the first output pin of the power supply is transmitted through the first resistor and the first The control end of the electronic switch is connected to the control terminal of the first electronic switch, and the first end of the first electronic switch is connected to the second output pin of the power supply through the second resistor. The first end of the first electronic switch is connected to the control end of the second electronic switch, and the first end of the second electronic switch is connected to the boot of the power button An output pin, the second end of the second electronic switch is grounded, and a first output pin of the video graphics array connector on the motherboard is connected to an anode of the first diode, a cathode of the first diode Connecting the third electronic switch to the control end of the third electronic switch, the first end of the third electronic switch is connected to the first output pin of the power supply through the fourth resistor, and the second end of the third electronic switch Grounding, the first end of the third electronic switch is further connected to the control end of the fourth electronic switch through the second capacitor, and the control end of the fourth electronic switch is further connected to the first output of the power supply through the fifth resistor a pin, the first end of the fourth electronic switch is connected to the first output pin of the power supply through the sixth resistor, the second end of the fourth resistance switch is grounded, and the first end of the fourth electronic switch is further Connected to the control end of the fifth electronic switch, the first end of the fifth electronic switch is connected to the power-on signal output pin of the power-on button, the second end of the fifth electronic switch is grounded, and the control end of the fifth electronic switch is further Connect the first An anode of the diode, a cathode of the second diode is connected to a cathode of the first diode; and when the control ends of the first to fifth electronic switches receive a high level signal, the first to fifth electrons The first end and the second end of the switch are respectively turned on. When the control ends of the first to fifth electronic switches receive the low level signal, the first ends and the second ends of the first to fifth electronic switches are disconnected. 如申請專利範圍第1項所述之開關機測試電路,還包括一第三電容,該第二電子開關的控制端透過該第三電容接地。The switch test circuit of claim 1, further comprising a third capacitor, wherein the control end of the second electronic switch is grounded through the third capacitor. 如申請專利範圍第1項所述之開關機測試電路,其中該第二電容的電容值與該第五電阻的電阻值使得該電源供應器給該第二電容充電至該第四電子開關導通的時間符合該主機板的低電平關機要求。The switch test circuit of claim 1, wherein the capacitance value of the second capacitor and the resistance value of the fifth resistor cause the power supply to charge the second capacitor to be electrically connected to the fourth electronic switch. The time meets the low-level shutdown requirement of the motherboard. 如申請專利範圍第3項所述之開關機測試電路,其中該第四電子開關導通的時間為4秒。The switch test circuit of claim 3, wherein the fourth electronic switch is turned on for 4 seconds. 如申請專利範圍第1項所述之開關機測試電路,其中該第一、第四及第五電子開關為N溝道場效應電晶體,該N溝道場效應電晶體的閘極、汲極及源極分別對應第一、第四及第五電子開關的控制端、第一端及第二端。The switch test circuit of claim 1, wherein the first, fourth and fifth electronic switches are N-channel field effect transistors, gates, drains and sources of the N-channel field effect transistors The poles respectively correspond to the control ends, the first ends and the second ends of the first, fourth and fifth electronic switches. 如申請專利範圍第1項所述之開關機測試電路,其中該第二及第三電子開關為NPN電晶體,該NPN電晶體的基極、射極及基極分別對應第二及第三電子開關的控制端、第一端及第二端。
The switch test circuit of claim 1, wherein the second and third electronic switches are NPN transistors, and the base, the emitter and the base of the NPN transistor correspond to the second and third electrons, respectively. The control end, the first end and the second end of the switch.
TW102149373A 2013-12-24 2013-12-31 Circuit of on/off switch test TW201530302A (en)

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