CN114779572A - Manufacturing method of alignment mark and wafer bonding method - Google Patents

Manufacturing method of alignment mark and wafer bonding method Download PDF

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Publication number
CN114779572A
CN114779572A CN202210677258.XA CN202210677258A CN114779572A CN 114779572 A CN114779572 A CN 114779572A CN 202210677258 A CN202210677258 A CN 202210677258A CN 114779572 A CN114779572 A CN 114779572A
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Prior art keywords
alignment mark
wafer
exposure
different
manufacturing
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CN202210677258.XA
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CN114779572B (en
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张祥平
李海峰
古哲安
林士程
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Nexchip Semiconductor Corp
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Nexchip Semiconductor Corp
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/42Alignment or registration features, e.g. alignment marks on the mask substrates

Abstract

The invention provides a manufacturing method of an alignment mark and a wafer bonding method, comprising the steps of providing a standard mask, wherein an alignment mark pattern is formed on the standard mask; calculating the difference between the exposure area of the wafer to be marked and the exposure area of the standard mask plate, and adjusting the exposure parameters of an exposure machine according to the difference; and respectively transferring the alignment mark patterns on the standard mask plate to the wafers with different exposure areas according to the exposure parameters. The invention can make alignment marks on wafers of different sizes through one standard mask, thereby saving the cost of the mask. Furthermore, in the wafer bonding process, the same mask can be used for manufacturing alignment marks on different carrier wafers to match with the device wafers, so that the bonding requirements of different products are met, one mask can be saved for each product needing carrier wafer bonding, and the wafer bonding method has practical benefits.

Description

Manufacturing method of alignment mark and wafer bonding method
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of an alignment mark and a wafer bonding method.
Background
With the rapid development of Semiconductor technology, Complementary Metal Oxide Semiconductor (CMOS) and Micro Electro Mechanical Systems (MEMS) devices become the most mainstream technologies in the markets of various sensor products, and with the continuous progress of the technologies, such products will be developed toward smaller size, higher electrical performance and lower loss.
The CMOS image sensor is a core component of an image pickup apparatus, and realizes an image pickup function by converting an optical signal into an electrical signal. It has been widely used in various fields due to its advantages of low power consumption and high signal-to-noise ratio. Taking Backside Illumination complementary metal oxide semiconductor Image Sensors (CIS BSIs) as an example, in an existing manufacturing process, a device wafer is formed first, a pixel device, a logic device and a metal interconnection structure are formed in the device wafer, then a carrier wafer is bonded with the device wafer, then the back of the device wafer is thinned, and finally a subsequent process of forming a complementary metal oxide semiconductor Image sensor (CIS) on the back of the device wafer is performed.
Wafer bonding related to the CIS BSI process in the prior art is wafer bonding of a CIS Device wafer (Device wafer) and a carrier wafer (Carry wafer), the wafer is turned over through bonding, and light can enter from a substrate of the CIS Device wafer to perform photoelectric reaction. In the process of Bonding the carrier wafer and the device wafer (Bonding process), Bonding marks (Bonding marks) need to be respectively made on the carrier wafer and the device wafer through a photolithography process to ensure perfect Bonding of the carrier wafer and the device wafer, but frame sizes (frame sizes) of different products are different, a mask (mask) needs to be manufactured for the carrier wafer for each product with the frame size to match the frame size of the device wafer in the Bonding process to complete Bonding of the carrier wafer and the device wafer, the carrier wafer is only a carrier of a subsequent process, and the mask cost for manufacturing the carrier wafer for products with different frame sizes is high.
Disclosure of Invention
The invention aims to provide a measuring method of alignment precision, which aims to improve the alignment measuring precision of a metal layer and reduce the product rejection risk caused by inaccurate measurement.
The invention provides a method for manufacturing an alignment mark, which comprises the following steps:
providing a standard mask, and forming an alignment mark pattern on the standard mask;
providing a wafer to be marked with different exposure areas;
calculating the difference between the exposure area of the wafer and the exposure area of the standard mask plate, and adjusting the exposure parameters of an exposure machine according to the difference; and the number of the first and second groups,
and respectively transferring the alignment mark patterns on the standard mask plate to the wafer with different exposure areas according to the exposure parameters.
Optionally, the alignment mark pattern is located at a central position of the peripheral cutting street.
Optionally, the minimum light leakage range of the exposure machine is 1 mm.
Optionally, a light shielding tape is disposed around the alignment mark pattern.
Optionally, the light-shielding band is a Cr light-shielding band, and a size of the light-shielding band is greater than or equal to the minimum light leakage range.
Optionally, adjusting the exposure parameter of the exposure tool according to the difference includes:
compensating the difference to an exposure transfer to set a light leakage range of an exposure parameter such that only the alignment mark pattern is exposed.
Correspondingly, the invention also provides a wafer bonding method, which comprises the following steps:
providing a device wafer, and manufacturing a first alignment mark on the device wafer;
providing a bearing wafer, and manufacturing a second alignment mark matched with the first alignment mark on the bearing wafer;
aligning the carrier wafer and the device wafer for bonding through the first alignment mark and the second alignment mark;
the second alignment mark is fabricated on a different carrier wafer by the above-mentioned method for fabricating alignment marks so as to match different device wafers.
Optionally, the second alignment marks formed on the carrier wafer with different exposure areas are the same.
Optionally, the first alignment mark and the second alignment mark are both centrosymmetric patterns.
Optionally, the device wafer and the carrier wafer are fusion bonded.
In summary, the method for manufacturing the alignment mark provided by the present invention includes providing a standard reticle, on which an alignment mark pattern is formed; calculating the difference between the size of the exposure area of the wafer to be marked and the exposure area of the standard mask plate, and adjusting the exposure parameters of an exposure machine according to the difference; and respectively transferring the alignment mark patterns on the standard mask plate to the wafer with different exposure areas according to the exposure parameters. The invention can make alignment marks on different wafers through one standard mask, thereby saving the cost of the mask. Furthermore, in the wafer bonding method provided by the invention, the same mask can be used for manufacturing the alignment marks on different carrier wafers to match with the device wafers, so that the bonding requirements of different products are met, and thus, one mask can be saved for each product needing carrier wafer bonding, and the wafer bonding method has practical benefits.
Drawings
FIG. 1A is a schematic diagram of a process for forming alignment marks in a wafer bonding process;
FIG. 1B is a schematic diagram of another product illustrating the process of forming alignment marks in a wafer bonding process;
FIG. 2 is a flow chart of a method for forming an alignment mark according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a standard reticle in a method for manufacturing an alignment mark according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an alignment mark and a position of the alignment mark on a wafer in a method for manufacturing the alignment mark according to an embodiment of the invention;
fig. 5 is a schematic diagram of an exposure area of a wafer in a method for manufacturing an alignment mark according to an embodiment of the invention.
Detailed Description
The method for manufacturing the alignment mark and the wafer bonding method according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and drawings, it being understood, however, that the concepts of the present invention may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. The drawings are in a very simplified form and are not to scale, merely for convenience and clarity in describing embodiments of the invention.
The terms "first," "second," and the like in the description are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in other sequences than described or illustrated herein. Similarly, if a method described herein comprises a series of steps, the order in which these steps are presented herein is not necessarily the only order in which these steps can be performed, and some of the described steps may be omitted and/or some other steps not described herein may be added to the method. Although elements in one drawing may be readily identified as such in other drawings, the present disclosure does not identify each element as being identical to each other in every drawing for clarity of description. Furthermore, it should be noted that the techniques of this disclosure may be implemented in hardware and/or software (including firmware, microcode, etc.).
In a wafer Bonding process (Bonding process), alignment marks (Bonding marks) need to be formed on a Device wafer (Device wafer) and a carrier wafer (Carry wafer) respectively through a photolithography process to ensure perfect Bonding of the carrier wafer and the Device wafer. However, frame sizes (frame sizes) of different products are different, that is, different products have different exposure areas (Shot sizes) when making alignment marks, and during the bonding process, a mask (mask) needs to be made for the carrier wafer for each frame size product to match the frame size of the device wafer, so as to complete the bonding of the carrier wafer and the device wafer. If Product a and Product B in fig. 1A and 1B have different frame sizes, Device masks and Carry masks of different sizes are needed to respectively manufacture alignment marks on the carrier wafer and the Device wafer, the carrier wafer is only a carrier of a subsequent process, and masks of corresponding sizes are adopted to manufacture carrier wafer alignment marks for products of different frame sizes in the bonding process, so that the mask manufacturing cost is high.
In order to solve the above problems, the present invention provides a method for manufacturing an alignment mark, comprising providing a standard mask plate, wherein an alignment mark pattern is formed on the standard mask plate; calculating a difference value between an exposure area of the wafer to be marked and an exposure area of the standard mask, and adjusting an exposure parameter of an exposure machine according to the difference value; and respectively transferring the alignment mark patterns on the standard mask plate to wafers with different exposure areas according to the exposure parameters. The invention can make the alignment mark on different wafers through one standard mask, thereby saving the cost of the mask. Furthermore, in the wafer bonding process, the same mask can be used for manufacturing alignment marks on different bearing wafers to match with the device wafers, so that the bonding requirements of different products are met, and therefore, one mask can be saved for each product needing to bear wafer bonding, and the wafer bonding method has practical benefits.
Fig. 2 is a flowchart of a method for manufacturing an alignment mark according to this embodiment, and as shown in fig. 2, the method for manufacturing an alignment mark according to this embodiment includes:
step S01: providing a standard mask, and forming an alignment mark pattern on the standard mask;
step S02: providing a wafer to be marked with different exposure areas;
step S03: calculating the difference between the exposure area of the wafer and the exposure area of the standard mask plate, and adjusting the exposure parameters of an exposure machine according to the difference; and the number of the first and second groups,
step S04: and respectively transferring the alignment mark patterns on the standard mask plate to the wafer with different exposure areas according to the exposure parameters.
Fig. 3 is a schematic structural diagram of a standard mask in the method for manufacturing an alignment mark provided in this embodiment, fig. 4 is a schematic diagram of an alignment mark and a position thereof on a wafer in the method for manufacturing an alignment mark provided in this embodiment, and fig. 5 is a schematic diagram of an exposure area on a wafer in the method for manufacturing an alignment mark provided in an embodiment of the present invention. The method for manufacturing the alignment mark according to the present embodiment will be described in detail with reference to fig. 2 to 5.
First, step S01 is performed to provide a standard reticle on which an alignment mark pattern is formed. As shown in FIG. 3, the area A where the alignment mark pattern is located at the center of the peripheral cutting street of the standard reticle (Golden mask), for example, the size of the cutting street is 80um, and the size of the area where the alignment mark pattern is located is 60 um. A light shielding band is arranged around the alignment mark pattern, the light shielding band is, for example, a Cr light shielding band, the size of the light shielding band is greater than or equal to the minimum light leakage range of the exposure machine, the minimum light leakage range of the exposure machine is less than or equal to 1mm, and the minimum light leakage of the exposure machine is, for example, 0.7mm or 1 mm. In other embodiments of the present invention, the alignment mark pattern may also be located at any other position of the peripheral cutting street of the standard mask, and further, the alignment mark pattern may also be located at any position of the internal cutting street of the standard mask, and it is only necessary to provide a light-shielding tape with sufficient size around the alignment mark pattern.
Then, step S02 is executed to provide the wafer to be marked with different exposure areas. The alignment mark to be marked subsequently on the wafer is located at the center of the peripheral scribe line of the Chip (Chip), and as shown in fig. 4 and 5, the boundary of the exposure area (Shot size) of the wafer is located at the center of the peripheral scribe line.
And then, executing step S03, calculating the difference between the exposure area of the wafer and the exposure area of the standard mask, and adjusting the exposure parameters of an exposure machine according to the difference. For example, as shown in fig. 5, the boundary of the exposure area (Shot size) and the Field of view (Field size) in the mask (mask) can be considered as the center position of the peripheral scribe line, where the Field of view (Field size) refers to the range of the light leakage of the shutter (blade) at one time, and the Step diameter (Step size) of the exposure stage for the second exposure relative to the first exposure is equal to the exposure area (Shot size). Wherein, adjusting the exposure parameters of the exposure machine according to the difference comprises: and compensating the difference value to the offset (blank shift) of a shutter in the exposure process of the exposure machine, and setting the light leakage range of the exposure parameters so as to expose the alignment mark pattern only. The calculated relative position of the standard mask is compensated to the offset of a shutter in the exposure process of an exposure machine, so that the alignment marks of the mask and the wafer are in the same position, the shutter (blank) of the exposure machine is adjusted to set the light leakage range of the standard mask, and the effect of only exposing the alignment mark pattern is achieved.
Then, step S04 is executed to transfer the alignment mark patterns on the standard reticle to the wafers with different exposure areas according to the exposure parameters. Different wafers have different exposure areas (shot sizes) and different differences relative to the sizes of the exposure areas on the standard mask, the exposure parameters of an exposure machine during exposure are adjusted according to the calculated differences, so that only the alignment mark patterns on the standard mask are exposed, photoetching patterns are formed on the photoresist on the surface of the wafer correspondingly, then alignment marks are formed on the wafer through dry etching, and then the photoresist is removed to finish the manufacture of the alignment marks.
Correspondingly, the embodiment further provides a wafer bonding method, including:
providing a device wafer, and manufacturing a first alignment mark on the device wafer;
providing a carrier wafer, and manufacturing a second alignment mark matched with the first alignment mark on the carrier wafer; and the number of the first and second groups,
aligning the carrier wafer and the device wafer for bonding through the first alignment mark and the second alignment mark;
the second alignment mark is fabricated on a different carrier wafer by the above-mentioned method for fabricating alignment marks so as to match different device wafers.
Specifically, in this embodiment, the first alignment mark and the second alignment mark are both centrosymmetric patterns. And bonding the device wafer and the bearing wafer in a fusion bonding mode. And when the wafer bonding is carried out, the second alignment marks manufactured on the bearing wafer with different exposure areas by adopting the alignment mark manufacturing method are the same. Namely, the sizes of the device wafers are different when different products are bonded, but the same alignment mark is adopted for bonding. The embodiment can use the same standard mask to manufacture the alignment mark for the bearing wafer with different exposure areas so as to match the device wafer, thereby meeting the bonding requirements of products with different sizes, saving one mask for each product needing bearing wafer bonding and having practical benefit.
In summary, the present invention provides a method for manufacturing an alignment mark and a wafer bonding method, including providing a standard reticle, on which an alignment mark pattern is formed; calculating the difference between the exposure area of the wafer to be marked and the exposure area of the standard mask plate, and adjusting the exposure parameters of an exposure machine according to the difference; and respectively transferring the alignment mark patterns on the standard mask plate to wafers with different exposure areas according to the exposure parameters. The invention can make the alignment mark on the wafer with different exposure areas through a standard mask plate, thereby saving the cost of the mask plate. Furthermore, in the wafer bonding process, the same mask can be used for manufacturing alignment marks on different bearing wafers to match with the device wafers, so that the bonding requirements of different products are met, one mask can be saved for each product needing bearing wafer bonding, and the wafer bonding method has practical benefits.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.

Claims (10)

1. A method for manufacturing an alignment mark, comprising:
providing a standard mask, and forming an alignment mark pattern on the standard mask;
providing a wafer to be marked with different exposure areas;
calculating the difference between the sizes of the exposure areas of the wafers with different sizes and the size of the exposure area of the standard mask, and adjusting the exposure parameters of an exposure machine according to the difference; and the number of the first and second groups,
and respectively transferring the alignment mark patterns on the standard mask plate to the wafer with different exposure areas according to the exposure parameters.
2. The method of claim 1, wherein the alignment mark pattern is located at a center of the peripheral scribe line.
3. The method of claim 2, wherein a minimum light leakage range of the exposure tool is less than or equal to 1 mm.
4. The method of claim 3, wherein a light shielding tape is disposed around the alignment mark pattern.
5. The method of claim 4, wherein the light-shielding strip is a Cr light-shielding strip, and a size of the light-shielding strip is greater than or equal to the minimum light leakage range.
6. The method of claim 2, wherein adjusting the exposure parameters of the exposure tool according to the difference comprises:
and compensating the difference value into the offset control of the shutter in the exposure process to set the light leakage range of the exposure parameter so as to expose only the alignment mark pattern.
7. A wafer bonding method, comprising:
providing a device wafer, and manufacturing a first alignment mark on the device wafer;
providing a carrier wafer, and manufacturing a second alignment mark matched with the first alignment mark on the carrier wafer;
aligning the carrier wafer and the device wafer for bonding through the first alignment mark and the second alignment mark;
wherein the second alignment mark is fabricated on a different carrier wafer to match a different device wafer using the method of fabricating an alignment mark according to any of claims 1-6.
8. The wafer bonding method according to claim 7, wherein the second alignment marks formed on the carrier wafer having different exposure areas are the same.
9. The wafer bonding method of claim 7, wherein the first alignment mark and the second alignment mark are both in a central symmetrical pattern.
10. The wafer bonding method of claim 7, wherein the device wafer and the carrier wafer are fusion bonded.
CN202210677258.XA 2022-06-16 2022-06-16 Manufacturing method of alignment mark and wafer bonding method Active CN114779572B (en)

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Citations (11)

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US5161176A (en) * 1989-09-21 1992-11-03 Canon Kabushiki Kaisha Exposure apparatus
JPH04348343A (en) * 1991-05-27 1992-12-03 Matsushita Electron Corp Reticle for reduction stepper
JPH06163358A (en) * 1992-11-18 1994-06-10 Hitachi Ltd Exposure method and aligner
US6003223A (en) * 1998-11-19 1999-12-21 Headway Technologies, Inc. Common alignment target image field stitching method for step and repeat alignment in photoresist
US20050048654A1 (en) * 2003-09-02 2005-03-03 Wen-Bin Wu Method of evaluating reticle pattern overlay registration
JP2007019307A (en) * 2005-07-08 2007-01-25 Sharp Corp Method of forming mark for alignment and for verifying positioning accuracy in semiconductor wafer
JP2008205163A (en) * 2007-02-20 2008-09-04 Ricoh Co Ltd Semiconductor wafer and reticle as well as method of exposure employing the reticle
US20090066927A1 (en) * 2007-09-07 2009-03-12 Canon Kabushiki Kaisha Exposure apparatus, exposure method, and device manufacturing method
CN101436006A (en) * 2008-12-17 2009-05-20 上海微电子装备有限公司 Double-surface position alignment apparatus and method
CN108461479A (en) * 2017-02-22 2018-08-28 中芯国际集成电路制造(上海)有限公司 A kind of preparation method of alignment mark
CN109411449A (en) * 2018-11-21 2019-03-01 武汉新芯集成电路制造有限公司 Wafer assembly and wafer alignment method

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5161176A (en) * 1989-09-21 1992-11-03 Canon Kabushiki Kaisha Exposure apparatus
JPH04348343A (en) * 1991-05-27 1992-12-03 Matsushita Electron Corp Reticle for reduction stepper
JPH06163358A (en) * 1992-11-18 1994-06-10 Hitachi Ltd Exposure method and aligner
US6003223A (en) * 1998-11-19 1999-12-21 Headway Technologies, Inc. Common alignment target image field stitching method for step and repeat alignment in photoresist
US20050048654A1 (en) * 2003-09-02 2005-03-03 Wen-Bin Wu Method of evaluating reticle pattern overlay registration
JP2007019307A (en) * 2005-07-08 2007-01-25 Sharp Corp Method of forming mark for alignment and for verifying positioning accuracy in semiconductor wafer
JP2008205163A (en) * 2007-02-20 2008-09-04 Ricoh Co Ltd Semiconductor wafer and reticle as well as method of exposure employing the reticle
US20090066927A1 (en) * 2007-09-07 2009-03-12 Canon Kabushiki Kaisha Exposure apparatus, exposure method, and device manufacturing method
CN101436006A (en) * 2008-12-17 2009-05-20 上海微电子装备有限公司 Double-surface position alignment apparatus and method
CN108461479A (en) * 2017-02-22 2018-08-28 中芯国际集成电路制造(上海)有限公司 A kind of preparation method of alignment mark
CN109411449A (en) * 2018-11-21 2019-03-01 武汉新芯集成电路制造有限公司 Wafer assembly and wafer alignment method

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