CN114726325A - Stacking power amplifier, circuit board and electronic equipment - Google Patents
Stacking power amplifier, circuit board and electronic equipment Download PDFInfo
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- CN114726325A CN114726325A CN202210232136.XA CN202210232136A CN114726325A CN 114726325 A CN114726325 A CN 114726325A CN 202210232136 A CN202210232136 A CN 202210232136A CN 114726325 A CN114726325 A CN 114726325A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
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Abstract
The invention discloses a stacked power amplifier, a circuit board and electronic equipment, which comprise an input matching network, an amplifier module and an output matching network which are sequentially connected, wherein the input end of the input matching network is the input end of the stacked power amplifier, the first output end of the input matching network is connected with the first input end of the amplifier module, and the second output end of the input matching network is connected with the second input end of the amplifier module; the amplifier module comprises six stacked transistors, third ends of two transistors positioned at the first stage in the six transistors are respectively used as a first input end and a second input end of the amplifier module, a first output end of the amplifier module is connected with a first input end of the output matching network, and a second output end of the amplifier module is connected with a second input end of the output matching network; the output end of the output matching network is the output end of the stacked power amplifier; the input matching network comprises two transformers, and parasitic capacitance exists between the amplifier module and the input matching network.
Description
Technical Field
The invention relates to the technical field of power amplifiers, in particular to a stacked power amplifier, a circuit board and electronic equipment.
Background
As operating frequencies become higher and process nodes become smaller, the design of millimeter wave power amplifiers becomes challenging. Mainly the transistors have lower and lower operating voltages, which makes the design of high output power and high efficiency power amplifiers more and more difficult.
There are two common methods for increasing output power: the first method is to improve the output power by multi-path power synthesis; the second method raises the power supply voltage by stacking transistors to raise the output power.
The power supply voltage can be improved by multiple times by stacking the transistors on the basis of not changing the working voltage of the transistors, and the output power can be directly improved by multiple times under the ideal condition.
However, the design needs to solve the problem of voltage distribution of each stacked transistor, and needs to prevent a transistor from breakdown due to an excessive voltage applied to one transistor, so that the circuit fails. Referring to fig. 1, in the prior art, an inductor is connected in parallel to the drain of the transistor of the stacked amplifier module for phase adjustment, and as can be seen from fig. 2, the circuit structure formed occupies a larger area, thereby increasing the area of the chip and further increasing the cost of the chip.
Disclosure of Invention
In view of this, the present invention provides a stacked power amplifier, a circuit board and an electronic device, so as to effectively reduce the area of the stacked power amplifier and significantly improve the phase adjustment effect between the optimized power amplifier and the input matching network.
In a first aspect, the present invention provides a stacked power amplifier comprising: the input matching network, the amplifier module and the output matching network are sequentially connected, wherein the input end of the input matching network is the input end of the stacked power amplifier, the first output end of the input matching network is connected with the first input end of the amplifier module, and the second output end of the input matching network is connected with the second input end of the amplifier module; the input end of the stacked power amplifier is connected with an external input signal; the amplifier module comprises six stacked transistors, third ends of two transistors positioned at one level in the six transistors are respectively used as a first input end and a second input end of the amplifier module, a first output end of the amplifier module is connected with a first input end of the output matching network, and a second output end of the amplifier module is connected with a second input end of the output matching network; the output end of the output matching network is the output end of the stacked power amplifier; the input matching network comprises two transformers, and parasitic capacitance exists between the amplifier module and the input matching network.
Optionally, the input matching network of the stacked power amplifier provided by the present invention includes: a first transformer T1 and a second transformer T2, and the first transformer T1 and the second transformer T2 are laminated step-up transformers; a first input end of the first transformer T1 is an input end of the input matching network, a second input end of the first transformer T1 is connected in series with a first input end of the second transformer T2, a first output end of the first transformer T1 is a first output end of the input matching network, and a second output end of the first transformer T1 is connected in series with a first output end of the second transformer T2; a second input end of the second transformer T2 is grounded, and a second output end of the second transformer T2 is a second output end of the input matching network; wherein, a first parasitic capacitance exists between the primary coil and the secondary coil of the first transformer T1; a second parasitic capacitance exists between the primary coil and the secondary coil of the second transformer T2.
Optionally, in the stacked power amplifier provided by the present invention, the amplifier module includes: a first transistor Q1, a first terminal of which is electrically connected to the first inductor L1, a second terminal of which is grounded, and a third terminal of which is used as a first input terminal of the power amplification module; the first inductor L1 is connected to a first power supply; a second transistor Q2, a first terminal of which is electrically connected to the second inductor L2, a second terminal of which is grounded, and a third terminal of which is used as a second input terminal of the power amplification module; the second inductor L2 is connected to the first power supply; a third transistor Q3, a first terminal of which is connected to the second power supply, a second terminal of which is electrically connected to the third terminal of the first transistor Q1, and a third terminal of which is electrically connected to the fifth transistor Q5; a fourth transistor Q4, a first terminal of which is connected to the second power supply, a second terminal of which is electrically connected to the third terminal of the second transistor Q2, and a third terminal of which is electrically connected to the sixth transistor Q6; a fifth transistor Q5, a first terminal of which is connected to the third power supply, a second terminal of which is electrically connected to the third terminal of the third transistor Q3, and a third terminal of which is the first output terminal of the power amplification module; a sixth transistor Q6 has a first terminal connected to the third power supply, a second terminal electrically connected to the third terminal of the fourth transistor Q4, and a third terminal serving as the second output terminal of the power amplification module.
Optionally, in the stacked power amplifier provided by the present invention, a third parasitic capacitance exists between the first inductor L1 and the secondary winding of the first transformer T1 in the input matching network; a fourth parasitic capacitance exists between the second inductor L2 and the secondary winding of the second transformer T2.
Optionally, in the stacked power amplifier provided by the present invention, a fifth parasitic capacitance exists between the first inductor L1 and the primary winding of the first transformer T1 in the input matching network; a sixth parasitic capacitance exists between the second inductor L2 and the primary winding of the second transformer T2.
Optionally, the output matching network of the stacked power amplifier provided by the present invention includes: a third transformer T3 and a fourth transformer T4; a first input end of the third transformer T3 is a first input end of an output matching network, a second input end of the third transformer T3 is connected with a fourth power supply, a first output end of the third transformer T3 is an output end of the output matching network, and a second output end of the third transformer T3 is connected with a first output end of the fourth transformer T4; a first input terminal of the fourth transformer T4 is connected to the fourth power supply, a second input terminal of the fourth transformer T4 is a first input terminal of the output matching network, and a second output terminal of the fourth transformer T4 is grounded.
In a second aspect, the invention also provides a circuit board comprising a stacked power amplifier of any one of the aspects provided by the invention.
In a third aspect, the invention further provides an electronic device including the circuit board provided by the invention.
The invention has the following beneficial effects:
the invention provides a stacked power amplifier, which comprises an input matching network, an amplifier module and an output matching network which are sequentially connected, wherein the input end of the input matching network is the input end of the stacked power amplifier, the first output end of the input matching network is connected with the first input end of the amplifier module, and the second output end of the input matching network is connected with the second input end of the amplifier module; the input end of the stacked power amplifier is connected with an external input signal; the amplifier module comprises six stacked transistors, third ends of two transistors positioned at a first stage in the six transistors are respectively used as a first input end and a second input end of the amplifier module, a first output end of the amplifier module is connected with a first input end of the output matching network, and a second output end of the amplifier module is connected with a second input end of the output matching network; the output end of the output matching network is the output end of the stacked power amplifier; the input matching network comprises two transformers, and parasitic capacitance exists between the amplifier module and the input matching network. Therefore, compared with the prior art, the invention mainly integrates the inductors in parallel connection of the two transistors positioned at the first stage in the amplifier module into the input matching network to form two transformers, thereby reducing the occupied area of the inductors in parallel connection around the two transistors, further reducing the occupied area of a chip, and simultaneously carrying out phase adjustment through the parasitic capacitance between the amplifier module and the input matching network and the parasitic capacitance of the transformers, thereby optimizing the phase adjustment effect between the power amplifier and the input matching network.
Drawings
FIG. 1 is a schematic diagram of a stacked power amplifier according to the prior art;
FIG. 2 is a schematic layout diagram of a stacked power amplifier in the prior art;
fig. 3 is a schematic structural diagram of a stacked power amplifier according to an embodiment of the present invention;
fig. 4 is a layout diagram of a stacked power amplifier according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a transformer coil according to an embodiment of the present invention;
fig. 6 is a second schematic structural diagram of a transformer coil according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The stacked power amplifier provided by the embodiment of the invention abandons the mode of connecting inductors in parallel at the periphery of a core circuit in the phase adjusting network of the traditional stacked power amplifier, integrates the phase adjusting inductors into an input matching network, and simultaneously adjusts the phase by utilizing the coupling between the phase adjusting inductors and the input matching network.
The stacked amplifier provided by the present invention is explained below with reference to the drawings.
Referring to fig. 1, the present invention provides a stacked power amplifier 100 comprising: an input matching network 10, an amplifier module 20 and an output matching network 30 connected in series.
Wherein, the input end of the input matching network 10 is the input end of the stacked power amplifier 100; a first output end of the input matching network 10 is connected to a first input end of the amplifier module 20, and a second output end of the input matching network 10 is connected to a second input end of the amplifier module 20; the input end of the stacked power amplifier 100 is connected to an external input signal, that is, the input end of the stacked power amplifier 100 is connected to the single-ended radio frequency signal RFIN;
the amplifier module 20 includes six stacked transistors (a first transistor Q1-a sixth transistor Q6 in fig. 3), and the third ends of two transistors at the first stage of the six transistors are respectively used as the first input end and the second input end of the amplifier module 20, the first output end of the amplifier module 20 is connected with the first input end of the output matching network 30, and the second output end of the amplifier module 20 is connected with the second input end of the output matching network 30;
the output terminal of the output matching network 30 is the output terminal RFOUT of the stacked power amplifier 100;
wherein the input matching network 10 includes two transformers (a first transformer T1 and a second transformer T2 in fig. 3), a parasitic capacitance exists between the amplifier module 20 and the input matching network 10.
There is a parasitic capacitance between the amplifier module 20 and the input matching network 10, including: the capacitance between the primary coil and the secondary coil of the transformer, the inductance in the amplifier module and the capacitance existing in the primary coil and the secondary coil in the transformer. Each of the modules will be described in detail below in the description.
The invention provides a stacked power amplifier, which comprises an input matching network, an amplifier module and an output matching network which are sequentially connected, wherein the input end of the input matching network is the input end of the stacked power amplifier, the first output end of the input matching network is connected with the first input end of the amplifier module, and the second output end of the input matching network is connected with the second input end of the amplifier module; the input end of the stacked power amplifier is connected with an external input signal; the amplifier module comprises six stacked transistors, third ends of two transistors positioned at the first stage in the six transistors are respectively used as a first input end and a second input end of the amplifier module, a first output end of the amplifier module is connected with a first input end of the output matching network, and a second output end of the amplifier module is connected with a second input end of the output matching network; the output end of the output matching network is the output end of the stacked power amplifier; the input matching network comprises two transformers, and parasitic capacitance exists between the amplifier module and the input matching network. Therefore, compared with the prior art, the invention mainly integrates the inductors in parallel connection of the two transistors positioned at the first stage in the amplifier module into the input matching network to form two transformers, thereby reducing the occupied area of the inductors in parallel connection around the two transistors, further reducing the occupied area of a chip, and simultaneously carrying out phase adjustment through the parasitic capacitance between the amplifier module and the input matching network and the parasitic capacitance of the transformers, thereby optimizing the phase adjustment effect between the power amplifier and the input matching network.
In some embodiments, the present invention provides the above stacked power amplifier, wherein the input matching network 10 comprises: a first transformer T1 and a second transformer T2, and the first transformer T1 and the second transformer T2 are laminated step-up transformers;
a first input terminal of the first transformer T1 is an input terminal of the input matching network 10, a second input terminal of the first transformer T1 is connected in series with a first input terminal of the second transformer T2, a first output terminal of the first transformer T1 is a first output terminal of the input matching network 10, and a second output terminal of the first transformer T1 is connected in series with a first output terminal of the second transformer T2;
a second input end of the second transformer T2 is grounded GND, and a second output end of the second transformer T2 is a second output end of the input matching network 10;
a first parasitic capacitance is formed between a primary coil and a secondary coil of the first transformer T1, and the turn ratio of the primary coil to the secondary coil is 2: 1; a second parasitic capacitance is formed between the primary coil and the secondary coil of the second transformer T2; the turn ratio of the primary coil to the secondary coil is 2: 1.
specifically, in the present invention, the drain of the first stage transistor in the amplifier module is connected to the secondary windings of the first transformer T1 and the second transformer T2, respectively, so that the first stage transistor is shunted by using the inductor in the transformer, and the inductor is further integrated in the input matching network, thereby centralizing the circuit layout and reducing the layout area of the circuit.
In some embodiments, the present invention provides the above stacked power amplifier, wherein the amplifier module comprises: a first transistor Q1, a first terminal of which is electrically connected to the first inductor L1, a second terminal of which is grounded GND, and a third terminal of which serves as a first input terminal of the power amplification module 20; the first inductor L1 is connected to a first power source VG 1; a second transistor Q2, a first terminal of which is electrically connected to the second inductor L2, a second terminal of which is grounded GND, and a third terminal of which serves as a second input terminal of the power amplification module 20; the second inductor L2 is connected with a first power source VG 1; a third transistor Q3, a first terminal of which is connected to the second power source VG2, a second terminal of which is electrically connected to the third terminal of the first transistor Q1, and a third terminal of which is electrically connected to the fifth transistor Q5; a fourth transistor Q4, a first terminal of which is connected to the second power source VG2, a second terminal of which is electrically connected to the third terminal of the second transistor Q2, and a third terminal of which is electrically connected to the sixth transistor Q6; a fifth transistor Q5, a first terminal of which is connected to the third power source VG3, a second terminal of which is electrically connected to the third terminal of the third transistor Q3, and the third terminal of which is the first output terminal of the power amplification module 20; the sixth transistor Q6 has a first terminal connected to the third power source VG3, a second terminal electrically connected to the third terminal of the fourth transistor Q4, and a third terminal serving as the second output terminal of the power amplification module 20.
In a specific embodiment, a gate of the first transistor Q1 is connected in series with the first inductor L1 and then electrically connected to the first power source VG1, a source of the first transistor Q1 is grounded, and a drain of the first transistor Q1 is electrically connected to the first output terminal of the input matching network 10, that is, connected to the first output terminal of the first transformer T1; the gate of the third transistor Q3 is connected to the second power source VG2, and the source of the third transistor Q3 is connected to the drain of the first transistor Q1 and is electrically connected to the first output terminal of the input matching network 10; the gate of the fifth transistor Q5 is connected to the third power source VG3, the source of the fifth transistor Q5 is connected to the drain of the third transistor Q3, the drain of the fifth transistor Q5 is used as the first output terminal of the amplifier module 20, and the drain of the fifth transistor Q5 is connected to the third transformer T3 of the output matching network 30. Similarly, the gate of the second transistor Q2 is connected in series with the second inductor L2 and then electrically connected to the first power source VG1, the source of the second transistor Q1 is grounded to GND, and the drain of the second transistor Q1 is electrically connected to the second output terminal of the input matching network 10, that is, to the second output terminal of the second transformer T2; the gate of the fourth transistor Q4 is connected to the second power source VG2, and the source of the fourth transistor Q4 is connected to the drain of the second transistor Q2 and is electrically connected to the second output terminal of the input matching network 10; the gate of the sixth transistor Q6 is connected to the third power source VG3, the source of the sixth transistor Q6 is connected to the drain of the fourth transistor Q4, the drain of the sixth transistor Q6 is used as the first output terminal of the amplifier module 20, and the drain of the sixth transistor Q6 is connected to the fourth transformer T4 of the output matching network 30.
Specifically, VG1, VG2, VG3, and VDD are set according to the amplification, cut-off, and saturation states of the transistors in order to realize the power amplification function. After an external signal is input into the amplifier module through the input matching network, the parasitic capacitance of the transistor is eliminated through the resonance effect of the inductors connected in parallel to the first transistor Q1 and the second transistor Q2, and the signal is output to the output matching network for output through the current amplification effect of the three-level transistor, so that the amplification effect of the signal is realized. The respective power supply voltages are set to VG1=0.3V, VG2=1.2V, VG3=2.1V, VDD =2.7V, depending on the amplification effect of the transistor and the bias voltage property. And aiming at each transistor, if the drain voltage is greater than the grid voltage and greater than the source voltage, the transistors are in an amplification state.
In some embodiments, the stacked power amplifier provided by the present invention, the first inductor L1 and the secondary winding of the first transformer T1 in the input matching network 10 have a third parasitic capacitance; a fourth parasitic capacitance exists between the second inductor L2 and the secondary winding of the second transformer T2.
In some embodiments, the stacked power amplifier provided by the present invention, the first inductor L1 and the primary winding of the first transformer T1 in the input matching network 10 have a fifth parasitic capacitance; a sixth parasitic capacitance exists between the second inductor L2 and the primary winding of the second transformer T2.
Specifically, the first inductor L1 is used for phase adjustment of the input signal of the first transistor Q1, and the second inductor L2 is used for phase adjustment of the input signal of the second transistor Q2. A secondary coil in the first transformer T1 is connected in parallel with the drain of the first transistor Q1 and is used for resonating the parasitic capacitance of the first transistor Q1; the secondary winding of the second transformer T2 is connected in parallel with the drain of the second transistor Q2 for resonating the parasitic capacitance of the second transistor Q2. In the invention, the influence between the parasitic capacitances is eliminated by the first parasitic capacitance and the third and fifth parasitic capacitances generated between the first inductor L1 and the first transformer T1.
In some embodiments, the present invention provides the above stacked power amplifier, wherein the output matching network 30 comprises: a third transformer T3 and a fourth transformer T4; a first input end of the third transformer T3 is a first input end of the output matching network 30, a second input end of the third transformer T3 is connected with the fourth power supply VDD, a first output end of the third transformer T3 is an output end of the output matching network 30, and a second output end of the third transformer T3 is connected with a first output end of the fourth transformer T4; a first input terminal of the fourth transformer T4 is connected to the fourth power supply VDD, a second input terminal of the fourth transformer T4 is a first input terminal of the output matching network 30, and a second output terminal of the fourth transformer T4 is grounded to GND.
It should be noted that, in the embodiment of the present invention, only an N-type transistor is used as an example for description, and a transistor in the amplifier module may also be a P-type transistor, or a mixture of an N-type transistor and a P-type transistor, which is not specifically limited herein.
Therefore, the inductor connected with the drain electrode in parallel is integrated into the input matching network to form the transformer in the input matching network, so that the layout area occupied by connecting the inductor in parallel at the periphery of the circuit is saved. Specifically, referring to fig. 4, compared with the layout of fig. 2, about 30% of the chip area is saved, thereby reducing the chip cost.
In some embodiments, in order to further reduce the layout area occupied by the power amplifier, the stacked power amplifier provided by the present invention has a long and narrow coil in each of the secondary coils of the first transformer and the second transformer. In a specific embodiment, referring to fig. 5, the coils (secondary coils of the first transformer and the second transformer) connected in parallel with the drain electrode have an inner diameter length L =56um, a width W =9um, a coil width D =3um, and a distance S =2um between the two coils.
In some embodiments, the stacked power amplifier provided by the present invention may be designed using 45nm SOI technology with a center frequency of 28 GHz.
In addition, for further describing a specific connection manner of the inductor connected in parallel with the drain in the stacked power amplifier provided by the embodiment of the invention, referring to fig. 6, a first conducting line layer S1, a first insulating layer (not shown in fig. 6), a second conducting line layer S2, a second insulating layer (not shown in fig. 6), and three metal layers (not shown in fig. 6) insulated from each other are located on the substrate from top to bottom. The second wire layer S2 may be a primary coil and a secondary coil of the first transformer T1 and the second transformer T2, and the two turns of wires of the second wire layer S2 are electrically connected at the portion having overlapping intersection through the via V in the first insulating layer and the first wire layer S1. While the first wiring layer S1 further includes a wiring layer for electrical connection with an input signal and a transistor.
Based on the same inventive concept, the invention also provides a circuit board, which comprises a substrate and the stacked power amplifier provided by the embodiment of the invention on the substrate.
Based on the same inventive concept, the invention also provides electronic equipment comprising the circuit board provided by the embodiment of the invention.
In summary, in order to solve the problem that the parasitic capacitance of each stacked transistor causes asymmetric drain-source voltage phase distribution and thus causes the efficiency and the saturation output power of the power amplifier to decrease, in the present invention, a shunt inductor is connected in parallel to the drain of the first stage transistor (the first transistor Q1 and the second transistor Q2) of the amplifier module, so that the shunt inductor is integrated into the input matching network to form a transformer, so as to resonate the influence caused by the parasitic capacitance; in addition, in order to ensure the compactness of the whole input matching network, the input matching network adopts a transformer form to carry out input impedance matching on the amplifier module, and can evaluate the 50 ohm impedance of the antenna end and the input impedance of the amplifier module so as to determine the number of turns of the inductor, thereby avoiding reducing the area of a chip and reducing the inductance value. Thirdly, in order to ensure that the chip area is not additionally increased while the shunt inductor (the secondary coils in the first transformer and the second transformer) is introduced, the shunt inductor is designed into a long and narrow inductor to be integrated into the input matching network, and the phase is compensated by using the weak coupling between the input matching network and the phase adjusting inductor (the first inductor L1 and the second inductor L2).
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. A stacked power amplifier, comprising: an input matching network, an amplifier module and an output matching network connected in sequence, wherein,
the input end of the input matching network is the input end of the stacked power amplifier, the first output end of the input matching network is connected with the first input end of the amplifier module, and the second output end of the input matching network is connected with the second input end of the amplifier module; the input end of the stacked power amplifier is connected with an external input signal;
the amplifier module comprises six stacked transistors, third ends of two transistors positioned at a first stage in the six transistors are respectively used as a first input end and a second input end of the amplifier module, a first output end of the amplifier module is connected with a first input end of the output matching network, and a second output end of the amplifier module is connected with a second input end of the output matching network;
the output end of the output matching network is the output end of the stacked power amplifier;
wherein the input matching network comprises two transformers, and a parasitic capacitance exists between the amplifier module and the input matching network.
2. The stacked power amplifier of claim 1, wherein the input matching network comprises: a first transformer T1 and a second transformer T2, and the first transformer T1 and the second transformer T2 are stacked step-up transformers;
a first input terminal of the first transformer T1 is an input terminal of the input matching network, a second input terminal of the first transformer T1 is connected in series with a first input terminal of the second transformer T2, a first output terminal of the first transformer T1 is a first output terminal of the input matching network, and a second output terminal of the first transformer T1 is connected in series with a first output terminal of the second transformer T2;
a second input terminal of the second transformer T2 is grounded, and a second output terminal of the second transformer T2 is a second output terminal of the input matching network;
wherein a first parasitic capacitance exists between the primary coil and the secondary coil of the first transformer T1;
a second parasitic capacitance exists between the primary coil and the secondary coil of the second transformer T2.
3. The stacked power amplifier of claim 2, wherein the amplifier module comprises:
a first transistor Q1, a first terminal of which is electrically connected to the first inductor L1, a second terminal of which is grounded, and a third terminal of which is used as a first input terminal of the power amplification module; the first inductor L1 is connected with a first power supply;
a second transistor Q2, a first terminal of which is electrically connected to the second inductor L2, a second terminal of which is grounded, and a third terminal of which is used as a second input terminal of the power amplification module; the second inductor L2 is connected with the first power supply;
a third transistor Q3, a first terminal of which is connected to the second power supply, a second terminal of which is electrically connected to the third terminal of the first transistor Q1, and a third terminal of which is electrically connected to the fifth transistor Q5;
a fourth transistor Q4, a first terminal of which is connected to the second power supply, a second terminal of which is electrically connected to the third terminal of the second transistor Q2, and a third terminal of which is electrically connected to a sixth transistor Q6;
a fifth transistor Q5, a first terminal of which is connected to a third power supply, a second terminal of which is electrically connected to the third terminal of the third transistor Q3, and a third terminal of which is the first output terminal of the power amplification module;
a sixth transistor Q6, a first terminal of which is connected to the third power supply, a second terminal of which is electrically connected to the third terminal of the fourth transistor Q4, and a third terminal of which is the second output terminal of the power amplification module.
4. The stacked power amplifier of claim 3, wherein the first inductor L1 presents a third parasitic capacitance with the secondary winding of the first transformer T1 in the input matching network;
a fourth parasitic capacitance exists between the second inductor L2 and the secondary winding of the second transformer T2.
5. The stacked power amplifier of claim 4, wherein the first inductor L1 presents a fifth parasitic capacitance with the primary winding of the first transformer T1 in the input matching network;
a sixth parasitic capacitance exists between the second inductor L2 and the primary winding of the second transformer T2.
6. The stacked power amplifier of claim 5, wherein the output matching network comprises: a third transformer T3 and a fourth transformer T4;
a first input end of a third transformer T3 is a first input end of the output matching network, a second input end of the third transformer T3 is connected with a fourth power supply, a first output end of the third transformer T3 is an output end of the output matching network, and a second output end of the third transformer T3 is connected with a first output end of the fourth transformer T4;
a first input terminal of the fourth transformer T4 is connected to the fourth power supply, a second input terminal of the fourth transformer T4 is a first input terminal of the output matching network, and a second output terminal of the fourth transformer T4 is grounded.
7. A circuit board comprising the stacked power amplifier of any one of claims 1-6.
8. An electronic device comprising the circuit board of claim 7.
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| WO2024045820A1 (en) * | 2022-08-29 | 2024-03-07 | 深圳市中兴微电子技术有限公司 | Power amplifier, power amplifier assembly and signal processing device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106487342A (en) * | 2016-10-24 | 2017-03-08 | 成都嘉纳海威科技有限责任公司 | A kind of matrix power amplifier based on transistor stack structure |
| CN111030621A (en) * | 2019-12-24 | 2020-04-17 | 青海民族大学 | Alternating current stacking power amplifier for wireless terminal |
| CN113556092A (en) * | 2021-09-16 | 2021-10-26 | 深圳飞骧科技股份有限公司 | Radio frequency power amplifier based on transformer matching network |
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2022
- 2022-03-10 CN CN202210232136.XA patent/CN114726325B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106487342A (en) * | 2016-10-24 | 2017-03-08 | 成都嘉纳海威科技有限责任公司 | A kind of matrix power amplifier based on transistor stack structure |
| CN111030621A (en) * | 2019-12-24 | 2020-04-17 | 青海民族大学 | Alternating current stacking power amplifier for wireless terminal |
| CN113556092A (en) * | 2021-09-16 | 2021-10-26 | 深圳飞骧科技股份有限公司 | Radio frequency power amplifier based on transformer matching network |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024045820A1 (en) * | 2022-08-29 | 2024-03-07 | 深圳市中兴微电子技术有限公司 | Power amplifier, power amplifier assembly and signal processing device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114726325B (en) | 2023-02-21 |
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