CN114720835A - Power cycle main circuit for GaN power device - Google Patents

Power cycle main circuit for GaN power device Download PDF

Info

Publication number
CN114720835A
CN114720835A CN202210224243.8A CN202210224243A CN114720835A CN 114720835 A CN114720835 A CN 114720835A CN 202210224243 A CN202210224243 A CN 202210224243A CN 114720835 A CN114720835 A CN 114720835A
Authority
CN
China
Prior art keywords
tested
gan
circuit
voltage source
negative feedback
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210224243.8A
Other languages
Chinese (zh)
Inventor
王凯宏
周子牛
邾玢鑫
朱一荻
赵浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Three Gorges University CTGU
Original Assignee
China Three Gorges University CTGU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Three Gorges University CTGU filed Critical China Three Gorges University CTGU
Priority to CN202210224243.8A priority Critical patent/CN114720835A/en
Publication of CN114720835A publication Critical patent/CN114720835A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D21/00—Measuring or testing not otherwise provided for
    • G01D21/02—Measuring two or more variables by means not covered by a single other subclass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2637—Circuits therefor for testing other individual devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

A power cycle main circuit for GaN power device comprises multiple and voltage sourcesV load And the modules to be tested are connected in parallel. The module to be tested comprises a microprocessor, an isolation circuit, a D/A conversion circuit, a phase inverter, a negative feedback constant voltage source driving module and a GaN device. The microprocessor is connected with an isolation circuit, the isolation circuit is respectively connected with the D/A conversion circuit and the phase inverter, the D/A conversion circuit and the phase inverter are both connected with the negative feedback constant voltage source driving module, and the negative feedback constant voltage source driving module is connected with the GaN device. The GaN device is connected with a measuring circuit, the measuring circuit comprises a thermocouple and a current sensor, and the thermocouple and the current sensor are both connected with a microprocessor. The main circuit of the invention adopts a control strategy of parallel aging, namely, a plurality of groups of modules to be tested are aged at the same time. Compared with the traditional power circulation circuit, the circuit has the advantages of high aging efficiency, high power utilization rate, simple control method, mutual aging decoupling and easy expansion of the tested GaN devicesAnd the like.

Description

Power cycle main circuit for GaN power device
Technical Field
The invention relates to the technical field of power semiconductor device measurement, in particular to a power cycle main circuit for a GaN power device.
Background
With the development of semiconductor technology and power electronic technology, the application field of semiconductor devices has been expanded to important fields such as military industry, aerospace, new energy power generation and the like. Wide bandgap semiconductor devices represented by gallium nitride (GaN) and silicon carbide (SiC) are also widely used in accordance with the trend toward higher frequencies and higher power densities of power electronics. Originally, GaN devices were used only in military applications such as radar and laser, and their cost was gradually reduced due to the progress of the manufacturing process, which gradually widened the application range of GaN devices toward civilian applications. However, GaN devices are still in the early stages of development, their failure mechanisms are still under investigation, and reliability needs to be improved. The aging process of the GaN device can be accelerated through an accelerated aging test, so that the fault characteristics of the GaN device can be researched, and the method has great significance for understanding the aging mode of the GaN device and improving the reliability of the GaN device.
At present, the power cycle test is commonly used to realize accelerated aging of the semiconductor device so as to test the reliability of the semiconductor device. The power cycle test is to apply power to a tested device to generate heat loss, so that the temperature of the device is periodically fluctuated, and the thermal stress, the electrical stress, the mechanical stress or the coupling stress of the three stresses suffered by the tested device in a real working condition is simulated and accelerated, so that the aging process of the device under the actual working condition is simulated and accelerated, the possible failure of the device in the long-term operation process is exposed in advance, and the reliability evaluation, the failure mechanism research, the structure optimization design and the like of the device are performed.
The existing power circulation circuit is mainly divided into a series type and a parallel type. The series power cycle circuit is formed by connecting a device under test and a current source in series, and turning on and off the device under test by using a switch. The series power circulation circuit can age a plurality of groups of tested devices connected in series at the same time, and has the characteristic of high efficiency. However, the series power circulation circuit cannot utilize the cooling time section, and the time utilization rate is low; in addition, the series power circulation circuit realizes power circulation by switching off the power current source, so that the service life of the power circulation circuit is reduced due to frequent switching off of the power current source, and the reliability of the power circulation circuit is reduced. A parallel power cycle circuit is also a commonly used power cycle circuit, and such a circuit connects a plurality of groups of devices under test in parallel with a current source, and each group of devices under test is turned on and off through a switch. The time utilization rate of the parallel power circulation circuit is improved by staggered conduction, a plurality of tested devices can be connected in series on one branch circuit to increase the aging efficiency, and in addition, one bypass circuit can be added to improve the reliability of a current source. However, the control method is complicated by the staggered conduction, and the cost is increased by the bypass.
Disclosure of Invention
Aiming at the defects of the conventional power cycle circuit, the invention provides the power cycle main circuit for the GaN power device, which realizes the high-efficiency aging of a plurality of groups of GaN power devices by a simple control method and has higher time utilization rate.
The technical scheme adopted by the invention is as follows:
a power cycle main circuit for a GaN power device, comprising: multiple and voltage source VloadThe modules to be tested are connected in parallel;
the module to be tested comprises a microprocessor, an isolation circuit, a D/A conversion circuit, a phase inverter, a negative feedback constant voltage source driving module and a GaN device;
the microprocessor is connected with an isolation circuit, the isolation circuit is respectively connected with the D/A conversion circuit and the phase inverter, the D/A conversion circuit and the phase inverter are both connected with the negative feedback constant voltage source driving module, and the negative feedback constant voltage source driving module is connected with the GaN device;
the GaN device is connected with a measuring circuit, the measuring circuit comprises a thermocouple and a current sensor, and the thermocouple and the current sensor are both connected with a microprocessor.
The voltage source VloadFor providing a drain-source voltage V for GaN devicesDSSo that the GaN device works in the active region. One path of the output signal of the microprocessor enters a port 1 of the negative feedback constant voltage source driving module through the isolation circuit and the D/A conversion circuit, the other path of the output signal of the microprocessor enters a port 2 of the negative feedback constant voltage source driving module through the isolation circuit and the phase inverter,the output of the microprocessor is changed, and the negative feedback constant voltage source driving module can be adjusted to realize the grid-source voltage V of the tested GaN deviceGSSo as to adjust the drain-source current I flowing through the GaN device under testDS。
The thermocouple is used for measuring the temperature of the GaN device;
the current sensor is used for measuring the drain-source current I of the GaN deviceDS。
The negative feedback constant voltage source driving module is formed by cascading a subtracter with an integrating circuit, and the output end V of the integrating circuitoutLeading back to the homodromous input end of the subtracter to form negative feedback; the negative feedback constant voltage source drives the voltage of the module port 1 and the voltage of the module port 2 to be opposite in phase.
The invention relates to a power cycle main circuit for a GaN power device, which has the following technical effects:
1) the power cycle test circuit is used for performing power cycle test on the power semiconductor device, the main circuit is connected with the plurality of modules to be tested in parallel by adopting the voltage source, and the voltage source provides a specific drain electrode-source electrode V for the GaN device to be testedDSAnd the tested GaN device works in the active region. The grid electrode-source electrode V of the tested GaN deviceGSThe ageing power of the GaN device can be adjusted by adjusting the driving of the negative feedback constant voltage source through the microprocessor, so that the control of the ageing process is realized.
The negative feedback constant voltage source drive can also be used for monitoring junction temperature of the GaN device during aging and temperature rise, and due to the parallel structure, the control method of the main circuit is simple, a plurality of groups of modules to be tested can be aged simultaneously, and the modules to be tested are mutually decoupled and easy to expand. The main circuit has the characteristics of high time utilization rate and high aging efficiency.
2) The main circuit of the invention can implement multiple sets of aging strategies, such as: the method comprises a quasi-junction temperature fluctuation aging strategy, a constant shell temperature fluctuation aging strategy and a constant on-off time aging strategy so as to meet different test requirements. The junction temperature measurement of the present invention under different aging strategies is as follows: if the main circuit performs power circulation of quasi-junction temperature fluctuation, the GaN device to be tested is conducted and aged through the current in the measuring circuitSensor detection of drain-source I of tested GaN deviceDSDetecting junction temperature, and detecting the shell temperature of the GaN device to be detected through a thermocouple in the measuring circuit to reflect the junction temperature when the GaN device to be detected is disconnected and cooled; if the main circuit performs power circulation under an aging strategy of constant shell temperature fluctuation, only the shell temperature of the GaN device to be measured needs to be measured through a thermocouple of the measured circuit; if the main circuit performs power circulation under an aging strategy with constant on-off time, the method for measuring the junction temperature is similar to the method for measuring the device to be measured under the quasi-junction temperature fluctuation aging strategy.
3) Compared with the traditional power circulation circuit, the main circuit of the invention does not need to be additionally provided with a switch, and only needs to control the negative feedback voltage source drive according to the preset time sequence through the microprocessor to adjust the V of the GaN device to be testedGSTherefore, the GaN device to be tested is switched on and off. The control of the main circuit is greatly simplified, and the cost is saved; and simultaneously, the maintenance of the main circuit is facilitated.
4) The main circuit of the invention adopts a parallel aging control strategy, namely, a plurality of groups of modules to be tested are aged at the same time. Compared with the traditional power circulation circuit, the circuit has the characteristics of high aging efficiency, high power supply utilization rate, simple control method, mutual aging decoupling and easy expansion of the tested GaN devices and the like.
Drawings
Fig. 1 is a main circuit diagram of the present invention.
Fig. 2 is a schematic diagram of a module to be tested in a main circuit according to the present invention.
Fig. 3 is a schematic diagram of a negative feedback constant voltage source driving module in a module under test.
Fig. 4 is a graph of the current-voltage characteristic of GaN devices as a function of junction temperature on a data sheet.
Fig. 5(1) is a first timing chart of the main circuit operating under the quasi-junction temperature fluctuation aging control strategy according to the present invention;
fig. 5(2) is a timing diagram ii of the operation of the main circuit under the quasi-junction temperature fluctuation aging control strategy according to the present invention;
fig. 5(3) is a timing chart three of the operation of the main circuit under the quasi-junction temperature fluctuation aging control strategy according to the present invention.
FIG. 6(1) is a timing chart of the main circuit conducting under the aging strategy of constant shell temperature fluctuation according to the present invention;
fig. 6(2) is a timing chart of the main circuit of the invention under the constant shell temperature fluctuation aging strategy.
Fig. 7(1) is a timing diagram of the operation of the main circuit under the on-time aging strategy according to the present invention.
Fig. 7(2) is a timing diagram of the second time when the main circuit of the present invention operates under the off-time aging strategy.
Detailed Description
As shown in fig. 1, a power cycle main circuit for a GaN power device includes: multiple and voltage source VloadAnd the modules to be tested are connected in parallel. Wherein the voltage source VloadProviding proper drain-source voltage V for the tested GaN deviceDSAnd the tested GaN device works in the active region.
As shown in fig. 2, the module to be tested includes a microprocessor, an isolation circuit, a D/a conversion circuit, an inverter, a negative feedback constant voltage source driving module, a GaN device DUT, and a heat sink a. The radiator a is used for accelerating the cooling of the device, can be composed of a speed-adjustable fan and radiating fins, and drives a motor driving module TB6612 in the fan by using the PWM function of a microprocessor so as to control the cooling speed of the device.
The microprocessor is connected with an isolation circuit, the isolation circuit is respectively connected with the D/A conversion circuit and the phase inverter, the D/A conversion circuit and the phase inverter are both connected with the negative feedback constant voltage source driving module, the negative feedback constant voltage source driving module is connected with the GaN device, the GaN device is connected with the measuring circuit, the measuring circuit comprises a thermocouple b and a current sensor c, and the thermocouple b and the current sensor c are both connected with the microprocessor. Wherein, the microprocessor can control the negative feedback constant voltage source to change the grid-source voltage V of the tested GaN deviceGSAnd then, a parallel aging strategy can be adopted to realize the simultaneous aging of a plurality of groups of modules to be tested. Thermocouples b, current sensors c measure junction or shell temperature, and current.
Taking GS61008P power chip of GaN System as an example, the GaN work can be known from the data manual "GS 61008PBottom-side coated 100V E-mode GaN TranssistorThe device is at a certain grid-source voltage VGSIts current-voltage characteristic drain-source voltage VDSAnd the drain-source current IDSThe relationship of (d) to junction temperature is a negative temperature characteristic, i.e.: the higher the junction temperature IDSThe smaller the size, the property of the GaN device can be used, I when the GaN device is in the active regionDSTo reflect the junction temperature.
One path of output signal of the microprocessor enters a port 1 of the negative feedback constant voltage source driving module through the isolation circuit and the D/A conversion circuit, the other path of output signal of the microprocessor changes the output of the microprocessor through the isolation circuit and the phase inverter to a port 2 of the negative feedback constant voltage source driving module, and the negative feedback constant voltage source driving module can be adjusted to realize the grid-source voltage V of the tested GaN deviceGSSo as to adjust the drain-source current I flowing through the GaN device under testDS. According to the functional description, a hardware model selection of the implementation is given:
the microprocessor may employ the STM32 series of ST or the C2000 series of TI;
the isolation circuit can adopt an APCL series optical coupling isolator;
the D/A conversion circuit can adopt MCP4725 of Microchip company;
the inverter can adopt TI company 74HC 14D;
thermocouple b may be a Maxim MAX31855K type thermocouple.
The current sensor c may be ACS758KCB-200B-PFF-T available from ALLEGRO.
As shown in FIG. 3, the negative feedback constant voltage source driving module is formed by a subtracter and an integrating circuit which are connected in cascade, and the integrator outputs VoutIntroducing back to the inverting input of the subtractor to form negative feedback, V in FIG. 3in Port 1 is connected, and switch S1Is connected to port 2. As can be seen from FIG. 2, the voltage at port 1 is inverted with respect to the voltage at port 2, i.e., VinAnd S1The control signal of (2) is inverted. Therefore, when the microprocessor outputs low level, the voltage of the port 1 is Vin0V, thus Vout0V and port 2 input signal is positive, S1In conducting, integratorCapacitor C1Warp R4Discharging; when the microprocessor outputs high level, the voltage of the port 1 is Vin>0V, thereby Vout>0V, and port 2 input signal is zero, S1And (6) turning off. Capacitor C1The discharging loop ensures that the capacitor C outputs high level when the microprocessor outputs high level1There is no initial energy storage, which makes the initial energy storage not affect Vout。
FIG. 4 is a graph of the relationship between the current-voltage characteristic and the junction temperature of GaN devices on the data sheet "GS 61008P Bottom-side coated 100V E-mode GaN Transistor", when V isGS6V. V with GaN device can be seen from the figureDSIncrease of IDSFirst increase, wait for IDSAfter reaching the active region IDSIs no longer following VDSAnd increases with an increase. In addition, as the junction temperature of the GaN device increases, the junction temperature is increased to a certain value VDSLower IDSThe smaller and smaller is, IDSHas a negative temperature characteristic. Therefore, the relation can be utilized to measure I when the tested GaN device is conducted and agedDSTo reflect its junction temperature.
Fig. 5(1) to 5(3), fig. 6(1) to 6(2), and fig. 7(1) to 7(2) reflect the operating principle of the main circuit of the present invention under three control strategies:
(I): when the control strategy is quasi-junction temperature fluctuation aging, the power cycle test process of the main circuit of the invention is as follows:
the microprocessor controls the constant voltage source driving module to enable the GaN device V to be testedGS>Vthreshold,GaNCorresponding to FIG. 5(2) tonA time period to operate in the active region; the drain-source current I continuously increasing at this timeDSCorresponding to FIG. 5, (3) tonThe current flows through the GaN device to be tested, and the GaN device to be tested generates conduction loss to generate heat, which increases the junction temperature of the GaN device to be tested, corresponding to fig. 5(1) tonA time period. If the thermocouple in the monitoring and measuring circuit finds that the junction temperature of the GaN device to be measured rises to the preset highest junction temperature TJ,maxThen, the microprocessor controls the negative feedback constant voltage source driving module to enable the tested GaN device V GS0, corresponding to fig. 5(2) toffTime period, thereby turning off the tested GaN device and simultaneously enablingCooling the tested GaN device by a heat radiator corresponding to (1) t of FIG. 5offA time period; if the thermocouple in the monitoring and measuring circuit finds that the shell temperature of the GaN device to be measured is reduced to the preset lowest shell temperature TC,minAnd when the GaN device to be tested is conducted, the negative feedback constant voltage source driving module is controlled by the microprocessor, the radiator is turned off at the same time, the cooling is stopped, and a new round of power circulation is started at the moment. Fig. 5(1) -5 (3) reflect the timing diagram of the operation of the main circuit under this strategy.
(II): when the control strategy is constant shell temperature fluctuation aging, the power cycle test process of the main circuit of the invention is as follows:
the GaN device to be tested works in the active region under the action of a voltage source, and the drain-source current I is continuously increasedDSThe current flows through the GaN device to be tested, and the GaN device to be tested generates conduction loss and generates heat. Monitoring the shell temperature of the GaN device to be measured by a thermocouple in the measuring circuit, and when the shell temperature rises to a preset maximum shell temperature TC,maxWhen the device is tested, the microprocessor controls the negative feedback constant voltage source driving module to turn off the tested GaN device, and simultaneously enables the radiator to cool the tested GaN device; if the shell temperature is found to be reduced to the preset minimum junction temperature T by measuring the thermocouple in the circuitC,minAnd when the test result is obtained, the microprocessor controls the negative feedback constant voltage source driving module to conduct the tested GaN device so as to start a new round of power cycle test. FIGS. 6(1) -6 (2) reflect timing diagrams of the operation of the master circuit under this strategy.
(III): when the control strategy is constant on and off time, the power cycle test process of the main circuit of the invention is as follows:
firstly, the microprocessor controls the negative feedback constant voltage source driving module to drive the module according to the preset time t1Conducting the device to be tested until the conducting time reaches t1Then, the microprocessor controls the negative feedback constant voltage source driving module to turn off the module according to the preset turn-off time t2The GaN device to be tested is turned off, and the on-time reaches t2And then, the microprocessor controls the negative feedback constant voltage source driving module to conduct the tested GaN device, and a new round of power cycle test is started. Fig. 7(1) -fig. 7(2) reflect the timing diagram of the operation of the main circuit under this strategy.
In summary, a method for Ga is adoptedThe power cycle main circuit of the N power device ensures the consistency of the test conditions of the tested GaN device during power cycle, and improves the accuracy of the experimental result. Meanwhile, the parallel aging control strategy effectively improves the power utilization rate and the time utilization rate, and is beneficial to rapidly aging a plurality of groups of tested GaN devices. In addition, the grid-source voltage V of the tested GaN device is regulated and controlled by the microprocessor to regulate the negative feedback voltage source drive according to the time sequenceGSThe method for realizing the on-off of the tested GaN device greatly simplifies the control of the main circuit, and makes the realization of the power cycle test simple and convenient.
The power cycle main circuit is suitable for a power cycle main circuit of a GaN power semiconductor device and is mainly used for manufacturers or related researchers for producing the GaN power semiconductor device. The multiple parallel modules to be tested can be aged at the same time, and the aging processes of the modules to be tested are decoupled from each other and do not influence each other.
The grid voltage of a tested GaN device in the module to be tested is adjusted by the adjustable negative feedback constant voltage source driving module of the microprocessor. Since the DUT is in the active region, its gate-source voltage V is regulatedGSThe drain-source current can be changed, so that the adjustment of the DUT aging power is realized, and the aging acceleration process of the DUT can be controlled. By means of the measurement circuit and the DUT switching mode, a number of different aging strategies can be implemented: an aging control strategy based on quasi-junction temperature fluctuation; aging control strategy based on constant shell temperature fluctuation; and thirdly, aging control strategy for keeping constant on and off time.
Wherein, the aging control strategy of quasi-junction temperature fluctuation refers to measuring I when the tested device is conductedDSAnd pass through IDSReflecting the junction temperature through the relation with the junction temperature, reflecting the junction temperature through measuring the shell temperature of the device under the condition that the device to be tested is turned off, and keeping the difference between the maximum junction temperature and the minimum shell temperature constant in the whole power cycle period; the aging control strategy for constant shell temperature fluctuation means that the shell temperature of a tested device is controlled to be constant in each power cycle period; the aging control strategy with constant on-off time refers to adjusting junction temperature fluctuation of a tested device by selecting proper on-off time.

Claims (10)

1. A power cycle main circuit for a GaN power device, comprising: multiple and voltage source VloadThe modules to be tested are connected in parallel;
the module to be tested comprises a microprocessor, an isolation circuit, a D/A conversion circuit, a phase inverter, a negative feedback constant voltage source driving module and a GaN device;
the microprocessor is connected with an isolation circuit, the isolation circuit is respectively connected with the D/A conversion circuit and the phase inverter, the D/A conversion circuit and the phase inverter are both connected with the negative feedback constant voltage source driving module, and the negative feedback constant voltage source driving module is connected with the GaN device;
the GaN device is connected with a measuring circuit, the measuring circuit comprises a thermocouple and a current sensor, and the thermocouple and the current sensor are both connected with a microprocessor.
2. The power cycle main circuit for a GaN power device of claim 1, wherein: the voltage source VloadFor providing a drain-source voltage V for GaN devicesDSSo that the GaN device works in the active region.
3. The power cycle main circuit for a GaN power device of claim 1, wherein: one path of output signal of the microprocessor enters a port 1 of the negative feedback constant voltage source driving module through the isolation circuit and the D/A conversion circuit, the other path of output signal of the microprocessor enters a port 2 of the negative feedback constant voltage source driving module through the isolation circuit and the phase inverter to change the output of the microprocessor, and the negative feedback constant voltage source driving module can be adjusted to realize the grid-source voltage V of the tested GaN deviceGSSo as to adjust the drain-source current I flowing through the GaN device under testDS。
4. The power cycle main circuit for a GaN power device of claim 1, wherein: the thermocouple is used for measuring the temperature of the GaN device.
5. According toA power cycle main circuit for a GaN power device as claimed in claim 1, wherein: the current sensor is used for measuring the drain-source current I of the GaN deviceDS。
6. The power cycle main circuit for a GaN power device of claim 1, wherein: the negative feedback constant voltage source driving module is formed by cascading a subtracter with an integrating circuit, and the output end V of the integrating circuitoutLeading back to the homodromous input end of the subtracter to form negative feedback; the negative feedback constant voltage source drives the voltage at port 1 and the voltage at port 2 of the module to be in opposite phase.
7. The power cycle main circuit for a GaN power device of claim 1, wherein: the microprocessor can control the negative feedback constant voltage source to change the grid-source voltage V of the tested GaN deviceGSAnd then, a parallel aging strategy can be adopted to realize the simultaneous aging of a plurality of groups of modules to be tested.
8. A power cycle test method using the main circuit of any one of claims 1 to 7, wherein:
when the control strategy is quasi-junction temperature fluctuation aging, the power cycle test process of the main circuit is as follows:
the GaN device to be tested works in the active region under the action of a voltage source, and the drain-source current I continuously increased at the momentDSThe current flows through the tested GaN device, the tested GaN device generates conduction loss to generate heat, and when the junction temperature rises to the preset highest junction temperature, the microprocessor controls the negative feedback constant voltage source driving module to turn off the tested GaN device; and after the GaN device to be tested is turned off, the GaN device to be tested is cooled through the radiator, and when the measured shell temperature reaches the preset lowest shell temperature, the negative feedback constant voltage source driving module is controlled by the microprocessor to conduct the GaN device to be tested, so that a new round of power circulation is started.
9. A power cycle test method using the main circuit of any one of claims 1 to 7, wherein:
when the control strategy is constant shell temperature fluctuation aging, the power cycle test process of the main circuit is as follows:
the GaN device to be tested works in the active region under the action of a voltage source, and the drain-source current I is continuously increasedDSThe current flows through the tested GaN device, and the tested GaN device generates conduction loss to generate heat; monitoring the shell temperature of the GaN device to be detected through a thermocouple in the measuring circuit, and controlling a negative feedback constant voltage source driving module to turn off the GaN device to be detected by a microprocessor when the shell temperature rises to a preset highest shell temperature; the tested GaN device is cooled under the action of the radiator, and when the temperature of the shell of the tested GaN device is reduced to the preset lowest junction temperature through monitoring of a thermocouple in the measuring circuit, the microprocessor controls the negative feedback constant voltage source driving module to conduct the tested GaN device, so that a new round of power cycle test is started.
10. A power cycle test method using the main circuit of any one of claims 1 to 7, wherein:
when the control strategy is constant on and off time, the power cycle test process of the main circuit is as follows:
firstly, the microprocessor controls the negative feedback constant voltage source driving module to drive the module according to the preset time t1Conducting the device to be tested until the conducting time reaches t1Then, the microprocessor controls the negative feedback constant voltage source driving module to turn off the module according to the preset turn-off time t2The GaN device to be tested is turned off, and the on-time reaches t2And then, the microprocessor controls the negative feedback constant voltage source driving module to conduct the tested GaN device, and a new round of power cycle test is started.
CN202210224243.8A 2022-03-07 2022-03-07 Power cycle main circuit for GaN power device Pending CN114720835A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210224243.8A CN114720835A (en) 2022-03-07 2022-03-07 Power cycle main circuit for GaN power device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210224243.8A CN114720835A (en) 2022-03-07 2022-03-07 Power cycle main circuit for GaN power device

Publications (1)

Publication Number Publication Date
CN114720835A true CN114720835A (en) 2022-07-08

Family

ID=82237355

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210224243.8A Pending CN114720835A (en) 2022-03-07 2022-03-07 Power cycle main circuit for GaN power device

Country Status (1)

Country Link
CN (1) CN114720835A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117907810A (en) * 2024-03-19 2024-04-19 深圳市铨兴科技有限公司 Automatic chip aging test method, system and medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117907810A (en) * 2024-03-19 2024-04-19 深圳市铨兴科技有限公司 Automatic chip aging test method, system and medium
CN117907810B (en) * 2024-03-19 2024-05-17 深圳市铨兴科技有限公司 Automatic chip aging test method, system and medium

Similar Documents

Publication Publication Date Title
CN109444705B (en) Power cycle experimental device for multi-junction temperature difference control of automobile-grade IGBT
Bijukumar et al. A linear extrapolation-based MPPT algorithm for thermoelectric generators under dynamically varying temperature conditions
CN106443400B (en) A kind of electric-thermal of IGBT module-aging junction temperature computation model method for building up
CN111781480B (en) IGBT junction temperature monitoring method, device and system
CN110658435B (en) IGBT junction temperature monitoring device and method
CN109164370B (en) Thermal impedance measurement system and method for power semiconductor device
CN109696612A (en) The dipulse test macro and test method of automobile IGBT module
CN112307703B (en) Edge calculation intelligent power module
CN114720835A (en) Power cycle main circuit for GaN power device
CN108598524A (en) Fuel battery cooling system and its temprature control method
Wang et al. High efficiency thermoelectric temperature control system with improved proportional integral differential algorithm using energy feedback technique
CN108494249A (en) A kind of the Buck/Buck-Boost commutation circuit topologies and its control system of non-isolated dynamic bimodulus switching
CN101841272A (en) Solar charging system, device and method for tracking maximum power point thereof
Wang et al. Improved MPPT system based on FTSMC for thermoelectric generator array under dynamic temperature and impedance
Xie et al. A maximum power point tracking controller for thermoelectric generators
CN108226733B (en) Hybrid power cycle detection device for IGBT module and detection method thereof
AU2020104327A4 (en) Power Cycling Test Device for Multi-junction Temperature Difference Control of Automobile Grade IGBT
CN111799530A (en) Heater power closed-loop control system and power closed-loop control method
Qin et al. Electrothermal management using in-situ junction temperature monitoring for enhanced reliability of SiC-based power electronics
Ding et al. Active peltier effect heat sink for power semiconductor device thermal stability enhancement
CN112327967B (en) Temperature control device and method of power device and electrical equipment
Wang et al. Active thermal management for SiC MOSFETs based on equivalent adjustment of buffer capacitor
CN118150970A (en) Main circuit suitable for power cycle of GaN device and power cycle test method thereof
CN113866584A (en) Power cycle test circuit and test method for power semiconductor device
Bespalov et al. Determination of temperature parameters of IGBT, used in converter of AC electric drive

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination