CN114695616A - Reversed-polarity LED structure and manufacturing method thereof - Google Patents

Reversed-polarity LED structure and manufacturing method thereof Download PDF

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Publication number
CN114695616A
CN114695616A CN202210434189.XA CN202210434189A CN114695616A CN 114695616 A CN114695616 A CN 114695616A CN 202210434189 A CN202210434189 A CN 202210434189A CN 114695616 A CN114695616 A CN 114695616A
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layer
oxidation
gap window
forming
away
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赵鹏
徐洲
马英杰
蔡和勋
伏兵
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Xiamen Changelight Co Ltd
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Xiamen Changelight Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

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Abstract

The application discloses a reverse polarity LED structure and a manufacturing method thereof, wherein photoetching is carried out on a P-GaP window layer of a reverse polarity epitaxial wafer, a highly doped P-GaP window layer part is etched through a dry etching process or a wet etching process to form a graphical P-GaP window layer, and then an oxidation structure is formed through film coating on the whole surface, so that the external quantum efficiency is improved, the current expansion is better and the voltage is reduced under the condition of not influencing the voltage.

Description

Reversed-polarity LED structure and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductor chip manufacturing, in particular to a reverse-polarity LED structure and a manufacturing method thereof.
Background
The LED is used as a new light source for illumination in the 21 st century, and under the same brightness, the power consumption of a semiconductor lamp is only 1/10 of that of a common incandescent lamp, but the service life of the semiconductor lamp can be prolonged by 100 times. The LED device is a cold light source, has high light efficiency, low working voltage, low power consumption and small volume, can be packaged in a plane, is easy to develop light and thin products, has firm structure and long service life, does not contain harmful substances such as mercury, lead and the like, does not have infrared and ultraviolet pollution, and does not generate pollution to the outside in production and use. Therefore, the semiconductor lamp has the characteristics of energy conservation, environmental protection, long service life and the like, and like the transistor replaces the electron tube, the semiconductor lamp replaces the traditional incandescent lamp and the traditional fluorescent lamp, and the trend is also great. From the perspective of saving electric energy and reducing greenhouse gas emission and from the perspective of reducing environmental pollution, the LED serving as a novel lighting source has great potential for replacing the traditional lighting source.
In the current LED chip in the industry, the P face GaP is of a whole-face structure and is not patterned, and the P face GaP high-doped layer absorbs light, so that the brightness is low.
Disclosure of Invention
In view of the above, the present invention provides an inverse polarity LED structure and a method for fabricating the same, in which a patterned P-GaP window layer is fabricated on an inverse polarity epitaxial wafer, so that external quantum efficiency is improved, current spreading is better, and voltage is reduced without affecting voltage.
In order to achieve the above purpose, the invention provides the following technical scheme:
a method of fabricating a reverse polarity LED structure, the method comprising:
providing a GaAs substrate;
sequentially growing a GaAs buffer layer, an etching stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a P-GaP window layer on the surface of one side of the GaAs substrate to form an epitaxial wafer of the reverse polarity LED structure; wherein one side of the P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;
etching the highly doped P-GaP window layer part by adopting a photoetching technology to form a graphical P-GaP window layer;
forming an oxidation structure on the surface of one side, away from the GaAs substrate, of the patterned P-GaP window layer, wherein the oxidation structure comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is located between the first oxidation layer and the third oxidation layer;
etching the oxidation structure by adopting a photoetching technology to form a plurality of medium holes penetrating through the oxidation structure, and filling medium materials in the medium holes to form a bonding metal structure;
forming a metal mirror layer on the surface of one side of the oxidation structure, which is far away from the epitaxial wafer, wherein the metal mirror layer is in metal bonding with the bonding metal structure;
carrying out substrate transfer, removing the GaAs substrate, forming an N electrode on the surface of one side of the epitaxial wafer, which is far away from the oxidation structure, and forming coarsening structures on two sides of the N electrode;
forming a Si substrate on the surface of one side, away from the oxidation structure, of the metal mirror layer;
and forming a P electrode on the surface of the Si substrate on the side facing away from the metal mirror layer.
Preferably, in the above manufacturing method, the doping concentration of the highly doped P-GaP window layer part is 2 × 1018cm-3。
Preferably, in the above fabricating method, the first oxide layer is an ITO layer, an IZO layer or Al2O3And (3) a layer.
Preferably, in the above manufacturing method, the second oxide layer is SiO2And (3) a layer.
Preferably, in the above manufacturing method, the third oxide layer is Al2O3A layer or an ITO layer or an IZO layer.
Preferably, in the above manufacturing method, the bonding metal structure is an AuZnAu layer or an AuBeAu layer.
Preferably, in the above manufacturing method, the method for etching the highly doped P-GaP window layer portion includes:
forming a first photoresist layer on the surface of one side, away from the P-type limiting layer, of the highly doped P-GaP window layer;
etching the first photoresist layer by adopting a photoetching process to form a patterned first photoresist layer;
etching the highly doped P-GaP window layer part based on the patterned first photoresist layer to form a patterned P-GaP window layer;
and removing the residual first photoresist layer.
Preferably, in the above manufacturing method, the method of forming the oxide structure includes:
forming a first oxide layer on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer;
forming a second oxide layer on a surface of the first oxide layer facing away from the patterned P-GaP window layer;
and forming a third oxide layer on the surface of one side of the second oxide layer, which is far away from the first oxide layer.
Preferably, in the above manufacturing method, the method of forming the bond metal structure includes:
forming a second photoresist layer on the surface of one side of the third oxide layer, which is far away from the second oxide layer;
etching the second photoresist layer by adopting a photoetching process to form a patterned second photoresist layer;
etching the oxidation structure based on the patterned second photoresist layer, removing part of the first oxidation layer, part of the second oxidation layer and part of the third oxidation layer, and forming a plurality of medium holes penetrating through the oxidation structure;
filling a dielectric material in the dielectric hole to form a bonding metal structure;
and removing the residual second photoresist layer.
The present invention also provides a reverse polarity LED structure, comprising:
the epitaxial wafer comprises a GaAs buffer layer, an etch stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a graphical P-GaP window layer which are sequentially grown on the same side; wherein one side of the graphical P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;
the oxidation structure is positioned on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer and comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is positioned between the first oxidation layer and the third oxidation layer;
a plurality of bond metal structures located in the oxidized structure;
the metal mirror layer is positioned on the surface of one side, away from the epitaxial wafer, of the oxidation structure, and the metal mirror layer is in metal bonding with the bonding metal structure;
the N electrode is positioned on the surface of one side, away from the oxidation structure, of the epitaxial wafer, and the coarsening structures are positioned on the two sides of the N electrode;
the Si substrate is positioned on the surface of one side, away from the oxidation structure, of the metal mirror layer;
and the P electrode is positioned on the surface of the Si substrate on the side away from the metal mirror layer.
As can be seen from the above description, in the reversed polarity LED structure and the manufacturing method thereof provided by the technical scheme of the invention, the P-GaP window layer of the reversed polarity epitaxial wafer is subjected to photoetching, the highly doped P-GaP window layer part is etched through a dry etching process or a wet etching process to form a patterned P-GaP window layer, and then the whole surface is coated with a film to form an oxidation structure, so that the external quantum efficiency is improved, the current expansion is better and the voltage is reduced under the condition of not influencing the voltage.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
The structures, proportions, and dimensions shown in the drawings and described in the specification are for illustrative purposes only and are not intended to limit the scope of the present disclosure, which is defined by the claims, but rather by the claims, it is understood that these drawings and their equivalents are merely illustrative and not intended to limit the scope of the present disclosure.
Fig. 1 to fig. 16 are process flow diagrams of a method for manufacturing an inverse-polarity LED structure according to an embodiment of the present invention.
Detailed Description
Embodiments of the present application will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the application are shown, and in which it is to be understood that the embodiments described are merely illustrative of some, but not all, of the embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.
Referring to fig. 1 to 16, fig. 1 to 16 are process flow charts of a manufacturing method of a reverse polarity LED structure according to an embodiment of the present invention, as shown in fig. 1 to 16, the manufacturing method includes:
step S1: as shown in fig. 1, a GaAs substrate 10 is provided;
step S2: as shown in fig. 2, a GaAs buffer layer 111, an etch stop layer 112, a GaAs ohmic contact layer 113, an N-type roughening layer 114, an N-type confinement layer 115, a MQW quantum well active layer 116, a P-type confinement layer 117, and a P-GaP window layer 118 are sequentially grown on one surface of the GaAs substrate 10 by MOCVD (metal organic chemical vapor deposition), thereby forming an epitaxial wafer 11 of the reverse-polarity LED structure; wherein, the side of the P-GaP window layer 118 facing away from the P-type confinement layer 117 is a highly doped P-GaP window layer 121;
wherein the doping concentration of the highly doped P-GaP window layer 121 portion may be 2 × 1018cm-3。
Step S3: as shown in fig. 3-5, the highly doped P-GaP window layer 121 is partially etched by photolithography to form a patterned P-GaP window layer 118;
the method for etching the part of the highly doped P-GaP window layer 121 comprises the following steps:
first, as shown in FIG. 3, a first photoresist layer 13 is formed on the surface of the highly doped P-GaP window layer 121 facing away from the P-type confinement layer 117;
then, as shown in fig. 4, the first photoresist layer 13 is etched by using a photolithography process to form a patterned first photoresist layer 13;
finally, as shown in FIG. 5, the highly doped P-GaP window layer 121 is partially etched based on the patterned first photoresist layer 13 to form a patterned P-GaP window layer 118, and the remaining first photoresist layer 13 is removed.
In the embodiment of the invention, the surface of the epitaxial wafer 11 can be cleaned by adopting the modes of acetone, isopropanol, deionized water and the like, then the photoetching is carried out on the surface of the P-GaP window layer 118, the highly doped P-GaP window layer 121 on the surface layer part is removed by a dry etching mode or a wet etching mode, and the photoresist is removed after the etching.
Step S4: as shown in fig. 6-8, forming an oxide structure 14 on a side surface of the patterned P-GaP window layer 118 facing away from the GaAs substrate 10, where the oxide structure 14 includes a first oxide layer 141, a second oxide layer 142, and a third oxide layer 143, and the second oxide layer 142 is located between the first oxide layer 141 and the third oxide layer 143;
wherein the method for forming the oxidation structure 14 comprises:
first, as shown in FIG. 6, a first oxide layer 141 is formed on the surface of the patterned P-GaP window layer 118 facing away from the P-type confinement layer 117; the first oxide layer 141 may be an ITO layer, an IZO layer, or Al2O3And (3) a layer.
Then, as shown in FIG. 7, a first oxide layer 141 is formed on the first oxide layer facing away from the patterned P-GaP window layer 118Forming a second oxide layer 142 on the side surface; the second oxide layer 142 may be SiO2And (3) a layer.
Finally, as shown in fig. 8, a third oxide layer 143 is formed on a surface of the second oxide layer 142 facing away from the first oxide layer 141. The third oxide layer 143 may be Al2O3A layer or an ITO layer or an IZO layer.
Step S5: as shown in fig. 9-12, etching the oxide structure 14 by using a photolithography technique to form a plurality of dielectric holes 16 penetrating through the oxide structure 14, and filling the dielectric holes 16 with a dielectric material to form a bonding metal structure 17; the bonding metal structure 17 may be an AuZnAu layer or an AuBeAu layer.
Wherein the method of forming the bond metal structure 17 comprises:
firstly, as shown in fig. 9, a second photoresist layer 15 is formed on a surface of the third oxide layer 143 facing away from the second oxide layer 142;
then, as shown in fig. 10, etching the second photoresist layer 15 by using a photolithography process to form a patterned second photoresist layer 15;
then, as shown in fig. 11, etching the oxide structure 14 based on the patterned second photoresist layer 15, removing a portion of the first oxide layer 141, a portion of the second oxide layer 142, and a portion of the third oxide layer 143, and forming a plurality of dielectric holes 16 penetrating through the oxide structure 14;
finally, as shown in fig. 12, a dielectric material is filled in the dielectric hole 16 to form a bonding metal structure 17, and the remaining second photoresist layer 15 is removed.
Step S6: as shown in fig. 13, a metal mirror layer 18 is formed on a side surface of the oxidized structure 14 facing away from the epitaxial wafer 11, and the metal mirror layer 18 is in metal bonding with the bonding metal structure 17;
the material of the metal via layer 18 may be any one or a combination of Ag, TiW, Ti, Pt and Au.
Step S7: as shown in fig. 14, performing substrate transfer, removing the GaAs substrate 10, forming an N electrode 19 on a surface of the epitaxial wafer 11 on a side away from the oxide structure 14, and forming roughened structures 20 on two sides of the N electrode;
step S8: as shown in fig. 15, a Si substrate 21 is formed on a surface of the metal mirror layer 18 on a side away from the oxidized structure 14;
step S9: as shown in fig. 16, a P-electrode 22 is formed on the surface of the Si substrate 21 on the side away from the metal mirror layer 18.
In an embodiment of the invention, the P-GaP window layer 118 is patterned and then plated with Al2O3the/ITO/IZO can make the current spread better, reduce the voltage and improve the reliability and the brightness. And Al2O3the/ITO/IZO plays a role in increasing SiO2And adhesion to Ag mirror surfaces. GaP refractive index (3.3), SiO2Refractive index (. about.1.4), Al2O3The refractive index of/ITO/IZO is about 1.8, and the refractive index is in GaP and SiO2Intermediate Al plating2O3the/ITO/IZO is beneficial to improving the external quantum efficiency and the brightness.
As can be seen from the above description, in the manufacturing method of the reversed polarity LED structure provided by the technical scheme of the invention, the P-GaP window layer of the reversed polarity epitaxial wafer is subjected to photoetching, the highly doped P-GaP window layer part is etched through a dry etching process or a wet etching process to form the graphical P-GaP window layer, and then the whole surface is coated with a film to form the oxidation structure, so that the external quantum efficiency is improved, the current expansion is better and the voltage is reduced under the condition of not influencing the voltage.
Based on the above embodiment, another embodiment of the present invention further includes a reverse-polarity LED structure, the reverse-polarity LED structure is manufactured by the above manufacturing method, as shown in fig. 16, the reverse-polarity LED structure includes:
the epitaxial wafer 11 comprises a GaAs buffer layer 111, an etch stop layer 112, a GaAs ohmic contact layer 113, an N-type coarsening layer 114, an N-type limiting layer 115, an MQW quantum well active layer 116, a P-type limiting layer 117 and a patterned P-GaP window layer 118 which are sequentially grown on the same side; wherein, the side of the patterned P-GaP window layer 118 facing away from the P-type confinement layer 117 is a highly doped P-GaP window layer 121;
the oxide structure 14 is located on a surface of the patterned P-GaP window layer 118 facing away from the P-type confinement layer 117, the oxide structure 14 includes a first oxide layer 141, a second oxide layer 142 and a third oxide layer 143, and the second oxide layer 142 is located between the first oxide layer 141 and the third oxide layer 143;
a plurality of bond metal structures 17 located in the oxidized structure 14;
a metal mirror layer 18 located on a surface of the oxidized structure 14 facing away from the epitaxial wafer 11, wherein the metal mirror layer 18 is in metal bonding with the bonding metal structure 17;
an N electrode 19 positioned on the surface of the epitaxial wafer 11 on the side away from the oxidation structure 14, and coarsening structures 20 positioned on the two sides of the N electrode 19;
a Si substrate 21 on a surface of the metal mirror layer 18 facing away from the oxide structure 14;
and the P electrode 22 is positioned on the surface of the Si substrate 21 on the side away from the metal mirror layer 18.
As can be seen from the above description, in the reversed polarity LED structure provided by the technical scheme of the invention, the P-GaP window layer of the reversed polarity epitaxial wafer is subjected to photoetching, the highly doped P-GaP window layer part is etched by a dry etching process or a wet etching process to form the graphical P-GaP window layer, and then the whole surface is coated to form the oxidation structure, so that the external quantum efficiency is improved, the current expansion is better and the voltage is reduced under the condition of not influencing the voltage.
The embodiments in the present description are described in a progressive manner, or in a parallel manner, or in a combination of a progressive manner and a parallel manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments can be referred to each other. For the reversed polarity LED structure disclosed in the embodiment, since it corresponds to the manufacturing method of the reversed polarity LED structure disclosed in the embodiment, the description is relatively simple, and the relevant points can be referred to the description of the manufacturing method.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A manufacturing method of a reverse polarity LED structure is characterized by comprising the following steps:
providing a GaAs substrate;
sequentially growing a GaAs buffer layer, an etching stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a P-GaP window layer on the surface of one side of the GaAs substrate to form an epitaxial wafer of the reverse polarity LED structure; wherein one side of the P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;
etching the highly doped P-GaP window layer part by adopting a photoetching technology to form a graphical P-GaP window layer;
forming an oxidation structure on the surface of one side, away from the GaAs substrate, of the patterned P-GaP window layer, wherein the oxidation structure comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is located between the first oxidation layer and the third oxidation layer;
etching the oxidation structure by adopting a photoetching technology to form a plurality of medium holes penetrating through the oxidation structure, and filling medium materials in the medium holes to form a bonding metal structure;
forming a metal mirror layer on the surface of one side of the oxidation structure, which is far away from the epitaxial wafer, wherein the metal mirror layer is in metal bonding with the bonding metal structure;
carrying out substrate transfer, removing the GaAs substrate, forming an N electrode on the surface of one side of the epitaxial wafer, which is far away from the oxidation structure, and forming coarsening structures on two sides of the N electrode;
forming a Si substrate on the surface of one side, away from the oxidation structure, of the metal mirror layer;
and forming a P electrode on the surface of the Si substrate on the side facing away from the metal mirror layer.
2. The method of claim 1, wherein the highly doped P-GaP window layer has a doping concentration of 2 x 1018cm-3。
3. The method of claim 1, wherein the first oxide layer is an ITO layer, an IZO layer, or Al2O3A layer.
4. The method of claim 1, wherein the second oxide layer is SiO2And (3) a layer.
5. The method of claim 1, wherein the third oxide layer is Al2O3A layer or an ITO layer or an IZO layer.
6. The method of claim 1, wherein the bonding metal structure is an AuZnAu layer or an AuBeAu layer.
7. The method of claim 1, wherein the etching the highly doped P-GaP window layer comprises:
forming a first photoresist layer on the surface of one side, away from the P-type limiting layer, of the highly doped P-GaP window layer;
etching the first photoresist layer by adopting a photoetching process to form a patterned first photoresist layer;
etching the highly doped P-GaP window layer part based on the patterned first photoresist layer to form a patterned P-GaP window layer;
and removing the residual first photoresist layer.
8. The method of claim 1, wherein forming the oxide structure comprises:
forming a first oxide layer on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer;
forming a second oxide layer on the surface of one side of the first oxide layer, which is far away from the patterned P-GaP window layer;
and forming a third oxide layer on the surface of one side of the second oxide layer, which is far away from the first oxide layer.
9. The method of making according to claim 1, wherein forming the bond metal structure comprises:
forming a second photoresist layer on the surface of one side of the third oxide layer, which is far away from the second oxide layer;
etching the second photoresist layer by adopting a photoetching process to form a patterned second photoresist layer;
etching the oxidation structure based on the patterned second photoresist layer, removing part of the first oxidation layer, part of the second oxidation layer and part of the third oxidation layer, and forming a plurality of medium holes penetrating through the oxidation structure;
filling a dielectric material in the dielectric hole to form a bonding metal structure;
and removing the residual second photoresist layer.
10. A reverse polarity LED structure, comprising:
the epitaxial wafer comprises a GaAs buffer layer, an etch stop layer, a GaAs ohmic contact layer, an N-type coarsening layer, an N-type limiting layer, an MQW quantum well active layer, a P-type limiting layer and a graphical P-GaP window layer which are sequentially grown on the same side; wherein one side of the graphical P-GaP window layer, which is far away from the P-type limiting layer, is a highly doped P-GaP window layer;
the oxidation structure is positioned on the surface of one side, away from the P-type limiting layer, of the patterned P-GaP window layer and comprises a first oxidation layer, a second oxidation layer and a third oxidation layer, and the second oxidation layer is positioned between the first oxidation layer and the third oxidation layer;
a plurality of bond metal structures located in the oxidized structure;
the metal mirror layer is positioned on the surface of one side, away from the epitaxial wafer, of the oxidation structure, and the metal mirror layer is in metal bonding with the bonding metal structure;
the N electrode is positioned on the surface of one side, away from the oxidation structure, of the epitaxial wafer, and the coarsening structures are positioned on the two sides of the N electrode;
the Si substrate is positioned on the surface of one side, away from the oxidation structure, of the metal mirror layer;
and the P electrode is positioned on the surface of the Si substrate on the side away from the metal mirror layer.
CN202210434189.XA 2022-04-24 2022-04-24 Reversed-polarity LED structure and manufacturing method thereof Pending CN114695616A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117497654A (en) * 2023-12-29 2024-02-02 南昌凯捷半导体科技有限公司 Mosaic contact Ag reflector red light chip and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117497654A (en) * 2023-12-29 2024-02-02 南昌凯捷半导体科技有限公司 Mosaic contact Ag reflector red light chip and manufacturing method thereof
CN117497654B (en) * 2023-12-29 2024-04-30 南昌凯捷半导体科技有限公司 Mosaic contact Ag reflector red light chip and manufacturing method thereof

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