CN114686972A - Method for improving abnormal growth of epitaxial layer - Google Patents
Method for improving abnormal growth of epitaxial layer Download PDFInfo
- Publication number
- CN114686972A CN114686972A CN202210154815.XA CN202210154815A CN114686972A CN 114686972 A CN114686972 A CN 114686972A CN 202210154815 A CN202210154815 A CN 202210154815A CN 114686972 A CN114686972 A CN 114686972A
- Authority
- CN
- China
- Prior art keywords
- epitaxial layer
- layer
- improving
- abnormal growth
- hard mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/04—Pattern deposit, e.g. by using masks
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/02—Elements
- C30B29/06—Silicon
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/52—Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
Abstract
The invention provides a method for improving the abnormal growth of an epitaxial layer, which comprises the steps of providing a substrate, and forming the epitaxial layer on the substrate; forming a hard mask layer on the epitaxial layer; carrying out plasma helium treatment on the hard mask layer; photoetching and etching the epitaxial layer; cleaning by a wet method; a surface pre-clean is performed followed by a re-deposition of the epitaxial layer. The invention carries out plasma helium treatment on the hard mask layer, reduces the SiN etching rate, is beneficial to protecting the hard mask structure from being damaged, improves the protection effect of the hard mask structure on SiP and SiGe, reduces the abnormal growth of the epitaxial layer SiGe or SiP on the NMOS or PMOS source drain, and improves the process window of the EPI process.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for improving abnormal growth of an epitaxial layer.
Background
The fin field effect transistor adopts epitaxial SiGe and SiP silicon phosphorus processes. According to the performance requirement of the device, SiGe and SiP growth sequences are different, after NMOS (PMOS) grows SiP (SiGe), SiN hard mask plate protection is needed, SiGe (SiP) photoetching, etching and surface cleaning are carried out, and then SiGe (SiP) growth is carried out. However, experimental results show that after the surface of the SiN hard mask is cleaned, the thickness of the SiN hard mask is reduced, and the SiN hard mask is not enough to protect SiP (SiGe), so that SiGe or SiP abnormally grows in an NMOS (PMOS) source and drain region.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention is directed to a method for improving abnormal growth of an epitaxial layer, which is used to solve the problem of defects generated by the growth of the epitaxial layer in the prior art.
To achieve the above and other related objects, the present invention provides a method for improving abnormal growth of an epitaxial layer, comprising:
providing a substrate, and forming an epitaxial layer on the substrate;
step two, forming a hard mask layer on the epitaxial layer;
thirdly, carrying out plasma helium treatment on the hard mask layer;
step four, photoetching and etching the epitaxial layer;
step five, wet cleaning;
and sixthly, performing surface pre-cleaning, and then performing epitaxial layer redeposition.
Preferably, the epitaxial layer is formed in step one by deposition.
Preferably, the epitaxial layer in step one is SiP or SiGe.
Preferably, the hard mask layer in the second step is a silicon nitride layer.
Preferably, the silicon nitride layer is formed on the epitaxial layer in a deposition manner in the second step.
Preferably, in the third step, the hard mask layer is subjected to plasma helium treatment to reduce the etching rate of the silicon nitride layer and improve the protection of the epitaxial layer.
Preferably, in the third step, the hard mask layer is subjected to plasma helium treatment to remove silicon hydrogen bonds and nitrogen hydrogen bonds in the silicon nitride, so that the compactness of the silicon nitride is improved.
Preferably, the thickness of the silicon nitride layer in the second step is 40 to 100 angstroms.
Preferably, the silicon nitride layer is grown and formed in the second step by an atomic layer deposition method, and the growth temperature is 500-600 ℃.
Preferably, in the third step, helium is introduced into the hard mask layer during plasma helium treatment, wherein the flow rate of the introduced helium is 200-500 sccm, the temperature is 30-450 ℃, and the treatment time is 10 seconds-15 minutes.
Preferably, the operation mode of the plasma helium treatment in the third step is an ion oxidation operation mode.
Preferably, the ion oxidation operation mode in step three is a continuous operation mode or a pulse mode, the radio frequency power is 150-2100 watts, and the pressure is 5-50 mT.
As described above, the method for improving the abnormal growth of the epitaxial layer according to the present invention has the following beneficial effects: the method carries out plasma helium treatment on the SiN hard mask layer, reduces the SiN etching rate, is beneficial to protecting the hard mask structure from being damaged, improves the protection effect of the hard mask structure on SiP and SiGe, reduces the abnormal growth of the epitaxial layer SiGe or SiP on the NMOS or PMOS source drain, and promotes the EPI loop process window.
Drawings
Fig. 1 is a flow chart showing a method for improving the abnormal growth of the epitaxial layer according to the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The invention provides a method for improving the abnormal growth of an epitaxial layer, as shown in fig. 1, fig. 1 is a flow chart of the method for improving the abnormal growth of the epitaxial layer in the invention, and the method at least comprises the following steps:
providing a substrate, and forming an epitaxial layer on the substrate;
further, in the first step of this embodiment, the epitaxial layer is formed by deposition.
Further, the epitaxial layer in the first step of this embodiment is SiP or SiGe.
Step two, forming a hard mask layer on the epitaxial layer;
further, the hard mask layer in the second step of this embodiment is a silicon nitride layer.
Further, in the second step of this embodiment, the silicon nitride layer is formed on the epitaxial layer by deposition.
Further, in the second step of the present embodiment, the thickness of the silicon nitride layer is 40 to 100 angstroms.
Further, in the second step of the present embodiment, the silicon nitride layer is grown by an atomic layer deposition method, and the growth temperature is 500-600 ℃.
Thirdly, carrying out plasma helium treatment on the hard mask layer;
further, in the third step of this embodiment, the hard mask layer is subjected to plasma helium treatment to reduce the etching rate of the silicon nitride layer, thereby improving the protection of the epitaxial layer.
Further, in the third step of this embodiment, the hard mask layer is subjected to plasma helium treatment to remove silicon-hydrogen bonds and nitrogen-hydrogen bonds in the silicon nitride, so as to improve the compactness of the silicon nitride.
Furthermore, in the third step of this embodiment, helium is introduced into the hard mask layer during the plasma helium treatment, wherein the flow rate of the introduced helium is 200 to 500sccm, the temperature is 30 to 450 ℃, and the treatment time is 10 seconds to 15 minutes.
Further, the operation mode of the plasma helium treatment in the third step of this embodiment is an ion oxidation operation mode.
Further, the ion oxidation operation mode in the third step of this embodiment is a continuous operation mode or a pulse mode, the rf power is 150-2100 w, and the pressure is 5-50 mT.
Step four, photoetching and etching the epitaxial layer;
step five, wet cleaning;
and sixthly, performing surface pre-cleaning, and then performing epitaxial layer redeposition.
In summary, the method of the invention performs plasma helium treatment on the SiN hard mask layer, reduces SiN etching rate, is beneficial to protecting the hard mask structure from being damaged, improves the protection effect of the hard mask structure on SiP and SiGe, reduces abnormal growth of epitaxial layer SiGe or SiP on NMOS or PMOS source and drain, and improves EPI loop process window. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims (12)
1. A method for improving abnormal growth of an epitaxial layer, comprising:
providing a substrate, and forming an epitaxial layer on the substrate;
step two, forming a hard mask layer on the epitaxial layer;
thirdly, performing plasma helium treatment on the hard mask layer;
step four, photoetching and etching the epitaxial layer;
step five, wet cleaning;
and sixthly, performing surface pre-cleaning, and then performing epitaxial layer redeposition.
2. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 1, wherein: in step one, the epitaxial layer is formed by deposition.
3. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 1, wherein: the epitaxial layer in the step one is SiP or SiGe.
4. The method for improving the abnormal growth of the epitaxial layer of claim 1, wherein: and the hard mask layer in the second step is a silicon nitride layer.
5. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 4, wherein: and in the second step, the silicon nitride layer is formed on the epitaxial layer in a deposition mode.
6. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 1, wherein: and in the third step, performing plasma helium treatment on the hard mask layer to reduce the etching rate of the silicon nitride layer and improve the protection of the epitaxial layer.
7. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 1, wherein: and in the third step, the hard mask layer is subjected to plasma helium treatment to remove silicon-hydrogen bonds and nitrogen-hydrogen bonds in the silicon nitride, so that the compactness of the silicon nitride is improved.
8. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 5, wherein: in the second step, the thickness of the silicon nitride layer is 40-100 angstroms.
9. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 8, wherein: and growing the silicon nitride layer by an atomic layer deposition method in the second step, wherein the growth temperature is 500-600 ℃.
10. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 1, wherein: and in the third step, helium is introduced into the hard mask layer in the plasma helium treatment process, wherein the flow of the introduced helium is 200-500 sccm, the temperature is 30-450 ℃, and the treatment time is 10 seconds-15 minutes.
11. A method for improving abnormal growth of an epitaxial layer according to claim 10, wherein: the operation mode of the plasma helium treatment in the third step is an ion oxidation operation mode.
12. The method for improving the abnormal growth of the epitaxial layer as claimed in claim 11, wherein: the ion oxidation operation mode in the third step is a continuous operation mode or a pulse mode, the radio frequency power is 150-2100 watts, and the pressure is 5-50 mT.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210154815.XA CN114686972A (en) | 2022-02-21 | 2022-02-21 | Method for improving abnormal growth of epitaxial layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210154815.XA CN114686972A (en) | 2022-02-21 | 2022-02-21 | Method for improving abnormal growth of epitaxial layer |
Publications (1)
Publication Number | Publication Date |
---|---|
CN114686972A true CN114686972A (en) | 2022-07-01 |
Family
ID=82137371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202210154815.XA Pending CN114686972A (en) | 2022-02-21 | 2022-02-21 | Method for improving abnormal growth of epitaxial layer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN114686972A (en) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5962344A (en) * | 1997-12-29 | 1999-10-05 | Vanguard International Semiconductor Corporation | Plasma treatment method for PECVD silicon nitride films for improved passivation layers on semiconductor metal interconnections |
US20050032386A1 (en) * | 2003-08-04 | 2005-02-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etching and plasma treatment process to improve a gate profile |
US20140273292A1 (en) * | 2013-03-14 | 2014-09-18 | Applied Materials, Inc. | Methods of forming silicon nitride spacers |
CN105185746A (en) * | 2015-08-20 | 2015-12-23 | 上海华力微电子有限公司 | Preparation method of germanium-silicon epitaxial layer for CMOS device processing |
US9865456B1 (en) * | 2016-08-12 | 2018-01-09 | Micron Technology, Inc. | Methods of forming silicon nitride by atomic layer deposition and methods of forming semiconductor structures |
US10381219B1 (en) * | 2018-10-25 | 2019-08-13 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film |
US20200388483A1 (en) * | 2019-06-06 | 2020-12-10 | Applied Materials, Inc. | Methods of post treating silicon nitride based dielectric films with high energy low dose plasma |
-
2022
- 2022-02-21 CN CN202210154815.XA patent/CN114686972A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5962344A (en) * | 1997-12-29 | 1999-10-05 | Vanguard International Semiconductor Corporation | Plasma treatment method for PECVD silicon nitride films for improved passivation layers on semiconductor metal interconnections |
US20050032386A1 (en) * | 2003-08-04 | 2005-02-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etching and plasma treatment process to improve a gate profile |
US20140273292A1 (en) * | 2013-03-14 | 2014-09-18 | Applied Materials, Inc. | Methods of forming silicon nitride spacers |
CN105185746A (en) * | 2015-08-20 | 2015-12-23 | 上海华力微电子有限公司 | Preparation method of germanium-silicon epitaxial layer for CMOS device processing |
US9865456B1 (en) * | 2016-08-12 | 2018-01-09 | Micron Technology, Inc. | Methods of forming silicon nitride by atomic layer deposition and methods of forming semiconductor structures |
US10381219B1 (en) * | 2018-10-25 | 2019-08-13 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film |
US20200388483A1 (en) * | 2019-06-06 | 2020-12-10 | Applied Materials, Inc. | Methods of post treating silicon nitride based dielectric films with high energy low dose plasma |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6811448B1 (en) | Pre-cleaning for silicidation in an SMOS process | |
CN103069552B (en) | Mos transistors including sion gate dielectric with enhanced nitrogen concentration at its sidewalls | |
US7888217B2 (en) | Method for fabricating a gate dielectric of a field effect transistor | |
TWI668730B (en) | Integrated system and method for source/drain engineering | |
US20200152742A1 (en) | Fully Strained Channel | |
US9449866B2 (en) | Methods and systems for using oxidation layers to improve device surface uniformity | |
TW200807550A (en) | Pre-cleaning of substrates in epitaxy chambers | |
KR100864932B1 (en) | Method for cleaning of a semiconductor substrate | |
TWI821158B (en) | Integrated system for semiconductor process | |
WO2018049166A1 (en) | In-situ pre-clean for selectivity improvement for selective deposition | |
TW201822255A (en) | Method of doped germanium formation | |
KR100680946B1 (en) | Method for forming contact plug of semiconductor device | |
US7998881B1 (en) | Method for making high stress boron-doped carbon films | |
CN114686972A (en) | Method for improving abnormal growth of epitaxial layer | |
CN114496721A (en) | Method and device for protecting front structure of silicon carbide device | |
CN113161410A (en) | Gallium nitride high-temperature annealing protection structure and application thereof | |
US7344951B2 (en) | Surface preparation method for selective and non-selective epitaxial growth | |
US7648886B2 (en) | Shallow trench isolation process | |
CN113257663A (en) | Method for forming cobalt silicide film layer | |
US20070082494A1 (en) | Method for forming silicide layer | |
CN106356337B (en) | Method for manufacturing semiconductor device | |
KR100529675B1 (en) | Manufacturing process for semiconductor device | |
JP6472016B2 (en) | Method for manufacturing silicon carbide semiconductor device | |
CN106158585B (en) | Surface treatment method of wafer, semiconductor device and manufacturing method thereof | |
KR101068138B1 (en) | Method For Manufacturing Semiconductor Device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |