CN114686843A - Preparation method of solar cell and solar cell - Google Patents
Preparation method of solar cell and solar cell Download PDFInfo
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- CN114686843A CN114686843A CN202011612094.XA CN202011612094A CN114686843A CN 114686843 A CN114686843 A CN 114686843A CN 202011612094 A CN202011612094 A CN 202011612094A CN 114686843 A CN114686843 A CN 114686843A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 135
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 135
- 239000010703 silicon Substances 0.000 claims abstract description 135
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 93
- 239000000758 substrate Substances 0.000 claims abstract description 57
- 230000005641 tunneling Effects 0.000 claims abstract description 30
- 238000000034 method Methods 0.000 claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims abstract description 10
- 238000006243 chemical reaction Methods 0.000 claims description 25
- 238000000151 deposition Methods 0.000 claims description 22
- 238000009792 diffusion process Methods 0.000 claims description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 12
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 12
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 12
- 239000012495 reaction gas Substances 0.000 claims description 12
- 229910000077 silane Inorganic materials 0.000 claims description 12
- 238000004140 cleaning Methods 0.000 claims description 11
- 239000000243 solution Substances 0.000 claims description 10
- 230000003647 oxidation Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 9
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 8
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 8
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 7
- 229910052698 phosphorus Inorganic materials 0.000 claims description 7
- 239000011574 phosphorus Substances 0.000 claims description 7
- 238000005137 deposition process Methods 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims description 6
- 229910004205 SiNX Inorganic materials 0.000 claims description 4
- 239000002253 acid Substances 0.000 claims description 4
- 239000003513 alkali Substances 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 4
- 239000007864 aqueous solution Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000011065 in-situ storage Methods 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000011049 filling Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 239000012528 membrane Substances 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims 1
- 238000012545 processing Methods 0.000 abstract description 4
- 229920005591 polysilicon Polymers 0.000 description 24
- 239000013078 crystal Substances 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000007888 film coating Substances 0.000 description 2
- 238000009501 film coating Methods 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000004804 winding Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
- H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
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Abstract
The application provides a preparation method of a solar cell and the solar cell, wherein the preparation method comprises the steps of preparing a tunneling layer on the surface of a silicon substrate; preparing a mixed phase silicon film layer and a polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer; and carrying out heat treatment to obtain a doped polycrystalline silicon layer positioned on the surface of the tunneling layer. The preparation method can effectively reduce the film stress, and the solar cell adopting the preparation method is not easy to deform, thereby avoiding the abnormity of subsequent processing procedures and reducing the production cost.
Description
Technical Field
The invention relates to the technical field of photovoltaic power generation, in particular to a solar cell and a preparation method thereof.
Background
With the rapid development of the photovoltaic industry, the requirements of the photovoltaic market at home and abroad on the performance and efficiency of the solar cell are continuously improved, and manufacturers in the industry are increasingly concerned with research and development of high-efficiency cells. The TOPCon (Tunnel Oxide Passivated Contact) battery can improve the surface passivation performance of the battery, reduce the metal Contact composite current and effectively improve the open-circuit voltage and the short-circuit current of the battery by sequentially preparing the ultrathin Tunnel Oxide layer and the doped polycrystalline silicon layer on the surface of the battery.
In the preparation process of the TOPCon battery, the back surface of a silicon wafer is usually cleaned, and then an extremely thin silicon oxide layer is generated by oxidizing the back surface of the silicon wafer; then, a layer of amorphous silicon/microcrystalline silicon/polycrystalline silicon is deposited and prepared on the surface of the silicon oxide layer, and a doped polycrystalline silicon layer is formed by annealing in the subsequent phosphorus diffusion process to activate the passivation performance. The doped polycrystalline silicon layer has large internal stress, which may cause silicon chip deformation, and local uneven diffusion is easy to occur during phosphorus diffusion, thereby affecting the contact and passivation performance of the battery piece; but also leads to an increased scrap rate and increased costs in subsequent automated processes. The industry also discloses a scheme for preparing a doped polysilicon layer by directly depositing by adopting an in-situ doping method, but the problems of silicon wafer warping and cracking caused by the stress of the doped polysilicon layer cannot be effectively solved.
In view of the above, it is necessary to provide a novel method for manufacturing a solar cell and a solar cell.
Disclosure of Invention
The application aims to provide a solar cell and a preparation method thereof, which can reduce subsequent processing abnormity, improve yield and reduce production cost.
In order to achieve the above object, the present application provides a method for manufacturing a solar cell, which mainly includes:
preparing a tunneling layer on the surface of the silicon substrate;
preparing a mixed phase silicon film layer and a polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer;
and carrying out heat treatment to obtain a doped polycrystalline silicon layer positioned on the surface of the tunneling layer.
As a further improvement of the embodiment of the application, the preparation temperature of the mixed-phase silicon film layer is 570-550 ℃; the preparation temperature of the polycrystalline silicon film layer is set to be 600-630 ℃.
As a further improvement of the embodiment of the application, the mixed-phase silicon film layer and the polycrystalline silicon film layer are deposited by an LPCVD method, and the reaction gas is silane; the mixed-phase silicon film layer and the polycrystalline silicon film layer are both intrinsic silicon film layers, in the deposition process of the intrinsic silicon film layers, the flow rate of silane is set to be 100-500 sccm, and the reaction pressure is 200-350 mTorr; the heat treatment refers to performing high-temperature diffusion on the silicon substrate, so that the mixed-phase silicon film layer and the polycrystalline silicon film layer are converted to form a doped polycrystalline silicon layer.
As a further improvement of the embodiment of the application, the mixed-phase silicon film layer and the polycrystalline silicon film layer are prepared by in-situ doping deposition by an LPCVD (low pressure chemical vapor deposition) method, and the reaction gas comprises silane and phosphine; the mixed phase silicon film layer and the polycrystalline silicon film layer are both phosphorus-doped silicon film layers, in the deposition process of the phosphorus-doped silicon film layers, the flow rate of silane is set to be 100-500 sccm, the flow rate of phosphine is set to be 10-50 sccm, and the reaction pressure is 200-350 mTorr; the heat treatment refers to annealing the silicon substrate.
As a further improvement of the embodiment of the present application, the mixed-phase silicon film layer and the polysilicon film layer are deposited in the same reaction chamber, and the step of preparing the sequentially alternating mixed-phase silicon film layer and polysilicon film layer on the surface of the tunneling layer includes depositing a mixed-phase silicon film layer on the surface of the tunneling layer;
removing the reaction gas remained in the reaction chamber, filling nitrogen, and raising the temperature of the reaction chamber;
depositing a polycrystalline silicon film layer on the surface of the mixed phase silicon film layer;
removing the residual reaction gas in the reaction chamber, and introducing nitrogen to reduce the temperature of the reaction chamber;
and depositing another mixed phase silicon film layer on the surface of the polycrystalline silicon film layer.
As a further improvement of the embodiment of the application, the rate of the temperature increase or decrease of the reaction chamber is set to be 5-10 ℃/min.
As a further improvement of the embodiment of the application, the number of layers of the mixed phase silicon film layer and the number of layers of the polycrystalline silicon film layer are the same, and the mixed phase silicon film layer and the polycrystalline silicon film layer are not less than two.
As a further improvement of the embodiment of the application, the thickness of the mixed-phase silicon film layer is set to be 10-50 nm; the thickness of the polycrystalline silicon film layer is set to be 10-50 nm.
As a further improvement of the embodiment of the application, the preparation of the tunneling layer comprises preparing a layer of SiO on the back surface of the silicon substrate by adopting a chemical oxidation or thermal oxidation or ozone oxidation methodxFilm of controlling the SiOxThe thickness of the film is 1 to 3 nm.
As a further improvement of the embodiment of the application, the silicon substrate is an N-type silicon wafer, and the tunneling layer and the doped polysilicon layer are arranged on the back surface of the silicon substrate; the doped polycrystalline silicon layer is a phosphorus doped polycrystalline silicon layer.
As a further improvement of the embodiment of the application, the preparation method further comprises texturing, front surface diffusion and surface cleaning of the silicon substrate; the texture etching method comprises the following steps of etching a silicon substrate by using KOH or NaOH or TMAH aqueous solution to form a pyramid-shaped texture structure on the surface of the silicon substrate; the front diffusion means that a diffusion layer with the doping type opposite to that of the silicon substrate is formed on the front surface of the silicon substrate in a diffusion mode; the surface cleaning is to clean the back surface of the silicon substrate by adopting an alkali solution or an acid solution after the front surface diffusion is finished;
the preparation method also comprises the steps of coating and metalizing after the preparation of the doped polycrystalline silicon layer is finished; the coating comprises sequentially depositing Al on the front surface of the silicon substrate2O3Film or SiNxA film, and SiN is deposited on the back surface of the silicon substratexAnd (3) a membrane.
The application also provides a solar cell prepared by the preparation method.
The beneficial effect of this application is: according to the preparation method of the solar cell, the mixed phase silicon film layer and the polycrystalline silicon film layer which are sequentially and alternately prepared are prepared on the surface of the tunneling layer, the mixed phase silicon film layer presents tensile stress, the polycrystalline silicon film layer presents compressive stress, and the film layers with different stresses are alternately stacked, so that the overall stress of the film layers is reduced; the solar cell adopting the preparation method is not easy to deform, avoids abnormal subsequent processing, reduces the cost and improves the yield.
Drawings
FIG. 1 is a schematic structural diagram of a solar cell of the present application;
fig. 2 is a schematic main flow chart of a method for manufacturing a solar cell according to the present application.
100-solar cell; 1-a silicon substrate; 11-a diffusion layer; 2-a tunneling layer; 3-doping a polysilicon layer; 31-a first doped polysilicon layer; 32-a second doped layer polysilicon layer; 4-front surface film; 41-a first face film; 42-a second face film; 5-back surface film; 6-front electrode; 7-back electrode.
Detailed Description
The present application will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the above embodiments, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the present embodiments are included in the scope of the present invention.
Referring to fig. 1, a solar cell 100 provided in the present application includes a silicon substrate 1, a tunneling layer 2 disposed on a back surface of the silicon substrate 1, and a doped polysilicon layer 3. The silicon substrate 1 is an N-type silicon wafer; the thickness of the tunneling layer 2 is set to be 1-3 nm; the doped polycrystalline silicon layer 3 is a phosphorus doped polycrystalline silicon layer, and the whole thickness of the doped polycrystalline silicon layer is 50-200 nm.
The solar cell 100 further comprises a front surface film 4 arranged on the front surface of the silicon substrate 1, a back surface film 5 arranged on the back surface of the silicon substrate 1, and a front surface electrode 6 and a back surface electrode 7 respectively arranged on two sides of the silicon substrate 1. A diffusion layer 11 doped with boron is formed on the front surface of the silicon substrate 1, and the front surface electrode 6 penetrates through the front surface film 4 and is in contact with the diffusion layer 11; the back electrode 7 penetrates the back surface film 5 and is in contact with the doped polysilicon layer 3.
The doped polysilicon layer 3 comprises first doped polysilicon arranged on the tunneling layer 2 in sequence and alternately in a laminated mannerThe layer 31 and the second doped polysilicon layer 32, wherein the thickness of the first doped polysilicon layer 31 or the second doped polysilicon layer 32 is set to be 10-50 nm. The front surface film 4 includes a first front surface film 41 and a second front surface film 42 deposited in sequence. Here, the first front surface film 41 is provided as Al2O3Film, the second front surface film 42 is provided with SiNxA film; the back surface film 5 is also set to SiNxA film; the front and back electrodes 6 and 7 are typically silver electrodes.
With reference to fig. 2, the present application also provides a method for manufacturing the solar cell 100, including:
texturing the silicon substrate 1;
front diffusion, wherein a diffusion layer 11 with the doping type opposite to that of the silicon substrate 1 is formed on the front surface of the silicon substrate 1 in a diffusion mode;
cleaning the surface of the silicon substrate 1;
preparing a tunneling layer 2 on the surface of the silicon substrate 1 after surface cleaning;
preparing a mixed phase silicon film layer and a polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer 2;
performing heat treatment to obtain a doped polysilicon layer 3, wherein the mixed phase silicon film layer is converted into a first doped polysilicon layer 31, and the polysilicon film layer is converted into a second doped polysilicon layer 32;
and then sequentially performing film plating and metallization to obtain the solar cell 100.
Specifically, the texturing refers to performing double-sided alkaline texturing on the silicon substrate 1 by using an aqueous solution of KOH, NaOH or TMAH, so that a pyramid-shaped textured structure is formed on the surface of the silicon substrate 1, and the pyramid height on the surface of the silicon substrate 1 is preferably controlled to be 1-3 μm. The concentration of the aqueous solution of KOH, NaOH or TMAH is usually controlled to be 3-15%, and during actual production, a given texturing additive can be added according to product requirements to improve the texture quality of the silicon substrate 1.
The surface cleaning refers to cleaning the back surface of the silicon substrate 1 by using an alkali solution or an acid solution, namely polishing or secondarily polishing the back surface of the silicon substrate 1 after the front surface is diffusedTexturing, keeping the back surface of the silicon substrate 1 clean; then preparing a 1-3 nm SiO layer by adopting a chemical oxidation or thermal oxidation or ozone oxidation methodxThe film serves as a tunneling layer, and the tunneling layer 2 can also be made of silicon oxynitride.
The mixed-phase silicon film layer and the polycrystalline silicon film layer are both prepared by depositing through an LPCVD method, and the deposition temperature of the mixed-phase silicon film layer is 570-550 ℃; the deposition temperature of the polycrystalline silicon film layer is set to be 600-630 ℃. The mixed phase silicon film layer and the polycrystalline silicon film layer are different in grain size, grain boundary area and grain orientation, wherein the former is tensile stress, and the latter is compressive stress. Specifically, the mixed-phase silicon film layer comprises smaller crystal grains and amorphous silicon, the interfacial area between the crystal grains is larger, the crystal grains are more oriented, and the mixed-phase silicon film layer has stronger (111) orientation, so that the film layer has stronger tensile stress; the polysilicon film has a large grain size, typically exceeding 30nm, and a significant preferred orientation of grain growth, which is (110) preferred, enhances the compressive stress of the film. Here, the thickness of the mixed-phase silicon film layer or the single polysilicon film layer is smaller, and the mixed-phase silicon film layer and the single polysilicon film layer are alternately arranged, so that the stress of the integrally deposited film layer is reduced, the silicon substrate 1 is prevented from deforming in subsequent processes, the abnormality of a production line is reduced, and the yield is improved.
Here, the mixed-phase silicon film layer and the polycrystalline silicon film layer are both intrinsic silicon film layers, and the reaction gas is silane. In the deposition process of the intrinsic silicon film layer, the flow rate of silane is set to be 100-500 sccm, and the reaction pressure is set to be 200-350 mTorr; the heat treatment refers to diffusing the silicon substrate, so that the mixed phase silicon film layer and the polycrystalline silicon film layer are simultaneously annealed and doped, and then the mixed phase silicon film layer and the polycrystalline silicon film layer are converted to form a doped polycrystalline silicon layer 3. Specifically, the back of the silicon substrate 1 is diffused by adopting a phosphorus source to obtain a phosphorus-doped polycrystalline silicon layer.
In other embodiments of the present application, the mixed-phase silicon film and the polysilicon film may also be formed by in-situ doping deposition using LPCVD, and the reaction gases include silane and phosphine. In other words, the mixed-phase silicon film layer and the polycrystalline silicon film layer are both phosphorus-doped silicon film layers, in the deposition process of the phosphorus-doped silicon film layers, the flow rate of silane is set to be 100-500 sccm, the flow rate of phosphine is set to be 10-50 sccm, and the reaction pressure is 200-350 mTorr; the aforementioned heat treatment means annealing the silicon substrate 1.
The mixed phase silicon film layer and the polycrystalline silicon film layer are deposited in the same reaction chamber, and the step of preparing the mixed phase silicon film layer and the polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer 2 specifically comprises the following steps:
firstly, depositing a mixed phase silicon film layer on the surface of the tunneling layer 2;
removing the reaction gas remained in the reaction chamber, filling nitrogen, and raising the temperature of the reaction chamber;
depositing a polycrystalline silicon film layer on the surface of the mixed phase silicon film layer;
removing the residual reaction gas in the reaction chamber, and introducing nitrogen to reduce the temperature of the reaction chamber;
and depositing another mixed phase silicon film layer on the surface of the polycrystalline silicon film layer.
According to the steps, the mixed phase silicon film layer and the polycrystalline silicon film layer which are sequentially and alternately formed can be prepared on the surface of the tunneling layer 2, wherein the temperature rising or reducing rate of the reaction chamber is set to be 5-10 ℃/min. The layers of the mixed phase silicon film layer and the polycrystalline silicon film layer are the same, and at least two layers of the mixed phase silicon film layer and the polycrystalline silicon film layer are arranged; considering the film deposition time and the equipment productivity, the number of films cannot be set too much. Preferably, the thicknesses of the mixed-phase silicon film layer and the polycrystalline silicon film layer are both set to be 10-50 nm.
The film coating refers to respectively depositing and preparing a front surface film 4 and a back surface film 5 on the two side surfaces of the silicon substrate 1; the metallization is to print a predetermined conductive paste on the front surface film 4 and the back surface film 5 by a screen printing method to obtain corresponding electrode patterns, and then to sinter the electrode patterns at a high temperature to obtain a front electrode 6 and a back electrode 7. The thicknesses and film layer structures of the front surface film 4 and the back surface film 5 can be adjusted and controlled through the flow rate of reaction gas, the deposition temperature and the like; the specific process parameters of the screen printing and sintering can also be adjusted according to the performance of the conductive paste and the requirements of the battery, and are not described in detail herein.
In addition, the preparation method also comprises the steps of carrying out winding plating removal cleaning on the silicon substrate 1 before film coating, wherein the alkali solution or the acid solution is mainly adopted for cleaning and removing part of the doped polycrystalline silicon wound and plated on the front surface of the silicon substrate 1; in addition, in the process of forming the doped polysilicon layer 3 by phosphorus diffusion, it is necessary to clean and remove the phosphosilicate glass (PSG) formed on the back surface of the silicon substrate 1 before plating.
According to the preparation method of the solar cell 100, the mixed phase silicon film layer and the polycrystalline silicon film layer which are sequentially and alternately prepared are prepared on the surface of the tunneling layer, the mixed phase silicon film layer presents tensile stress, the polycrystalline silicon film layer presents compressive stress, and the film layers with different stresses are alternately stacked, so that the overall stress of the film layers is reduced; the solar cell 100 adopting the preparation method is not easy to deform, the subsequent processing procedure is avoided, the cost is reduced, and the yield is improved.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above list of details is only for the concrete description of the feasible embodiments of the present application, they are not intended to limit the scope of the present application, and all equivalent embodiments or modifications that do not depart from the technical spirit of the present application are intended to be included within the scope of the present application.
Claims (12)
1. A method for manufacturing a solar cell, comprising:
preparing a tunneling layer on the surface of the silicon substrate;
preparing a mixed phase silicon film layer and a polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer;
and carrying out heat treatment to obtain a doped polycrystalline silicon layer positioned on the surface of the tunneling layer.
2. The production method according to claim 1, characterized in that: the preparation temperature of the mixed-phase silicon film layer is 570-550 ℃; the preparation temperature of the polycrystalline silicon film layer is set to be 600-630 ℃.
3. The method of claim 2, wherein: the mixed phase silicon film layer and the polycrystalline silicon film layer are prepared by deposition by an LPCVD method, and the reaction gas is silane; the mixed-phase silicon film layer and the polycrystalline silicon film layer are both intrinsic silicon film layers, in the deposition process of the intrinsic silicon film layers, the flow rate of silane is set to be 100-500 sccm, and the reaction pressure is 200-350 mTorr; the heat treatment refers to performing high-temperature diffusion on the silicon substrate, so that the mixed-phase silicon film layer and the polycrystalline silicon film layer are converted to form a doped polycrystalline silicon layer.
4. The method of claim 2, wherein: the mixed phase silicon film layer and the polycrystalline silicon film layer are prepared by in-situ doping deposition by adopting an LPCVD (low pressure chemical vapor deposition) method, and reaction gas comprises silane and phosphine; the mixed phase silicon film layer and the polycrystalline silicon film layer are both phosphorus-doped silicon film layers, in the deposition process of the phosphorus-doped silicon film layers, the flow rate of silane is set to be 100-500 sccm, the flow rate of phosphine is set to be 10-50 sccm, and the reaction pressure is 200-350 mTorr; the heat treatment refers to annealing the silicon substrate.
5. The production method according to claim 3 or 4, characterized in that: the mixed phase silicon film layer and the polycrystalline silicon film layer are deposited in the same reaction chamber, and the step of preparing the mixed phase silicon film layer and the polycrystalline silicon film layer which are sequentially alternated on the surface of the tunneling layer comprises the step of depositing a mixed phase silicon film layer on the surface of the tunneling layer;
removing the reaction gas remained in the reaction chamber, filling nitrogen, and raising the temperature of the reaction chamber;
depositing a polycrystalline silicon film layer on the surface of the mixed phase silicon film layer;
removing the residual reaction gas in the reaction chamber, and introducing nitrogen to reduce the temperature of the reaction chamber;
and depositing another mixed phase silicon film layer on the surface of the polycrystalline silicon film layer.
6. The method of claim 5, wherein: the temperature of the reaction chamber is increased or decreased at a rate of 5-10 ℃/min.
7. The method of claim 1, wherein: the number of layers of the mixed phase silicon film layer and the polycrystalline silicon film layer is the same, and the mixed phase silicon film layer and the polycrystalline silicon film layer are arranged at least two.
8. The production method according to claim 1 or 7, characterized in that: the thickness of the mixed-phase silicon film layer is set to be 10-50 nm; the thickness of the polycrystalline silicon film layer is set to be 10-50 nm.
9. The method of claim 1, wherein: the preparation of the tunneling layer comprises preparing a layer of SiO on the back surface of the silicon substrate by adopting a chemical oxidation or thermal oxidation or ozone oxidation methodxFilm of controlling the SiOxThe thickness of the film is 1 to 3 nm.
10. The method of claim 1, wherein: the silicon substrate is an N-type silicon wafer, and the tunneling layer and the doped polycrystalline silicon layer are arranged on the back surface of the silicon substrate; the doped polycrystalline silicon layer is a phosphorus doped polycrystalline silicon layer.
11. The production method according to claim 1 or 10, characterized in that: the preparation method also comprises the steps of texturing, front diffusion and surface cleaning of the silicon substrate; the texture surface making method comprises the steps of etching a silicon substrate by using KOH or NaOH or TMAH aqueous solution to form a pyramid-shaped texture surface structure on the surface of the silicon substrate; the front diffusion means that a diffusion layer with the doping type opposite to that of the silicon substrate is formed on the front surface of the silicon substrate in a diffusion mode; the surface cleaning refers to cleaning the back surface of the silicon substrate by adopting an alkali solution or an acid solution after the front surface diffusion is finished;
the preparation method also comprises the steps of coating and metalizing after the preparation of the doped polycrystalline silicon layer is finished; the coating comprises sequentially depositing Al on the front surface of the silicon substrate2O3Film or SiNxA film, and SiN is deposited on the back surface of the silicon substratexAnd (3) a membrane.
12. A solar cell, characterized by: the solar cell is manufactured by the manufacturing method according to any one of claims 1 to 11.
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