CN114660523B - Digital channel output synchronization precision measurement and calibration method - Google Patents
Digital channel output synchronization precision measurement and calibration method Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/005—Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
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- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
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Abstract
The invention provides a digital channel output synchronization precision measuring and calibrating method, which comprises the steps of controlling a micro delay adjusting unit to be connected with a current digital channel to be calibrated so that a rising edge signal generated by the digital channel to be calibrated is transmitted to the micro delay adjusting unit and a delay carry chain in sequence, obtaining signals output by each delay unit in the delay carry chain at the same sampling moment, adjusting delay through the delay adjusting unit to obtain calibration original data corresponding to the digital channel to be calibrated, and repeating the steps until the calibration original data of all the channels are obtained and calibrated. The method and the device provided by the invention utilize the time measuring unit in the FPGA, can simultaneously measure a plurality of service boards in parallel, improve the efficiency of measurement and calibration, accelerate the speed of measurement and calibration, and improve the precision of measurement and calibration based on the micro delay adjusting unit.
Description
Technical Field
The invention belongs to the technical field of automatic testing of integrated circuits, and particularly relates to a digital channel output synchronization precision measuring and calibrating method.
Background
With the development of 5G communication, artificial intelligence, big data, Internet of things, new energy technology and the massive popularization of system-in-package (SIP), the chip integration level is higher and higher, the functions are more and more complex, the working frequency is higher and higher, the interface speed is higher and higher, the requirements on the accuracy of the test speed and the alternating current parameter measurement of the integrated circuit test system are higher and higher, and therefore the requirements on the digital channel output synchronization precision of the integrated circuit automatic test equipment are higher and higher.
Ate (automatic Test equipment) is an automatic Test equipment for integrated circuits, which is an automatic Test machine for Integrated Circuits (ICs) in the semiconductor industry for detecting the functional integrity of the ICs and providing the final process of the IC production to ensure the quality of the IC production. ATE is special equipment for detecting functions and performances of chips, and chip yield monitoring, process improvement and reliability verification are all completed through the equipment.
In actual test equipment, due to factors such as different clock delays among different service boards, different wiring delays of timing generation circuits among different digital channels, different delays of PE chips among different digital channels, different transmission delays of physical PCB lines among different digital channels, and the like, a certain time difference exists in output of different digital channels in the test equipment, and the magnitude of the time difference directly affects the test frequency of a chip digital interface and the accuracy of alternating current parameter measurement.
Therefore, how to measure and calibrate the output synchronism of the digital channels in the ATE equipment with high precision is crucial to the integrated circuit automatic test equipment, but the measurement resolution and measurement precision of the conventional calibration method depend on the resolution and precision of the time-to-digital converter, and the requirement of measuring the channel time difference with higher precision cannot be met.
Disclosure of Invention
In view of the above, the present invention provides a method for measuring and calibrating the output synchronization precision of a digital channel, so as to overcome the above-mentioned drawbacks of the prior art.
Specifically, the present invention proposes the following specific examples:
the embodiment of the invention provides a method for measuring and calibrating the output synchronization precision of a digital channel, which is characterized by comprising the following steps:
step A, controlling a channel switching relay, selecting a digital channel as a digital channel to be calibrated to output, and enabling the input end of a micro delay adjusting unit to be connected with the output end of the currently selected digital channel to be calibrated, so that rising edge signals generated by the digital channel to be calibrated are sequentially transmitted to the micro delay adjusting unit and the delay carry chain; the rising edge signal is generated in the digital channel to be calibrated after a specific vector for calibration is executed;
b, acquiring signals output by each delay unit in the delay carry chain at the same sampling time;
step C, adjusting time delay through the micro time delay adjusting unit so that one signal just changes, and taking micro time delay data of the micro time delay adjusting unit and sampling data obtained by sampling each time delay unit at the same sampling time again as calibration original data of the digital channel to be calibrated;
step D, selecting the next digital channel as the current digital channel to be calibrated, and executing the steps A-C until the calibration original data of all the digital channels to be calibrated are obtained; all rising edge signals of the digital channel to be calibrated are synchronously generated after executing the specific vector for calibration;
and E, determining output delay difference between the digital channels to be calibrated based on calibration original data of all the digital channels to be calibrated, calculating delay supplement values required by synchronous output of the digital channels to be calibrated based on the output delay difference, configuring the delay supplement values of the digital channels to be calibrated to output delay units of the digital channels to be calibrated, and synchronously calibrating the output of all the digital channels to be calibrated.
In a specific embodiment, the step B includes:
generating a clock signal and a trigger signal; and taking an edge signal of the clock signal in the trigger signal effective time period as a sampling time, so that the signal sampled by each delay unit is not all 0 and not all 1 in the trigger signal effective time period, and the signals output by each delay unit in the delay carry chain are acquired simultaneously.
In a specific embodiment, if the signal is 1, it represents that the signal is a high level signal, and if the signal is 0, it represents that the signal is a low level signal.
In a specific embodiment, a change in said signal happens to comprise: the delay is adjusted so that a said signal changes from a stable high level signal to a stable low level signal at exactly the said sampling instant.
In a specific embodiment, the adjusting of the delay in step D is implemented by periodically increasing the delay by a preset time length by the small delay adjusting unit.
In a specific embodiment, the delay duration of each delay unit in the delay-and-carry chain is obtained by performing adjustment and calibration on the small delay adjustment unit in advance.
In a specific embodiment, the delay adjustment precision of the small delay adjustment unit is higher than the original precision of each delay unit in the delay carry chain.
In a specific embodiment, the method further comprises:
and if the temperature of the environment where the delay carry chain is located changes, calibrating the delay of each delay unit in the delay carry chain through the micro delay adjusting unit.
In a specific embodiment, the method further comprises:
detecting whether the temperature of the environment where the digital channel to be calibrated is located changes or not;
and if the temperature changes, repeatedly executing the steps A-E.
In a specific embodiment, the method further comprises:
and recording the time delay supplement value required by synchronous output of each digital channel to be calibrated at each temperature.
The invention has at least the following beneficial effects:
the method provided by the invention solves the problems that the measurement resolution and the measurement precision of the traditional method depend on the resolution and the precision of a time-to-digital converter and cannot meet the measurement requirement of channel time difference with higher precision, and based on a micro time delay adjusting unit, the measurement and calibration precision of a digital channel is improved to a great extent, and the measurement and calibration efficiency is improved;
furthermore, the method provided by the invention can be used for simultaneously and parallelly measuring a plurality of service boards, so that the measuring and calibrating speed is effectively increased.
Therefore, the invention provides a method and a device for measuring and calibrating the output synchronization precision of a digital channel, which utilize a time measuring unit in an FPGA (field programmable gate array), can simultaneously measure a plurality of service boards in parallel, improve the efficiency of measurement and calibration, accelerate the speed of measurement and calibration, and improve the measurement and calibration of the digital channel to the highest precision of 0.1 ps.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a digital channel output synchronization accuracy measurement and calibration method provided in embodiment 1;
FIG. 2 is a schematic diagram of the delay adjusting unit adjusting the delay;
FIG. 3 is a schematic diagram of the overall structure of a digital channel output synchronous precision measurement and calibration device;
FIG. 4 is a schematic diagram of a device service board;
fig. 5 is a schematic view of a device calibration plate.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
According to the traditional calibration method, time measurement is carried out on different digital channels through a Time Digital Converter (TDC) unit or an external TDC chip in an FPGA (field programmable gate array), so that the output time difference among the channels is calculated, and then delay compensation calibration is carried out according to the time difference. The invention creatively provides a new method for measuring and calibrating the output synchronization precision of the digital channel, and the method provided by the invention can improve the measurement and calibration of the digital channel to the highest precision of 0.1 ps.
Example 1
The present embodiment provides a method for measuring and calibrating digital channel output synchronization precision, which is applied to a calibration system including a delay adjusting unit and a delay carry chain, please refer to fig. 1, where the method includes:
step A, controlling a channel switching relay, selecting a digital channel as a digital channel to be calibrated to output, and enabling the input end of a micro delay adjusting unit to be connected with the output end of the currently selected digital channel to be calibrated, so that rising edge signals generated by the digital channel to be calibrated are sequentially transmitted to the micro delay adjusting unit and the delay carry chain; the rising edge signal is generated in the digital channel to be calibrated after a specific vector for calibration is executed; and entering the step B.
It should be noted that, as shown in fig. 3 and fig. 4, one ATE device includes a main board and several service boards, each service board includes several channels, and the method provided by the present invention can implement synchronous precision measurement and calibration of digital channel outputs of several service boards at the same time. The solution was carried out in a calibration plate as described in figure 5.
Specifically, the service boards connected to the main board are switched through the relay array, in this embodiment, a plurality of service boards connected to the main board can be calibrated at the same time, and the relay array is used for switching among channels in each service board, so as to ensure that the channel calibration of all the service boards can be completed. M channels of the service boards respectively generate m rising edge signals, each channel generates the rising edge signals through the time sequence generating unit, and the number of the channels of each service board is not less than two, namely m is more than or equal to 2. In this embodiment, the rising edge signal generated by each digital channel to be calibrated through the timing generation unit is a square wave.
And step B, acquiring signals output by each delay unit in the delay carry chain at the same sampling moment, and entering the step C.
It should be noted that the delay-carry chain includes a plurality of delay units, and when the rising edge signal passes through the nth delay unit of the delay-carry chain, the delay duration is the sum of the delay durations of the nth delay unit and all the previous delay units.
Further, the step B includes: generating a clock signal and a trigger signal; and taking an edge signal of the clock signal in the trigger signal effective time period as a sampling time, so that the signal sampled by each delay unit is not all 0 and not all 1 in the trigger signal effective time period, and the signals output by each delay unit in the delay carry chain are acquired simultaneously. As shown in fig. 2.
And step C, adjusting time delay through the micro time delay adjusting unit to enable one signal to be just changed, taking micro time delay data of the micro time delay adjusting unit and sampling data obtained by sampling each time delay unit at the same sampling time again as calibration original data of the digital channel to be calibrated, and entering step D.
Specifically, the calibration original data of the digital channel to be calibrated includes two parts, one part is the micro delay data obtained by performing delay adjustment on the micro delay adjusting unit, and the other part is the sampling data obtained by sampling each delay unit again at the same sampling time, the specific sampling data is composed of signals, for example, the signals obtained by sampling in step B are 1, 1 and 0 in sequence from the delay unit 1 to the unit 3; the sampling signal in step C may be 1, 0, sorted by delay units 1 to 3.
It should be noted that, the adjusting of the delay time is implemented by the delay time adjusting unit periodically increasing the delay time according to a preset time length.
Referring to fig. 2, the signal to be calibrated in the channel m has a delay of t1 with respect to the output of the second delay unit, after the minute delay adjustment unit delays the time of t1, the rising edge of the signal to be calibrated coincides with the sampling time, and the sampling value of the second flip-flop changes from 1 to 0; the signal to be calibrated in the channel n has a delay of t2 relative to the output of the first delay unit, after the micro delay adjusting unit delays the time length of t2, the rising edge of the signal to be calibrated coincides with the sampling time, and the sampling value of the first trigger is changed from 1 to 0.
Specifically, if the signal is 1, it represents that the signal is a high level signal, and if the signal is 0, it represents that the signal is a low level signal.
Further, a change in said signal occurs, comprising: the delay is adjusted so that a said signal changes from a stable high level signal to a stable low level signal at exactly the said sampling instant.
Step D, selecting the next digital channel as the current digital channel to be calibrated, and executing the steps A-C until the calibration original data of all the digital channels to be calibrated are obtained; and E, synchronously generating the rising edge signals of all the digital channels to be calibrated by executing the specific vector for calibration, and entering the step E.
And E, determining output delay difference between the digital channels to be calibrated based on calibration original data of all the digital channels to be calibrated, calculating delay supplement values required by synchronous output of the digital channels to be calibrated based on the output delay difference, configuring the delay supplement values of the digital channels to be calibrated to output delay units of the digital channels to be calibrated, and synchronously calibrating the output of all the digital channels to be calibrated.
For example, taking fig. 2 as an example for explanation, the calibration time of the channel m is: t1+ T2-T1, wherein T1 is the delay of the first delay unit, and T2 is the delay of the second delay unit; t1 is the delay of the minute delay adjustment unit at this time;
the calibration time of the channel n is as follows: T1-T2; t2 is the delay of the minute delay unit at this time;
thus, it can be determined that the time difference between the channel m and the channel n is T = (T1+ T2-T1) - (T1-T2) = T2+ T2-T1, and in this case, it can be determined that the time difference between the channel m and the channel n is 32.8ps, assuming that T1 is 31ps, T2 is 32ps, T1 is 2.6ps, and T2 is 3.4 ps; then a complementary delay may be added to the less delayed channel based on the time difference so that the outputs of the channels are synchronized.
Specifically, it should be noted that the accuracy of the delay time length of each delay unit of the delay carry chain is not high, but the delay time length of each delay unit is fixed and constant at the same temperature. Therefore, it is necessary to obtain the delay time length of each delay unit through a previous measurement, and in particular, the delay time length of each delay unit can be calibrated by using a small delay adjustment unit (a specific method can be implemented by referring to the existing known technology, for example, the solution proposed by application number 2022102635460).
In this embodiment, the delay duration of each delay unit in the delay carry chain may be obtained by performing adjustment and calibration in advance by the small delay adjusting unit, and the precision of the small delay adjusting unit determines the precision of the digital channel output synchronization precision measurement and calibration method provided in this embodiment. The delay adjustment precision of the micro delay adjustment unit can reach 0.1PS (picosecond) or higher, and the specific precision selection can be flexibly selected according to the actual requirement. For example, a small delay cell of chip type HMC911 may be selected.
Specifically, the delay adjustment precision of the small delay adjustment unit is higher than the original precision of each delay unit in the delay carry chain.
Therefore, the digital channel output synchronous precision measurement and calibration method provided by the invention realizes the digital channel output synchronous precision measurement and calibration of each service board in the ATE equipment.
Specifically, the delay of each delay unit in the delay-and-carry chain is related to the temperature, and if the temperature of the environment where the delay-and-carry chain is located changes, the delay of each delay unit in the delay-and-carry chain is calibrated through the small delay adjusting unit.
That is, as long as the temperature of the environment where the delay carry chain is located changes, the amplitude of the change is specifically determined to be, for example, 1 ℃ or 5 ℃, the specific amplitude can be flexibly modulated according to the actual situation, and as long as the amplitude of the change affects the delay of the delay unit, the temperature change can be considered to occur.
Of course, specifically, the delay-and-carry chain can also be directly placed in a constant-temperature environment, so as to avoid multiple calibration operations due to temperature changes.
Further, the method further comprises:
detecting whether the temperature of the environment where the digital channel to be calibrated is located changes or not;
and if the temperature changes, repeatedly executing the steps A-E.
Specifically, as long as the temperature of the environment where the digital channel to be calibrated is located changes, the present scheme needs to be executed again.
In addition, the time delay supplement value required by synchronous output of each digital channel to be calibrated at each temperature is recorded. Therefore, when the same temperature is encountered in the following process, the time delay supplement value corresponding to the changed temperature is directly called, the re-execution is avoided, and the calibration efficiency is accelerated.
In summary, the present invention provides a method and an apparatus for measuring and calibrating the output synchronization precision of a digital channel, which utilize a time measurement unit inside an FPGA to simultaneously measure a plurality of service boards in parallel, thereby improving the efficiency of measurement and calibration, increasing the speed of measurement and calibration, and increasing the measurement and calibration of the digital channel to the highest precision of 0.1 ps.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (9)
1. A method for measuring and calibrating the output synchronization precision of a digital channel is characterized by comprising the following steps:
step A, controlling a channel switching relay, selecting a digital channel as a digital channel to be calibrated to output, and enabling the input end of a micro delay adjusting unit to be connected with the output end of the currently selected digital channel to be calibrated, so that a rising edge signal generated by the digital channel to be calibrated is sequentially transmitted to the micro delay adjusting unit and a delay carry chain; the rising edge signal is generated in the digital channel to be calibrated after a specific vector for calibration is executed;
b, acquiring signals output by each delay unit in the delay carry chain at the same sampling time;
step C, adjusting time delay through the micro time delay adjusting unit so that a signal is just changed from a stable high-level signal to a stable low-level signal at the sampling time, and taking micro time delay data of the micro time delay adjusting unit and sampling data obtained by sampling the time delay units at the same sampling time again as calibration original data of the digital channel to be calibrated;
step D, selecting the next digital channel as the current digital channel to be calibrated, and executing the steps A-C until the calibration original data of all the digital channels to be calibrated are obtained; all rising edge signals of the digital channel to be calibrated are synchronously generated after executing the specific vector for calibration;
and E, determining output delay difference between the digital channels to be calibrated based on calibration original data of all the digital channels to be calibrated, calculating delay supplement values required by synchronous output of the digital channels to be calibrated based on the output delay difference, configuring the delay supplement values of the digital channels to be calibrated to output delay units of the digital channels to be calibrated, and synchronously calibrating the output of all the digital channels to be calibrated.
2. The digital channel output synchronization accuracy measurement and calibration method of claim 1, wherein said step B comprises:
generating a clock signal and a trigger signal; and taking an edge signal of the clock signal in the trigger signal effective time period as a sampling time, so that a signal sampled by each delay unit is not all 0 and not all 1 in the trigger signal effective time period, and a signal output by each delay unit in the delay carry chain is acquired simultaneously.
3. The method of claim 2, wherein if the signal is 1, the signal is represented as a high signal, and if the signal is 0, the signal is represented as a low signal.
4. The method as claimed in claim 1, wherein the step D of adjusting the delay is implemented by the fine delay adjusting unit periodically increasing the delay by a preset time length.
5. The method as claimed in claim 1, wherein the delay duration of each delay unit in the delay-and-carry chain is obtained by adjusting and calibrating the tiny delay adjusting unit in advance.
6. The method as claimed in claim 1 or 5, wherein the delay adjustment precision of the small delay adjustment unit is higher than the original precision of each delay unit in the delay carry chain.
7. A digital channel output synchronization accuracy measurement and calibration method according to claim 1 or 5, wherein said method further comprises:
and if the temperature of the environment where the delay carry chain is located changes, calibrating the delay of each delay unit in the delay carry chain through the micro delay adjusting unit.
8. A method of digital channel output synchronization accuracy measurement and calibration as claimed in claim 1, said method further comprising:
detecting whether the temperature of the environment where the digital channel to be calibrated is located changes or not;
and if the temperature changes, repeatedly executing the steps A-E.
9. The digital channel output synchronization accuracy measurement and calibration method of claim 8, further comprising:
and recording the time delay supplement value required by synchronous output of each digital channel to be calibrated at each temperature.
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