CN114650670B - Circuit board with heat dissipation block and preparation method thereof - Google Patents
Circuit board with heat dissipation block and preparation method thereof Download PDFInfo
- Publication number
- CN114650670B CN114650670B CN202011508018.4A CN202011508018A CN114650670B CN 114650670 B CN114650670 B CN 114650670B CN 202011508018 A CN202011508018 A CN 202011508018A CN 114650670 B CN114650670 B CN 114650670B
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- slot
- groove
- circuit substrate
- board
- rivet
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- 230000017525 heat dissipation Effects 0.000 title claims abstract description 14
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000010410 layer Substances 0.000 claims abstract description 71
- 239000000758 substrate Substances 0.000 claims abstract description 62
- 239000012790 adhesive layer Substances 0.000 claims abstract description 27
- 230000000149 penetrating effect Effects 0.000 claims abstract description 8
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 238000004891 communication Methods 0.000 claims description 20
- 230000007423 decrease Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 11
- 230000008569 process Effects 0.000 abstract description 8
- 230000002349 favourable effect Effects 0.000 abstract 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 18
- 229910052802 copper Inorganic materials 0.000 description 11
- 239000010949 copper Substances 0.000 description 11
- 239000011889 copper foil Substances 0.000 description 7
- 239000002390 adhesive tape Substances 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 238000003801 milling Methods 0.000 description 4
- -1 polyethylene terephthalate Polymers 0.000 description 4
- 239000004721 Polyphenylene oxide Substances 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 3
- 239000011112 polyethylene naphthalate Substances 0.000 description 3
- 229920000139 polyethylene terephthalate Polymers 0.000 description 3
- 239000005020 polyethylene terephthalate Substances 0.000 description 3
- 229920006380 polyphenylene oxide Polymers 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000010959 steel Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
Abstract
A preparation method of a circuit board comprises the following steps: bonding the first circuit substrate to the second circuit substrate through an adhesive layer to obtain a multi-layer board, wherein the multi-layer board comprises a first surface and a second surface; forming a containing groove penetrating through the first surface and the second surface in the multilayer board; a rivet is arranged in the accommodating groove, and a slot is arranged in the rivet; providing the radiating block, wherein the radiating block is provided with a first end part and a second end part which are opposite, and the periphery of the first end part is provided with a chamfer; and sequentially inserting the first end part and the second end part into the slot, so that the heat dissipation block is installed in the slot to obtain the circuit board. The application also provides a circuit board prepared by the preparation method. The method does not need to open a groove in the adhesive layer in advance, is favorable for simplifying the manufacturing process, can avoid the problem that the circuit substrate is easy to collide in the riveting process due to the alignment error between the circuit substrates, and does not need to press the adhesive layer to fill gaps subsequently.
Description
Technical Field
The application relates to the field of circuit boards, in particular to a circuit board with a heat dissipation block and a preparation method thereof.
Background
With the increasing demands of people on various electronic products such as computers, consumer electronics and communication, along with the diversification of functions of the electronic products, electronic elements in the electronic products are more and more centralized. The circuit board is used as a support and a carrier for electric connection of electronic elements, so that heat dissipation becomes a great problem facing the circuit board industry.
In the prior art, a copper block is generally required to be arranged in a circuit board to serve as a heat dissipation block, and the specific steps are as follows: and forming a penetrating slot in the double-sided circuit substrate and the prepreg, sticking an adhesive tape on one side of the slot as a support, placing a copper block in the slot, arranging the prepreg on one side of the double-sided circuit substrate far away from the adhesive tape, performing circuit layering, pressing to enable the prepreg to fill a gap between the slot and the copper block, and finally tearing the adhesive tape.
However, the milling cutter rotated at high speed during grooving generates a lot of heat, so that the contact surface of the prepreg and the milling cutter is melted, and the grooving size is difficult to control. Secondly, there is an alignment error between adjacent circuit substrates or between the circuit substrates and the prepreg, so that the width of the slot needs to be increased to avoid collision between the copper block and the circuit substrates when the copper block is placed, and the space utilization rate of the circuit board is not high. And thirdly, in order to fully fill gaps between the grooves and the copper blocks after the prepregs are pressed, the thickness and the glue content of the prepregs need to be set larger, so that the application of the manufacturing process is limited. On the other hand, if the prepreg is insufficient in thickness or insufficient in glue content, bubbles or cracks appear around the copper block due to insufficient glue filling, and the reliability of the product is reduced.
Disclosure of Invention
In order to solve at least one of the above disadvantages of the prior art, it is necessary to provide a circuit board with a heat sink.
In addition, the application also provides a preparation method of the circuit board.
The application provides a preparation method of a circuit board with a heat dissipation block, which comprises the following steps: bonding the first circuit substrate to the second circuit substrate through an adhesive layer to obtain a multi-layer board, wherein the multi-layer board comprises a first surface and a second surface which are opposite; forming a containing groove penetrating through the first surface and the second surface in the multilayer board; a rivet is arranged in the accommodating groove, and a slot is arranged in the rivet; providing the radiating block, wherein the radiating block is provided with a first end part and a second end part which are opposite, and the periphery of the first end part is provided with a chamfer; and sequentially inserting the first end part and the second end part into the slot, so that the heat dissipation block is installed in the slot to obtain the circuit board.
In some possible implementations, the accommodating groove includes a first groove portion, a communication portion, and a second groove portion that are sequentially connected, the rivet includes a first head portion, a nail portion, and a second head portion that are sequentially connected, the slot penetrates the first head portion, the nail portion, and the second head portion, the first head portion and the second head portion are respectively mounted in the first groove portion and the second groove portion, and the nail portion is mounted in the communication portion.
In some possible implementations, the width of the first groove portion gradually decreases and the width of the second groove portion gradually increases along the direction from the first circuit substrate to the second circuit substrate, and the width of the communication portion is equal to a point where the widths of the first groove portion and the second groove portion are minimum.
In some possible implementations, the width of the heat sink is greater than the width of the slot along the extending direction of the multi-layer board, such that the heat sink is secured in the slot by an interference fit.
In some possible implementations, the height of the heat sink is equal to the height of the circuit board.
The application also provides a circuit board with the radiating block, which comprises a multi-layer board, rivets and the radiating block. The multilayer board comprises a first circuit substrate, a second circuit substrate and an adhesive layer, wherein the second circuit substrate is adhered to the first circuit substrate through the adhesive layer, the multilayer board comprises a first surface and a second surface which are opposite, and a containing groove penetrating through the first surface and the second surface is formed in the multilayer board. The rivet is arranged in the accommodating groove, and a slot is formed in the rivet. The heat dissipation block is installed in the slot. The heat dissipation block is provided with a first end and a second end which are opposite, and the periphery of the first end is provided with a chamfer.
In some possible implementations, the accommodating groove includes a first groove portion, a communication portion, and a second groove portion that are sequentially connected, the rivet includes a first head portion, a nail portion, and a second head portion that are sequentially connected, the slot penetrates the first head portion, the nail portion, and the second head portion, the first head portion and the second head portion are respectively mounted in the first groove portion and the second groove portion, and the nail portion is mounted in the communication portion.
In some possible implementations, the width of the first groove portion gradually decreases and the width of the second groove portion gradually increases along the direction from the first circuit substrate to the second circuit substrate, and the width of the communication portion is equal to a point where the widths of the first groove portion and the second groove portion are minimum.
In some possible implementations, the heat dissipating block is fixed in the slot by an interference fit.
In some possible implementations, the height of the heat sink is equal to the height of the circuit board.
The method and the device do not need to be grooved in the adhesive layer in advance, avoid the problem that the grooving size is difficult to control due to heat generated by rotation of the milling cutter in the grooving process of the adhesive layer, further ensure the quality of the adhesive layer, and are beneficial to simplifying the flow because the steps of grooving, sticking adhesive tape, tearing adhesive tape and the like are omitted. Secondly, the holding groove is offered again after first circuit substrate and second circuit substrate pass through the adhesive layer fixed in this application, can avoid the circuit substrate to open a groove earlier under the condition of counterpoint again because counterpoint error leads to the easy problem of collision circuit substrate in the riveting process. And thirdly, as the adhesive layer is not needed to be pressed to fill the gap between the radiating block and the accommodating groove, the thickness and the adhesive content of the adhesive layer are not needed to be too large, the limitation of the manufacturing process is avoided, and the defect of products caused by insufficient filling of the adhesive can be avoided.
Drawings
Fig. 1 is a schematic cross-sectional view of a bonded first circuit substrate and second circuit substrate according to an embodiment of the present application.
Fig. 2 is a schematic cross-sectional view of a multilayer board obtained by etching copper foil layers of the first wiring substrate and the second wiring substrate shown in fig. 1.
Fig. 3 is a schematic cross-sectional view of the multi-layer board shown in fig. 2 after the accommodating groove is formed therein.
Fig. 4 is a schematic cross-sectional view of the receiving groove shown in fig. 3 after riveting a rivet.
Fig. 5 is a schematic cross-sectional view of the circuit board obtained after mounting the heat sink in the rivet shown in fig. 4.
Description of the main reference signs
The following detailed description will further illustrate the application in conjunction with the above-described figures.
Detailed Description
In order that the above-recited objects, features and advantages of the present application will be more clearly understood, a more particular description of the application will be rendered by reference to the appended drawings and appended detailed description. In addition, embodiments of the present application and features of the embodiments may be combined with each other without conflict. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, and the described embodiments are merely some, rather than all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes all and any combination of one or more of the associated listed items.
In various embodiments of the present application, for ease of description and not limitation, the term "coupled" as used in the specification and claims of the present application is not limited to physical or mechanical coupling, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which change accordingly when the absolute position of the object to be described changes.
The embodiment of the application provides a preparation method of a circuit board 100, which comprises the following steps:
step S1: referring to fig. 1, a first circuit substrate 10 and a second circuit substrate 20 are provided, and the second circuit substrate 20 is bonded to the first circuit substrate 10 through an adhesive layer 30.
In one embodiment, the first circuit board 10 includes a first base layer 11, and a first copper foil layer 12 and a first circuit layer 13 respectively disposed on opposite surfaces of the first base layer 11. The second circuit substrate 20 includes a second base layer 21, a second copper foil layer 22 and a second circuit layer 23 respectively disposed on two opposite surfaces of the second base layer 21. The adhesive layer 30 is used to bond the first circuit layer 13 and the second circuit layer 23. That is, after bonding, the first copper foil layer 12 and the second copper foil layer 22 are located outside.
In an embodiment, the material of the first base layer 11 and the second base layer 21 is an insulating resin, and specifically, the material of the first base layer 11 and the second base layer 21 may be one selected from epoxy resin (epoxy resin), prepreg (PP), BT resin, polyphenylene oxide (polyphenylene Oxide, PPO), polyimide (PI), polyethylene terephthalate (polyethylene terephthalate, PET), polyethylene naphthalate (polyethylene naphthalate, PEN), and the like. The materials of the first base layer 11 and the second base layer 21 may be the same or different.
In one embodiment, the adhesive layer 30 may be a conventional pure adhesive, such as a prepreg.
Step S2: referring to fig. 2, the third circuit layer 14 and the fourth circuit layer 24 are etched in the first copper foil layer 12 and the second copper foil layer 22, respectively, to obtain a multilayer board 40. Wherein the multilayer board 40 includes a first surface 41 and a second surface 42 opposite to each other, the first surface 41 corresponds to the third circuit layer 14, and the second surface 42 corresponds to the fourth circuit layer 24.
Specifically, the third wiring layer 14 and the fourth wiring layer 24 may be prepared by subtractive processes, i.e., by drilling, surface treatment, copper plating, film pressing, pattern transfer, etching, film tearing, and the like. Wherein, after drilling and copper plating, first conductive portions (not shown) and second conductive portions (not shown) are formed in the first base layer 11 and the second base layer 21, respectively. The first circuit layer 13 and the third circuit layer 14 are electrically connected through the first conductive portion. The second circuit layer 23 and the fourth circuit layer 24 are electrically connected through the second conductive portion.
In another embodiment, the first circuit substrate 10 and the second circuit substrate 20 provided in the step S1 may be double-sided circuit substrates, that is, the first circuit substrate 10 includes a first base layer 11 and a first circuit layer 13 and a third circuit layer 14 respectively disposed on opposite surfaces of the first base layer 11. The second circuit substrate 20 includes a second base layer 21, and a second circuit layer 23 and a fourth circuit layer 24 respectively disposed on opposite surfaces of the second base layer 21. Step S2 may be omitted at this time.
In step S3, referring to fig. 3, a receiving groove 43 penetrating the first surface 41 and the second surface 42 is formed in the multi-layer board 40.
In an embodiment, the accommodating groove 43 includes a first groove portion 431, a communication portion 433, and a second groove portion 432 connected in this order. The first groove portion 431 extends from the first surface 41 toward the third circuit layer 14 and the first base layer 11, and the first groove 51 penetrates the third circuit layer 14 and a part of the first base layer 11. The second slot 51 extends from the second surface 42 toward the fourth wiring layer 24 and the second base layer 21, and the second slot 51 penetrates through the fourth wiring layer 24 and a portion of the second base layer 21. The communication portion 433 is connected between the first groove portion 431 and the second groove portion 432, that is, the communication portion 433 penetrates another part of the first base layer 11, the first circuit layer 13, the adhesive layer 30, the second circuit layer 23, and another part of the second base layer 21.
Further, the width of the first groove portion 431 is gradually reduced and the width of the second groove portion 432 is gradually increased along the direction of the first wiring substrate 10 to the second wiring substrate 20. The first groove 431 includes a first inclined surface 4311 inclined with respect to the first surface 41, and the second groove 432 includes a second inclined surface 4321 inclined with respect to the second surface 42. The width of the communication portion 433 is equal to where the width of the first groove portion 431 and the second groove portion 432 is smallest.
In step S4, referring to fig. 4, a hollow rivet 50 is installed in the accommodating groove 43, and a slot 51 is provided in the rivet 50.
In one embodiment, rivet 50 may be a countersunk rivet that includes a first head portion 501, a shank portion 503, and a second head portion 502 connected in sequence. The slot 51 extends through the first head 501, the peg 503 and the second head 502. The first head 501 and the second head 502 are mounted to the first groove 431 and the second groove 432, respectively, and the nail 503 is mounted to the communication portion 433.
Wherein the width of the first head 501 is equal to the width of the first groove 431, the width of the second head 502 is equal to the width of the second groove 432, and the width of the nail 503 is equal to the width of the communication 433. The first head 501 has a height equal to the height of the first groove 431, the second head 502 has a height equal to the height of the second groove 432, and the nail 503 has a height equal to the height of the communication 433. Wherein the height is defined as the dimension of the first header 501, the second header 502, or the communication portion 433 in the direction from the first wiring substrate 10 to the second wiring substrate 20.
In practice, the nail portion 503 with the first head portion 501 may be mounted to the accommodating groove 43, and then the second head portion 502 may be mounted to the other end of the nail portion 503 away from the first head portion 501. In this way, the rivet 50 can be prevented from coming out due to the interaction force between the first head 501 and the first inclined surface 4311 and between the second inclined surface 4321.
In one embodiment, the rivet 50 is made of copper, silver, aluminum, steel, or the like.
In step S5, referring to fig. 5, a heat sink 60 is mounted in the slot 51 of the rivet 50, thereby obtaining the circuit board 100.
Wherein the heat sink 60 has opposite first and second ends 61, 62. The outer periphery of the first end 61 is provided with a chamfer 610. When installed, the first end 61 and the second end 62 are sequentially inserted into the slot 51. In practice, the first end 61 of the heat sink 60 may be aligned with the slot 51 and then the heat sink 60 may be pushed into the slot 51 by striking the second end 62 of the heat sink 60. And the periphery of the first end 61 is provided with a chamfer 610, so that the first end 61 can play a better guiding role in the process of pushing the heat dissipation block 60 into the slot 51. Wherein the chamfer 610 is defined as an angle formed between a chamfer face and a side face of the heat sink 60. The chamfer 610 may be less than or equal to 45 degrees. Alternatively, the chamfer 610 may be 45 degrees.
In one embodiment, the width of the heat sink 60 is slightly greater than the width of the slot 51, such that the heat sink 60 may be secured in the slot 51 by an interference fit. The width is defined as the dimension of the heat dissipation block 60 or the slot 51 along the extending direction of the multilayer board 40.
In one embodiment, when the heat sink 60 is mounted to the slot 51, the height of the heat sink 60 is equal to the height of the circuit board 100. In another embodiment, when the heat dissipating block 60 is mounted to the slot 51, the height of the heat dissipating block 60 may be greater than the height of the circuit board 100, and the portion of the heat dissipating block 60 above the circuit board 100 may be removed by grinding or laser cutting, so as to ensure the surface of the circuit board 100 to be flat. The difference between the height of the heat dissipating block 60 and the height of the circuit board 100 is not more than 20 micrometers, and if the difference exceeds the difference, the post-processing is not facilitated.
In one embodiment, the heat dissipating block 60 may be made of a metal or alloy with high thermal conductivity, such as copper, silver, aluminum or steel.
In another embodiment, the rivet 50 is not limited to a countersunk rivet, but may be a blind rivet or a blind rivet. For example, when the rivet 50 is a burring rivet, the rivet 50 includes a nail portion and a burring (not shown) connecting the nail portion. The flange is folded over to the first surface 41 and the second surface 42 as compared to the nail portion, thereby preventing the rivet 50 from being pulled out as well.
The above embodiment is described by taking the lamination of the first circuit substrate 10 and the second circuit substrate 20 as an example, however, it is understood that the number of circuit layers of the circuit board 100 of the present application is not limited thereto, and for example, the circuit layers may be further increased on the second circuit substrate 20. At this time, the specific positions of the first groove portion 431, the communication portion 433, and the second groove portion 432 in the accommodating groove 43 may be changed as appropriate.
Referring to fig. 5, the embodiment of the present application further provides a circuit board 100 manufactured by the above manufacturing method, including the multilayer board 40 and the heat sink 60. The multilayer board 40 includes a first wiring substrate 10, a second wiring substrate 20, and an adhesive layer 30. The second circuit substrate 20 is bonded to the first circuit substrate 10 by the adhesive layer 30. Wherein the multiwall sheet 40 comprises opposing first and second surfaces 41, 42. The multi-layer board 40 is provided with a receiving groove 43 penetrating the first surface 41 and the second surface 42. A hollow rivet 50 is installed in the accommodating groove 43, and a slot 51 is provided in the rivet 50. The heat sink 60 is mounted in the slot 51 of the rivet 50. The heat sink 60 has opposite first and second ends 61, 62, the outer periphery of the first end 61 being provided with a chamfer 610.
The method and the device do not need to be grooved in the adhesive layer 30 in advance, avoid the problem that the grooving size is difficult to control due to heat generated by rotation of the milling cutter in the grooving process of the adhesive layer 30, further ensure the quality of the adhesive layer 30, and are beneficial to simplifying the flow because the steps of grooving, taping, tearing the adhesive tape and the like are omitted. Secondly, the accommodating groove 43 is formed after the first circuit substrate 10 and the second circuit substrate 20 are fixed through the adhesive layer 30, so that the problem that the circuit substrate is easy to collide in the riveting process due to alignment errors under the condition that the circuit substrate is slotted and aligned first can be avoided. Again, since the adhesive layer 30 is not needed to be pressed to fill the gap between the heat dissipating block 60 and the accommodating groove 43, the thickness and the adhesive content of the adhesive layer 30 are not needed to be too large, which avoids the limitation of the process and also avoids the product defect caused by insufficient filling of the adhesive.
Finally, the present application can match the heat sink 60 with a corresponding height according to the height of the multi-layer board 40, so that the problem of size mismatch between the circuit board 100 and the heat sink 60 can be avoided.
The above embodiments are only for illustrating the technical solution of the present application and not for limiting, and although the present application has been described in detail with reference to the above preferred embodiments, it should be understood by those skilled in the art that the technical solution of the present application may be modified or substituted without departing from the spirit and scope of the technical solution of the present application.
Claims (8)
1. The preparation method of the circuit board with the heat dissipation block is characterized by comprising the following steps:
bonding the first circuit substrate to the second circuit substrate through an adhesive layer to obtain a multi-layer board, wherein the multi-layer board comprises a first surface and a second surface which are opposite;
forming a containing groove penetrating through the first surface and the second surface in the multilayer board;
installing a rivet in the accommodating groove, wherein the height of the rivet is equal to that of the multilayer board, and a slot is formed in the rivet;
providing the radiating block, wherein the radiating block is provided with a first end part and a second end part which are opposite, the periphery of the first end part is provided with a chamfer, and the height of the radiating block is equal to the height of the multilayer board;
and sequentially inserting the first end part and the second end part into the slot, so that the heat dissipation block is installed in the slot to obtain the circuit board.
2. The method of manufacturing a circuit board with a heat dissipating block according to claim 1, wherein the receiving groove includes a first groove portion, a communicating portion, and a second groove portion connected in sequence, the rivet includes a first head portion, a nail portion, and a second head portion connected in sequence, the slot penetrates the first head portion, the nail portion, and the second head portion, the first head portion and the second head portion are respectively mounted to the first groove portion and the second groove portion, and the nail portion is mounted to the communicating portion.
3. The method of manufacturing a circuit board with a heat dissipating block according to claim 2, wherein the width of the first groove portion is gradually reduced and the width of the second groove portion is gradually increased in a direction from the first circuit substrate to the second circuit substrate, and the width of the communication portion is equal to a position where the widths of the first groove portion and the second groove portion are minimum.
4. The method of manufacturing a circuit board with a heat sink according to claim 1, wherein the heat sink has a width greater than the width of the slot along the extending direction of the multi-layer board, such that the heat sink is fixed in the slot by interference fit.
5. A circuit board with a heat sink, comprising:
the multi-layer board comprises a first circuit substrate, a second circuit substrate and an adhesive layer, wherein the second circuit substrate is adhered to the first circuit substrate through the adhesive layer, the multi-layer board comprises a first surface and a second surface which are opposite, and a containing groove penetrating through the first surface and the second surface is formed in the multi-layer board;
the rivet is arranged in the accommodating groove, the height of the rivet is equal to that of the multilayer board, and a slot is formed in the rivet;
the radiating block is arranged in the groove, the radiating block is provided with a first end part and a second end part which are opposite, the periphery of the first end part is provided with a chamfer, and the height of the radiating block is equal to that of the multilayer board.
6. The circuit board with a heat sink of claim 5, wherein the receiving slot comprises a first slot portion, a communication portion, and a second slot portion connected in sequence, the rivet comprises a first head portion, a nail portion, and a second head portion connected in sequence, the slot penetrates the first head portion, the nail portion, and the second head portion, the first head portion and the second head portion are mounted in the first slot portion and the second slot portion, respectively, and the nail portion is mounted in the communication portion.
7. The circuit board with a heat dissipating block of claim 6, wherein the width of the first slot portion gradually decreases and the width of the second slot portion gradually increases in the direction from the first circuit substrate to the second circuit substrate, and the width of the communication portion is equal to where the widths of the first slot portion and the second slot portion are smallest.
8. The circuit board with heat sink of claim 5, wherein the heat sink is secured in the slot by an interference fit.
Priority Applications (1)
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CN202011508018.4A CN114650670B (en) | 2020-12-18 | 2020-12-18 | Circuit board with heat dissipation block and preparation method thereof |
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CN202011508018.4A CN114650670B (en) | 2020-12-18 | 2020-12-18 | Circuit board with heat dissipation block and preparation method thereof |
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CN114650670B true CN114650670B (en) | 2024-03-12 |
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Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0888468A (en) * | 1994-09-14 | 1996-04-02 | Toshiba Chem Corp | Method for manufacturing multilayer-printed wiring board |
JPH09181453A (en) * | 1995-12-21 | 1997-07-11 | Sony Corp | Multilayer wiring board and its manufacturing method |
KR20000058333A (en) * | 2000-04-21 | 2000-10-05 | 박상복 | A fixture and laminating method of multi- layer printed circuit board |
JP2006100483A (en) * | 2004-09-29 | 2006-04-13 | Matsushita Electric Works Ltd | Heat dissipation structure of printed wiring board |
TW200628039A (en) * | 2005-01-21 | 2006-08-01 | Pan Tec Corp Ltd | Method for laminating multi-layer printed circuit board |
KR20100133286A (en) * | 2009-06-11 | 2010-12-21 | (주) 지오멘토 | Led lighting device having radiating structure |
CN202009533U (en) * | 2010-11-04 | 2011-10-12 | 深圳松维电子股份有限公司 | LED printed circuit board |
CN103517574A (en) * | 2012-06-26 | 2014-01-15 | 富葵精密组件(深圳)有限公司 | Bearing jig and method for manufacturing rigid-flexible printed circuit board |
WO2016026749A1 (en) * | 2014-08-18 | 2016-02-25 | Basler Ag | Optical module having an objective carrier and having a circuit board contacted in a thermally conductive manner |
CN105764273A (en) * | 2016-04-22 | 2016-07-13 | 深圳崇达多层线路板有限公司 | Manufacturing method of PCB embedded with heat dissipation block |
CN207340272U (en) * | 2017-07-13 | 2018-05-08 | 信丰迅捷兴电路科技有限公司 | A kind of multi-layer H DI wiring boards of internal layer interconnection |
JP2018093006A (en) * | 2016-11-30 | 2018-06-14 | Koa株式会社 | Ceramic wiring board |
CN207820306U (en) * | 2017-12-27 | 2018-09-04 | 东莞市盈聚电源有限公司 | A kind of radiator structure of Novel PCB board |
CN110099524A (en) * | 2019-04-30 | 2019-08-06 | 东莞联桥电子有限公司 | A kind of pressing production method of multilayer circuit board |
CN209913443U (en) * | 2019-07-03 | 2020-01-07 | 宜宾宝包网络技术有限公司 | A high-efficient heat dissipation bus duct for big data |
CN210202166U (en) * | 2018-12-21 | 2020-03-27 | 惠州市大亚湾科翔科技电路板有限公司 | PCB capable of avoiding layer deviation based on rivet structure |
CN111432562A (en) * | 2020-05-11 | 2020-07-17 | 广东得为科技有限公司 | Automatic drilling and riveting integrated machine for manufacturing high-multilayer circuit board and machining process |
-
2020
- 2020-12-18 CN CN202011508018.4A patent/CN114650670B/en active Active
Patent Citations (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0888468A (en) * | 1994-09-14 | 1996-04-02 | Toshiba Chem Corp | Method for manufacturing multilayer-printed wiring board |
JPH09181453A (en) * | 1995-12-21 | 1997-07-11 | Sony Corp | Multilayer wiring board and its manufacturing method |
KR20000058333A (en) * | 2000-04-21 | 2000-10-05 | 박상복 | A fixture and laminating method of multi- layer printed circuit board |
JP2006100483A (en) * | 2004-09-29 | 2006-04-13 | Matsushita Electric Works Ltd | Heat dissipation structure of printed wiring board |
TW200628039A (en) * | 2005-01-21 | 2006-08-01 | Pan Tec Corp Ltd | Method for laminating multi-layer printed circuit board |
KR20100133286A (en) * | 2009-06-11 | 2010-12-21 | (주) 지오멘토 | Led lighting device having radiating structure |
CN202009533U (en) * | 2010-11-04 | 2011-10-12 | 深圳松维电子股份有限公司 | LED printed circuit board |
CN103517574A (en) * | 2012-06-26 | 2014-01-15 | 富葵精密组件(深圳)有限公司 | Bearing jig and method for manufacturing rigid-flexible printed circuit board |
WO2016026749A1 (en) * | 2014-08-18 | 2016-02-25 | Basler Ag | Optical module having an objective carrier and having a circuit board contacted in a thermally conductive manner |
CN105764273A (en) * | 2016-04-22 | 2016-07-13 | 深圳崇达多层线路板有限公司 | Manufacturing method of PCB embedded with heat dissipation block |
JP2018093006A (en) * | 2016-11-30 | 2018-06-14 | Koa株式会社 | Ceramic wiring board |
CN207340272U (en) * | 2017-07-13 | 2018-05-08 | 信丰迅捷兴电路科技有限公司 | A kind of multi-layer H DI wiring boards of internal layer interconnection |
CN207820306U (en) * | 2017-12-27 | 2018-09-04 | 东莞市盈聚电源有限公司 | A kind of radiator structure of Novel PCB board |
CN210202166U (en) * | 2018-12-21 | 2020-03-27 | 惠州市大亚湾科翔科技电路板有限公司 | PCB capable of avoiding layer deviation based on rivet structure |
CN110099524A (en) * | 2019-04-30 | 2019-08-06 | 东莞联桥电子有限公司 | A kind of pressing production method of multilayer circuit board |
CN209913443U (en) * | 2019-07-03 | 2020-01-07 | 宜宾宝包网络技术有限公司 | A high-efficient heat dissipation bus duct for big data |
CN111432562A (en) * | 2020-05-11 | 2020-07-17 | 广东得为科技有限公司 | Automatic drilling and riveting integrated machine for manufacturing high-multilayer circuit board and machining process |
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