CN114611285A - Power device thermal resistance model construction method and device and storage medium - Google Patents

Abstract

The invention discloses a method, a device and a storage medium for constructing a thermal resistance model of a power device, wherein the method comprises the following steps: performing steady-state thermal simulation analysis according to preset device material parameters and preset contact thermal conductivity coefficients, determining the device material parameters and the contact thermal conductivity coefficients, and establishing a junction-shell thermal resistance model; performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by preset shell-radiator thermal resistance, determining the heat dissipation coefficient, and establishing a shell-radiator thermal resistance model; performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model; and determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model. By implementing the invention, the highest junction temperature of the device under a specific working condition can be pre-judged by adopting the constructed thermal resistance model of the power device for simulation calculation, so that the device is matched with reasonable heat dissipation conditions, and the research and development period is shortened.

Description

Power device thermal resistance model construction method and device and storage medium

Technical Field

The invention relates to the technical field of power devices, in particular to a method and a device for constructing a thermal resistance model of a power device and a storage medium.

Background

With the increasing requirements of people on the performance parameters of semiconductor power devices, the semiconductor power devices are continuously developed towards the direction of high voltage and large current, and the problems of junction temperature rise caused by the increasing heat power consumption, device-related reliability performance reduction and the like gradually become obstacles for restricting the development and application of the semiconductor power devices. The increase of the junction temperature can not only cause the drift of the electrical parameters of the semiconductor power device, but also influence the reliability of the device and shorten the service life of the device.

The power devices such as the IGBT generally adopt a compression joint or welding packaging mode, the junction temperature of the power devices is difficult to directly measure, and the junction temperature of a chip is difficult to directly obtain, so that the research on the temperature characteristics of the IGBT by a simulation means has certain advantages. A thermal simulation analysis model of the power device is established by depending on a three-dimensional structure model and material parameters. Key parameters of materials that affect thermal simulation analysis include thermal conductivity, heat capacity, and density. The heat capacity determines the ability of the material to store heat, the thermal conductivity determines the ability of the material to transfer heat, and the density of the material is also a key parameter affecting the heat distribution, since the heat capacity is related to the mass of the material. Therefore, how to perform thermal simulation analysis on the power device through material parameters such as thermal conductivity, heat capacity, density and the like to obtain the junction temperature of the chip, so that the reliability analysis of the device is an urgent problem to be solved at present.

Disclosure of Invention

In view of this, embodiments of the present invention provide a method, an apparatus, and a storage medium for constructing a thermal resistance model of a power device, so as to solve the technical problem in the prior art that thermal simulation analysis of the power device is not performed through material parameters such as thermal conductivity, thermal capacity, and density.

The technical scheme provided by the invention is as follows:

the first aspect of the embodiments of the present invention provides a method for constructing a thermal resistance model of a power device, including: performing steady-state thermal simulation analysis according to preset device material parameters and preset contact thermal conductivity coefficients, determining the device material parameters and the contact thermal conductivity coefficients, and establishing a junction-shell thermal resistance model; performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by the preset shell-radiator thermal resistance, determining the heat dissipation coefficient, and establishing a shell-radiator thermal resistance model; performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model; and determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model.

Optionally, performing steady-state thermal simulation analysis according to preset device material parameters and thermal conductivity coefficients, determining the device material parameters and the thermal conductivity coefficients, and establishing a junction-shell thermal resistance model, including: performing steady-state thermal simulation analysis according to preset device material parameters, determining the device material parameters, and establishing a junction-shell medium thermal resistance model; performing steady-state thermal simulation analysis according to the thermal conductivity, determining the contact thermal conductivity, and establishing a junction-shell contact thermal resistance model; and determining a junction-shell thermal resistance model according to the junction-shell medium thermal resistance model and the junction-shell contact thermal resistance model.

Optionally, performing steady-state thermal simulation analysis according to preset device material parameters, determining the device material parameters, and establishing a junction-shell dielectric thermal resistance model, including: performing steady-state thermal simulation analysis according to preset device material parameters, and determining the highest junction temperature of the chip, the shell temperature and the heating power of the chip; calculating the medium thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip; and determining whether the preset device material parameters are modified or not according to the magnitude relation between the junction-shell medium thermal resistance and the junction-shell thermal resistance test value, and continuing to perform steady-state thermal simulation analysis on the basis of the modified device material parameters until the junction-shell medium thermal resistance is smaller than the junction-shell thermal resistance test value, so as to obtain a junction-shell medium thermal resistance model under the corresponding device material parameters.

Optionally, performing steady-state thermal simulation analysis according to the thermal conductivity, determining the contact thermal conductivity, and establishing a junction-shell contact thermal resistance model, including: calculating to obtain preset contact thermal resistance according to the junction-shell thermal resistance test value and the difference value of the medium thermal resistance between the junction and the shell in the junction-shell medium thermal resistance model; calculating to obtain a preset contact thermal conductivity according to the relation between the preset contact thermal resistance and the contact thermal conductivity; performing steady-state thermal simulation analysis according to the preset contact thermal conductivity and device material parameters in the junction-shell medium thermal resistance model, and determining the highest junction temperature of the chip, the shell temperature and the heating power of the chip; calculating the thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip; and determining whether the preset contact thermal conductivity is modified or not according to the magnitude relation between the junction-shell thermal resistance and the junction-shell thermal resistance test value, and continuously performing steady-state thermal simulation analysis on the basis of the modified contact thermal conductivity until the difference value between the junction-shell thermal resistance and the junction-shell thermal resistance test value is within an error allowable range to obtain a junction-shell contact thermal resistance model under the corresponding contact thermal conductivity.

Optionally, performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by the preset shell-radiator thermal resistance, determining the heat dissipation coefficient, and establishing a shell-radiator thermal resistance model, including: calculating according to the relationship between the thermal resistance and the heat dissipation coefficient of the preset shell-radiator to obtain a preset heat dissipation coefficient; performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient, and determining the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip; calculating to obtain the shell-radiator thermal resistance according to the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip; and determining whether the preset heat dissipation coefficient is modified or not according to the magnitude relation between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance, and continuously performing steady-state thermal simulation analysis on the basis of the modified heat dissipation coefficient until the difference value between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance is within an error allowable range to obtain a shell-radiator thermal resistance model under the corresponding heat dissipation coefficient.

Optionally, performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model, including: performing transient thermal simulation on the device based on preset fixed power, and determining transient thermal resistance in the transient process; and determining whether to modify the density and the heat capacity in the device material parameters according to the magnitude relation between the transient heat resistance and the heat resistance test value, and continuing to perform transient heat simulation analysis based on the modified device material parameters until the difference value between the transient heat resistance and the heat resistance test value is within an error allowable range to obtain a junction-shell heat capacity model under the corresponding device material parameters.

Optionally, determining whether to modify the density and the heat capacity in the device material parameter according to the magnitude relationship between the transient thermal resistance and the thermal resistance test value includes: fitting according to the corresponding relation between the transient thermal resistance and the time to obtain a transient thermal resistance curve; and determining whether to modify the density and the heat capacity in the device material parameters according to the magnitude relation between the transient thermal resistance on the transient thermal resistance curve and the thermal resistance test value corresponding to the same time point on the thermal resistance test value curve.

A second aspect of the embodiments of the present invention provides a power device thermal resistance model building apparatus, including: the thermal resistance model building module is used for carrying out steady-state thermal simulation analysis according to preset device material parameters and preset contact thermal conductivity coefficients, determining the device material parameters and the contact thermal conductivity coefficients and building a junction-shell thermal resistance model; the heat dissipation model building module is used for carrying out steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by preset shell-radiator thermal resistance, determining the heat dissipation coefficient and building a shell-radiator thermal resistance model; the heat capacity model building module is used for carrying out transient thermal simulation analysis according to preset fixed power, determining the density and heat capacity in the material parameters of the device and building a junction-shell heat capacity model; and the device model building module is used for determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model.

A third aspect of the embodiments of the present invention provides a computer-readable storage medium, where computer instructions are stored, where the computer instructions are configured to cause a computer to execute the method for building a thermal resistance model of a power device according to any one of the first aspect and the first aspect of the embodiments of the present invention.

A fourth aspect of an embodiment of the present invention provides an electronic device, including: the power device thermal resistance model building method comprises a memory and a processor, wherein the memory and the processor are connected in communication with each other, the memory stores computer instructions, and the processor executes the computer instructions so as to execute the power device thermal resistance model building method according to any one of the first aspect and the first aspect of the embodiments of the invention.

The technical scheme provided by the invention has the following effects:

the method, the device and the storage medium for constructing the thermal resistance model of the power device provided by the embodiment of the invention are characterized in that firstly, steady-state thermal simulation analysis is carried out based on device material parameters and preset contact thermal conductivity coefficients, the device material parameters and the contact thermal conductivity coefficients are determined, a knot-shell thermal resistance model is established, then, steady-state thermal simulation analysis is carried out according to the preset heat dissipation thermal conductivity coefficients determined by the preset shell-radiator thermal resistance, the heat dissipation thermal conductivity coefficients are determined, and a shell-radiator thermal resistance model is established; performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model; and finally, determining a thermal resistance model of the power device through a junction-shell thermal resistance model, a junction-shell thermal impedance model and a shell-radiator thermal resistance model. The maximum junction temperature of the device under a specific working condition can be pre-judged by adopting the thermal resistance model of the power device for simulation calculation, so that the device is matched with reasonable heat dissipation conditions, and the research and development period is shortened.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.

FIG. 1 is a flow chart of a method for constructing a thermal resistance model of a power device according to an embodiment of the invention;

fig. 2 is a schematic diagram of the internal structure of an IGBT device;

FIG. 3 is a schematic diagram of the temperature difference of the contact surface of the IGBT device;

fig. 4 is a schematic diagram of the temperature distribution of the multilayer material in the IGBT device;

FIG. 5 is a schematic diagram of a thermal impedance equivalent thermal circuit model of an IGBT device;

FIG. 6 is a flow chart of a method for building a thermal resistance model of a power device according to another embodiment of the invention;

FIG. 7 is a schematic diagram of temperature collection points after steady state simulation in accordance with an embodiment of the present invention;

FIG. 8 is a schematic diagram of the case temperature collection points after steady state simulation according to an embodiment of the present invention;

FIG. 9 is a thermal circuit equivalent model of the thermal resistance of a medium according to an embodiment of the invention;

FIG. 10 is a schematic graph of die junction temperature over time according to an embodiment of the present invention;

FIG. 11 is a graph illustrating the calibration results of a thermal impedance model according to an embodiment of the present invention;

fig. 12 is a block diagram of a power device thermal resistance model building apparatus according to an embodiment of the present invention;

FIG. 13 is a schematic structural diagram of a computer-readable storage medium provided in accordance with an embodiment of the present invention;

fig. 14 is a schematic structural diagram of an electronic device provided in an embodiment of the present invention.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In accordance with an embodiment of the present invention, there is provided a method for constructing a thermal resistance model of a power device, it is noted that the steps illustrated in the flowchart of the drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that herein.

In this embodiment, a method for constructing a thermal resistance model of a power device is provided, which may be used in electronic devices, such as computers, mobile phones, tablet computers, and the like, fig. 1 is a flowchart of a method for constructing a thermal resistance model of a power device according to an embodiment of the present invention, and as shown in fig. 1, the method includes the following steps:

the embodiment of the invention provides a method for constructing a thermal resistance model of a power device, which comprises the following steps of:

step S101: and performing steady-state thermal simulation analysis according to the preset device material parameters and the preset contact thermal conductivity, determining the device material parameters and the contact thermal conductivity, and establishing a junction-shell thermal resistance model.

In the current power device, such as a welding type IGBT device, single-side heat dissipation is adopted, in the device illustrated in figure 2, a longitudinal heat dissipation channel of a chip comprises a packaging assembly such as a copper-clad plate, an AlN ceramic plate and the like,the multi-layer package assembly is typically connected by soldering. The heat-conducting property of the material directly determines the heat-dissipating capacity of the material, and the self thermal resistance of the material is defined as medium thermal resistance. If the thermal conductivity lambda, the cross-sectional area A and the thickness d of the dielectric material are known, the dielectric thermal resistance R of a certain packaging component_th＿mCan be expressed as:

assuming good thermal contact conduction, there is no temperature drop at the contact interface of the different package components. In fact, when a heat flow passes through the interface of two contacting solids, the interface itself exhibits a significant thermal resistance to the heat flow, called contact resistance, with R_th＿cAnd (4) showing. As shown in fig. 3, the main reason for the generation of contact resistance is that for any two seemingly well-contacted objects, the actual direct contact area is only a portion of the interface, with the remainder being the gap. The heat is transferred by the heat conduction and radiation of the gas in the gap, and the heat transfer capacity is far lower than that of the common solid material. As heat flows through the interface, the temperature suddenly decreases in the direction of heat flow. Certain conditions of the power module packaging link impair perfect thermal contact conduction, such as surface smoothness, surface roughness, oxides, embedding liquids, contact pressure, surface temperature, thermally conductive grease, and the like. Fig. 4 shows the temperature distribution in a longitudinal section from the chip to the heat sink. In fig. 4, the temperature profile of the multilayer material from the chip to the device package under perfect contact conditions is shown as curve 1. In view of the contact resistance, there will be a temperature difference across the surface of the assembly, as shown in curve 2. Thermal resistance R_thDielectric thermal resistance R_th＿mAnd contact thermal resistance R_th＿cCan be expressed as

R_th＝R_{th_m}+R_{th_c}

As shown in fig. 5, the chip-to-package junction-to-package thermal impedance can be expressed as a local network thermal circuit model containing thermal resistance and heat capacity, and factors influencing the thermal resistance include both the dielectric resistance of each layer of material and the contact resistance between materials. The medium thermal resistance model is influenced by the structural model of the device and the thermal conductivity of the material, and the contact thermal resistance is equivalent to the temperature difference of the contact surface of the model. Factors that affect the heat capacity from the chip to the package are the specific heat and mass of the materials.

Therefore, a junction-shell thermal resistance model can be established from two aspects of medium thermal resistance and contact thermal resistance during thermal simulation analysis of the power device. Specifically, the establishment process of the junction-shell thermal resistance model comprises the following steps: performing steady-state thermal simulation analysis according to preset device material parameters, determining the device material parameters, and establishing a junction-shell medium thermal resistance model; performing steady-state thermal simulation analysis according to the thermal conductivity, determining the contact thermal conductivity, and establishing a junction-shell contact thermal resistance model; and determining a junction-shell thermal resistance model according to the junction-shell medium thermal resistance model and the junction-shell contact thermal resistance model.

Step S102: and performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by the preset shell-radiator thermal resistance, determining the heat dissipation coefficient, and establishing a shell-radiator thermal resistance model. Before the shell-radiator thermal resistance model is established, whether the heat flux of a radiator shell is set in software for performing steady-state thermal simulation analysis is determined as a boundary condition, if so, the shell-radiator thermal resistance model can be established by performing the steady-state thermal simulation analysis, and if not, the junction-shell thermal resistance model can be directly established.

Step S103: and performing transient thermal simulation analysis according to preset fixed power, determining the density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model. When the junction-shell heat capacity model is established, setting a chip in a device to heat with preset fixed power, and then performing transient thermal simulation analysis, wherein the transient thermal simulation time is required to ensure that the junction temperature of the chip finally reaches a stable value; and finally, adjusting the density and the heat capacity in the device material parameters based on the change of the transient resistance in the transient thermal simulation analysis process, and establishing a final junction-shell heat capacity model.

Step S104: and determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model. Wherein, the simulation analysis process of the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model can be realized by adopting finite element analysis; all parameters of the power device can be determined through the established junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model, and therefore the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model jointly form the thermal resistance model of the power device.

The method for constructing the thermal resistance model of the power device comprises the steps of firstly performing steady-state thermal simulation analysis based on device material parameters and preset contact thermal conductivity, determining the device material parameters and the contact thermal conductivity, establishing a junction-shell thermal resistance model, then performing steady-state thermal simulation analysis according to the preset heat dissipation thermal conductivity determined by the preset shell-radiator thermal resistance, determining the heat dissipation thermal conductivity, and establishing a shell-radiator thermal resistance model; performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model; and finally, determining a thermal resistance model of the power device through a junction-shell thermal resistance model, a junction-shell thermal impedance model and a shell-radiator thermal resistance model. The maximum junction temperature of the device under a specific working condition can be pre-judged by adopting the thermal resistance model of the power device for simulation calculation, so that the device is matched with reasonable heat dissipation conditions, and the research and development period is shortened.

In one embodiment, as shown in fig. 6, the steady-state thermal simulation analysis is performed according to preset device material parameters, the device material parameters are determined, and a junction-shell medium thermal resistance model is established, including the following steps:

step S201: and performing steady-state thermal simulation analysis according to preset device material parameters to determine the highest junction temperature of the chip, the shell temperature and the heating power of the chip. Wherein, finite element software can be adopted to carry out steady-state thermal simulation analysis; before steady-state thermal simulation analysis, a three-dimensional structure model of a power device is led into software, and then device material parameters are set, wherein the parameters at least comprise three items of heat capacity, density and heat conductivity coefficient; setting the contact between different materials as ideal contact, namely, the contact thermal resistance is zero, and no temperature difference exists between contact surfaces; setting a chip in a power device to heat at a certain constant power; setting the outer surface temperature of the device envelope to a constant valueValue T_c0And after the setting is finished, performing steady-state thermal simulation analysis.

Wherein, the constant heating power adopts the formula P ═ nH_gV is calculated, in the formula, P is the chip heating power set by the steady-state thermal simulation, n is the number of chips connected in parallel, H_gThe heating power of the unit volume of the heat source set for the simulation software has the dimension of W/mm³And V is the volume of the active region (heat generating portion) of the chip.

Step S202: and calculating the medium thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip. The maximum junction temperature of the chip can be acquired in the process of steady-state thermal simulation analysis, and the shell temperature and the heating power of the chip are preset values before the steady-state thermal simulation analysis. Specifically, the steady state simulated temperature collection points are shown in FIG. 7. Therefore, the thermal resistance of the medium between the junction and the shell is calculated by the following formula:

wherein, T_jmax0Maximum junction temperature of the chip, T_c0The shell temperature was measured. It should be noted that, since the contact thermal resistance is set to zero, the thermal resistance calculated by the formula is both the dielectric thermal resistance and the device thermal resistance.

Step S203: and determining whether the preset device material parameters are modified or not according to the magnitude relation between the junction-shell medium thermal resistance and the junction-shell thermal resistance test value, and continuing to perform steady-state thermal simulation analysis on the basis of the modified device material parameters until the junction-shell medium thermal resistance is smaller than the junction-shell thermal resistance test value, so as to obtain a junction-shell medium thermal resistance model under the corresponding device material parameters.

The junction-shell thermal resistance test value can be obtained from a manual of a power device, after the medium thermal resistance is calculated by adopting the formula, the calculated medium thermal resistance is compared with the test value, if the medium thermal resistance is smaller than the test value, the material parameters of the device are set to be reasonable, and the junction-shell medium thermal resistance model is constructed. If the medium thermal resistance is larger than the test value, increasing the thermal conductivity coefficient in the material parameters of the device by q%, and continuing to perform steady-state thermal simulation, if the medium thermal resistance is larger than the test value, increasing the thermal conductivity coefficient in all the material parameters by q% again until the calculated medium thermal resistance is smaller than the test value. Specifically, the value range of q is calculated by the following formula

Wherein R is_{th(j-c)_sheet}Represents the junction-shell thermal resistance test value.

In one embodiment, as shown in fig. 6, the steady-state thermal simulation analysis is performed according to the thermal conductivity, the contact thermal conductivity is determined, and a junction-shell contact thermal resistance model is established, including the following steps:

step S301: and calculating to obtain the preset contact thermal resistance according to the junction-shell thermal resistance test value and the difference value of the medium thermal resistances between the junctions and the shells in the junction-shell medium thermal resistance model. Specifically, the junction-shell thermal resistance is composed of medium thermal resistance and contact thermal resistance, so that a contact thermal resistance set value is calculated by adopting a difference value of a junction-shell thermal resistance test value and the medium thermal resistance. Namely, the contact thermal resistance is calculated by the following formula:

R_{th(j-c)_c}＝R_{th(j-c)_sheet}-R_{th(j-c)_m}

wherein R is_{th(j-c)_c}The sum of thermal contact resistances between the packaging components in the middle of the chip and the tube shell; r_{th(j-c)_c}＝R_{th(j-c)_c1}+R_{th(j-c)_c2}+…+R_{th(j-c)_cn}；R_{th(j-c)_c1}、R_{th(j-c)_c2}、···、R_{th(j-c)_cn}Thermal contact resistance between packaging components in the middle of the chip to the shell is provided.

Step S302: and calculating to obtain the preset contact thermal conductivity according to the relation between the preset contact thermal resistance and the contact thermal conductivity. Generally, finite element simulation software does not directly set the thermal contact resistance between contact surfaces as a parameter, but sets the thermal conductivity between contact surfaces, and under the non-ideal contact condition, the thermal conductivity is calculated by the following formula:

A_all＝mnA_c

λ_tis the heat conductivity coefficient per unit area, and the unit is W/mm²℃，A_cThe area of an active area of a single chip, n is the number of chips, and m is the number of component contact surfaces on a longitudinal thermal path from the chip to the tube shell.

For convenience, the thermal conductivity of all the contact surfaces is set to the same value, and the equivalent is performed to a certain extent. And after the thermal contact resistance is calculated by adopting the formula, substituting the calculated thermal contact resistance into the formula to calculate and obtain the preset thermal contact coefficient.

Step S303: and performing steady-state thermal simulation analysis according to the preset contact thermal conductivity and device material parameters in the junction-shell medium thermal resistance model, and determining the highest junction temperature of the chip, the shell temperature and the heating power of the chip. Specifically, finite element simulation software is adopted to perform steady-state thermal simulation analysis, wherein before analysis, a preset contact thermal conductivity coefficient is set based on the calculation result, and corresponding parameters are set in the software based on the parameters of the calculated medium thermal resistance. And after parameter setting is completed, performing steady-state thermal simulation analysis.

Step S304: and calculating the thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip. The maximum junction temperature of the chip, the shell temperature, and the chip heating power may be determined in the above step S202. Meanwhile, the thermal resistance calculation formula may be calculated using the same formula as described above in step S202. Since the contact thermal resistance is not zero here, the thermal resistance calculated by this formula includes the medium thermal resistance as well as the contact thermal resistance.

Step S305: and determining whether the preset contact thermal conductivity is modified or not according to the magnitude relation between the junction-shell thermal resistance and the junction-shell thermal resistance test value, and continuously performing steady-state thermal simulation analysis on the basis of the modified contact thermal conductivity until the difference value between the junction-shell thermal resistance and the junction-shell thermal resistance test value is within an error allowable range to obtain a junction-shell medium thermal resistance model under the corresponding contact thermal conductivity.

The thermal resistance between the junction and the shell calculated here is actually the sum of the medium thermal resistance and the contact thermal resistance, so the thermal resistance should be substantially equal to the thermal resistance test value, or should meet the set error. Therefore, the testing values of the thermal resistance between the junction and the shell are compared, if the difference between the testing values of the thermal resistance between the junction and the shell and the thermal resistance between the junction and the shell is within an error allowable range, the set parameters are reasonable, the modeling of the junction-shell medium thermal resistance of the device is completed, wherein the error allowable range or the acceptable error rate k% is calculated by adopting the following formula;

wherein R is_th(j-c)1Calculated for the junction-shell thermal resistance of the device.

If the difference between the testing values of the thermal resistance between the junction and the shell and the thermal resistance between the junction and the shell is not within the allowable error range, for example, when the two relations are satisfied

And if so, indicating that the set contact thermal conductivity is larger, properly reducing the contact thermal conductivity set in the finite element simulation software, and continuing steady-state thermal simulation until the difference is within the error allowable range. When the two relations satisfy

And if so, indicating that the set contact thermal conductivity is smaller, properly increasing the contact thermal conductivity set in the finite element simulation software, and continuing steady-state thermal simulation until the difference is within the error allowable range.

In one embodiment, the steady-state thermal simulation analysis is performed according to a preset heat dissipation coefficient determined by a preset shell-radiator thermal resistance, the heat dissipation coefficient is determined, and a shell-radiator thermal resistance model is established, including the following steps:

step S401: and calculating according to the relationship between the thermal resistance of the preset shell and the radiator and the heat dissipation coefficient to obtain the preset heat dissipation coefficient. In order to establish a shell-radiator thermal resistance model, the heat dissipation coefficient required by software needs to be determined before steady-state thermal simulation analysis. Specifically, the heat dissipation coefficient is calculated by the following formula:

wherein A is_c-sIs the area of the contact surface between the device tube shell and the radiator, lambda_c－sFor heat dissipation coefficient, R_{th(c-s)_sheet}Represents a preset case-to-heatsink thermal resistance that can be queried from the device manual. Therefore, the preset heat dissipation coefficient can be calculated through the formula.

Step S402: and performing steady-state thermal simulation analysis according to the preset heat dissipation coefficient, and determining the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip. Before steady-state thermal simulation analysis, a preset heat dissipation coefficient is set based on the calculation result, and the temperature of the radiator is set to be constant T_s(ii) a And setting corresponding parameters in the software based on the parameters for calculating the medium thermal resistance. And after parameter setting is completed, performing steady-state thermal simulation analysis.

Step S403: and calculating to obtain the shell-radiator thermal resistance according to the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip. Specifically, the case-radiator thermal resistance is calculated using the following formula,

T_cmaxrepresenting the highest junction temperature, R, of the envelope_th(c-s)1Representing the case-heat sink thermal resistance. Wherein, the case temperature collection points after the steady state simulation are shown in FIG. 8.

Step S404: and determining whether the preset heat dissipation coefficient is modified or not according to the magnitude relation between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance, and continuously performing steady-state thermal simulation analysis on the basis of the modified heat dissipation coefficient until the difference value between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance is within an error allowable range to obtain a shell-radiator thermal resistance model under the corresponding heat dissipation coefficient.

The calculated thermal resistance of the shell-radiator is actually obtained by simulation calculation of the thermal resistance of the preset shell-radiator, so that the thermal resistance is basically equal to the thermal resistance of the preset shell-radiator, or the set error is met. Therefore, the shell-radiator thermal resistance is compared with the preset shell-radiator thermal resistance, if the difference between the two is within an error allowable range, the set parameters are reasonable, and the shell-radiator thermal resistance model is completed, wherein the error allowable range or the acceptable error rate h% is calculated by adopting the following formula;

if the difference between the thermal resistance of the shell-radiator and the thermal resistance of the preset shell-radiator is not within the allowable error range, for example, when the two relations satisfy

And if so, indicating that the set heat dissipation coefficient is larger, properly reducing the heat dissipation coefficient set in the finite element simulation software, and continuing steady-state thermal simulation until the difference value is within the error allowable range. When the two relation satisfies

And if so, indicating that the set heat dissipation coefficient is smaller, properly increasing the heat dissipation coefficient set in the finite element simulation software, and continuing steady-state thermal simulation until the difference value is within the error allowable range.

Among them, the following are mentioned. Before establishing a shell-radiator thermal resistance model, determining whether a radiator shell heat flux is set in finite element simulation analysis software as a boundary condition, if so, establishing the shell-radiator thermal resistance model, and then establishing a junction-shell thermal resistance model; or, the building of the junction-shell heat capacity model can be performed first, and then the building of the shell-radiator heat resistance model can be performed. If the heat flux of the pipe shell of the radiator is not set as a boundary condition, the building of the junction-shell heat capacity model can be directly carried out.

In one embodiment, as shown in fig. 6, the transient thermal simulation analysis is performed according to the preset fixed power, the density and the heat capacity in the device material parameters are determined, and the junction-shell heat capacity model is established, including the following steps:

step S501: transient thermal simulation is carried out on the device based on preset fixed power, and transient thermal resistance in the transient process is determined. When transient thermal simulation analysis is carried out, transient simulation time is required to ensure that the junction temperature of the chip finally reaches a stable value. The other heat source boundary parameter settings are the same as the parameter settings in the above step. Further, the device initial temperature was set to Tc. Specifically, the transient thermal resistance is calculated using the following formula:

wherein, T_jThe highest junction temperature of the chip at a certain moment.

Step S502: and determining whether to modify the density and the heat capacity in the device material parameters according to the magnitude relation between the transient heat resistance and the heat resistance test value, and continuously performing transient thermal simulation analysis based on the modified device material parameters until the difference value between the transient heat resistance and the heat resistance test value is within an error allowable range to obtain a junction-shell heat capacity model under the corresponding device material parameters.

Specifically, since the calculated transient resistance is an instantaneous value, in order to more accurately compare the transient resistance with the thermal resistance test value, a transient thermal resistance curve can be obtained by fitting according to the corresponding relationship between the transient thermal resistance and time; meanwhile, a thermal resistance test value curve can be obtained according to a device manual. And then, respectively selecting resistance values corresponding to the same time points on the two curves to compare and determine whether to modify the density and the heat capacity in the device material parameters.

During comparison, if the difference between the two is within an error allowable range, setting parameters to be reasonable, and completing modeling of the knot-shell heat capacity model, wherein the error allowable range or the acceptable error rate g% is calculated by adopting the following formula;

wherein R is_{th(j-c)_flow_y}Representing the transient resistance, Z_{th(j-c)_sheet_y}Represents the thermal resistance test value.

If the difference between the two is not within the allowable error range, or the difference range is Z_min≤R_{th(j-c)_flow_y}-Z_{th(j-c)_sheet_y}≤Z_maxWhen, if Z is_max>g％*Z_{th(j-c)_sheet_y}If the calculated thermal resistance is larger, the density or the heat capacity of the material in the simulation software should be properly increased; if Z is_min<-g％*Z_{th(j-c)_sheet_y}If the calculated thermal resistance is small, the density or thermal capacity of the material in the simulation software should be properly reduced. And after modification, performing transient thermal simulation and comparison of the transient thermal resistance and the thermal resistance test value again until the difference value of the transient thermal resistance and the thermal resistance test value is within an error allowable range.

In one embodiment, a method for constructing a thermal resistance model of the power device is described by specific parameters; the parameters which can be set by the existing common finite element simulation software are the heat conductivity coefficient of component materials and the heat conductivity coefficient of contact surfaces, and the thermal resistance of a module can not be directly set. Therefore, the appropriate thermal conductivity between the material and the contact surface needs to be set according to thermal resistance data in a device manual or a thermal resistance value measured by experiments, so that the heat dissipation capacity in the simulation process conforms to the actual situation.

Thus, the method comprises: and a first step of building a junction-shell medium thermal resistance model. FIG. 9 is a series model of dielectric thermal resistances, in which the thermal conductivity, area, and thickness of each layer of material are respectively substituted into a dielectric thermal resistance calculation formula to roughly calculate the dielectric thermal resistance of each layer on a single chip channel to be about DBC copper clad layer dielectric thermal resistance R_{th(j-c)_m1}The thermal resistance R of the ceramic layer is 0.0039K/W, DBC_{th(j-c)_m2}Is 0.0159K/W, DBC of an underlying copper layer R_{th(j-c)_m3}Dielectric thermal resistance of 0.0039K/W and substrate dielectric thermal resistance R_{th(j-c)_m4}Is 0.0795K/W.

Setting ideal contact among all contact surfaces, wherein no temperature difference exists among the contact surfaces; set the chip interior to H_g＝3.7W/mm³The heating value of (2) continuously heats; setting the outer surface temperature of the device tube shell to be constant T_c0The device initial temperature was 50 ℃ at 50 ℃, and a steady state thermal distribution simulation was performed. Obtaining the highest junction temperature T of the chip surface_jmax67.95 deg.C, and the volume of active region V is 49.29mm³The number of parallel chips is n-24, and the medium thermal resistance is calculated by substituting the formula to be about R_{th(j-c)_m}0.0041K/W. The device junction-shell thermal resistance given by the device handbook is R_{th(j-c)_sheet}0.0085K/W. And the medium thermal resistance obtained by simulation calculation is smaller than the manual value, the medium thermal resistance modeling requirement is met, and the modeling of the knot-shell medium thermal resistance model is completed.

And secondly, building a junction-shell contact thermal resistance model. Calculating to obtain junction-shell contact thermal resistance R according to a difference calculation formula of the medium thermal resistance and the junction-shell thermal resistance test value_{th(j-c)_c}＝R_{th(j-c)_sheet}-R_{th(j-c)_m}0.0085K/W-0.0041K/W-0.0044K/W. The active area of a single chip in the device shown in fig. 2 is 102.03mm²The number of contact surfaces from the chip to the package is m 4, and the coefficient of thermal conductivity of the contact surfaces is calculated to be 0.400W/mm ℃.

Set the chip interior to H_g＝3.7W/mm³The heating value of (2) continuously heats; setting the outer surface temperature of the device tube shell to be constant T_c0The device initial temperature was 50 ℃ at 50 ℃, and a steady state thermal distribution simulation was performed. By the initial setting and fine adjustment of the contact thermal resistance, the junction temperatures of the chips are not completely consistent, and the balance is finally achieved at the temperature of 82.5-87.8 ℃. The highest junction temperature of the chip is brought into the temperature range which can obtain the thermal resistance R of the device_th(j－c)10.0086K/W, and the junction-shell thermal resistance test value of the device is R_{th(j－c)＿sheet}0.0085K/W, the two are considered approximately equal. So far, the material parameters set by the junction-shell contact thermal resistance model are reasonable, and the junction-shell thermal resistance value of the model is consistent with the manualAnd the heat dissipation from the chip to the shell in the simulation model is consistent with the actual condition, and the modeling of the junction-shell contact thermal resistance model is completed.

And thirdly, establishing a shell-radiator thermal resistance model. Since there is no package assembly between the tube and the heat sink, R_th(c-s)All are contact thermal resistances. Through measurement and calculation, the contact area A of the device tube shell and the radiator_c-sIs 25358.6mm²Thermal resistance R of case-radiator given in handbook_{th(c-s)_sheet}Taking the calculation formula of the heat dissipation coefficient into the equation of 0.009K/W, the heat conductivity coefficient lambda of the contact surface between the shell and the heat sink can be obtained_c-sIs 0.0043W/mm²K。

Setting simulation conditions as unit time of chip active region H_gc＝1.9322W/mm³Continuously generating heat and setting the temperature T of the radiator_sConstant at 50 deg.C, and the highest temperature T of the contact surface between the device tube and the heat sink after heat balance_cmaxThe temperature was 62.263 ℃. The volume V of the active area of the chip is 49.29mm when the number of the chips n is 24³R can be obtained by substituting into shell-radiator thermal resistance calculation formula_th(c-s)10.0054K/W, which is significantly different from the manual value of 0.009K/W.

The thermal resistance of the shell-radiator is obtained by the first simulation and is 0.0054W/mm³And manual value 0.009W/mm²K has a large difference, which indicates the heat dissipation coefficient lambda_c－sThe arrangement is not reasonable. In fact, the heat dissipation amount at different positions on the surface of the device package is not consistent, and it can be understood that the effective heat dissipation area of the device is smaller than the actual area, so the formula is followed

Calculating the heat conductivity coefficient lambda between the device tube shell and the heat sink_c－sCorrected to 0.005W/mm²K, the steady state simulation verification is performed again. After thermal equilibrium, the maximum temperature of the device package to heat sink interface is 72.073 ℃. The volume V of the active area of the chip is 49.29mm when the number of the chips n is 24³R is obtained by substituting into the formula_th(c-s)1The thermal resistance is 0.0094K/W, and meets the error allowable range with the manual value, and the modeling of the shell-radiator thermal resistance model is completed.

And fourthly, building a knot-shell heat capacity model.Setting the heating power H of unit volume of IGBT chip_gIs 3.7W/mm³And the duration is 5 s. The time setting is referenced to the thermal impedance versus time curve given in the data sheet. Generally, the thermal impedance change tends to be stable after the chip continuously generates heat for 5s, that is, the heat generation and the heat dissipation of the chip reach balance. The number of chips n is 24, the volume of the active area of the chip V is 49.29mm³Setting the shell temperature T_cThe constant temperature was 50 ℃, the junction temperature was initially 50 ℃, and the junction temperature was varied with time as shown in fig. 10.

According to the IEC60747 standard or the GB/T29332 standard, the thermal resistance R at a certain moment in the transient process can be calculated point by point through a transient thermal resistance calculation formula according to the temperature rise curve of the chip obtained through simulation in the graph 10_{th(j－c)＿flow}And further calculating the thermal resistance of the simulation model. The thermal resistance is determined by the heat capacity and mass of the device material. Since the three-dimensional structure of the device is fixed, the thermal resistance is determined by the heat capacity and density of the material. If the fitting effect of the thermal resistance curve is not good, the heat capacity and the density of the material need to be modified, and the thermal resistance parameters of the model are finally adjusted to the allowable error range. The thermal impedance adjustment results of the simulation model are shown in fig. 11. In the simulation, the two are considered to be approximately equal, and the modeling is completed. It should be noted that the material parameters affecting the thermal resistance are relatively independent from the material parameters affecting the thermal resistance, and modifying the heat capacity and density of the material does not affect the completed thermal resistance model.

The embodiment of the present invention further provides a power device thermal resistance model building apparatus, as shown in fig. 12, the apparatus includes:

the thermal resistance model building module is used for carrying out steady-state thermal simulation analysis according to preset device material parameters and preset contact thermal conductivity coefficients, determining the device material parameters and the contact thermal conductivity coefficients and building a junction-shell thermal resistance model; for details, reference is made to the corresponding parts of the above method embodiments, which are not described herein again.

The heat dissipation model building module is used for carrying out steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by preset shell-radiator thermal resistance, determining the heat dissipation coefficient and building a shell-radiator thermal resistance model; for details, reference is made to the corresponding parts of the above method embodiments, which are not described herein again.

The heat capacity model building module is used for carrying out transient thermal simulation analysis according to preset fixed power, determining the density and heat capacity in device material parameters and building a junction-shell heat capacity model; for details, reference is made to the corresponding parts of the above method embodiments, which are not described herein again.

And the device model building module is used for determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model. For details, reference is made to the corresponding parts of the above method embodiments, which are not described herein again.

The device for constructing the thermal resistance model of the power device provided by the embodiment of the invention comprises the following steps of firstly, performing steady-state thermal simulation analysis based on device material parameters and preset contact thermal conductivity, determining the device material parameters and the contact thermal conductivity, establishing a junction-shell thermal resistance model, then performing steady-state thermal simulation analysis according to the preset heat dissipation thermal conductivity determined by the preset shell-radiator thermal resistance, determining the heat dissipation thermal conductivity, and establishing a shell-radiator thermal resistance model; performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model; and finally, determining a thermal resistance model of the power device through a junction-shell thermal resistance model, a junction-shell thermal impedance model and a shell-radiator thermal resistance model. The maximum junction temperature of the device under a specific working condition can be pre-judged by adopting the thermal resistance model of the power device for simulation calculation, so that the device is matched with reasonable heat dissipation conditions, and the research and development period is shortened.

The functional description of the power device thermal resistance model construction device provided by the embodiment of the invention refers to the description of the power device thermal resistance model construction method in the above embodiment in detail.

An embodiment of the present invention further provides a storage medium, as shown in fig. 13, on which a computer program 601 is stored, where the instructions, when executed by a processor, implement the steps of the method for constructing a thermal resistance model of a power device in the foregoing embodiments. The storage medium is also stored with audio and video stream data, characteristic frame data, an interactive request signaling, encrypted data, preset data size and the like. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD) or a Solid State Drive (SSD), etc.; the storage medium may also comprise a combination of memories of the kind described above.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD), a Solid State Drive (SSD), or the like; the storage medium may also comprise a combination of memories of the kind described above.

An embodiment of the present invention further provides an electronic device, as shown in fig. 14, the electronic device may include a processor 51 and a memory 52, where the processor 51 and the memory 52 may be connected by a bus or in another manner, and fig. 14 takes the connection by the bus as an example.

The processor 51 may be a Central Processing Unit (CPU). The Processor 51 may also be other general purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, or any combination thereof.

The memory 52, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the corresponding program instructions/modules in the embodiments of the present invention. The processor 51 executes various functional applications and data processing of the processor by running non-transitory software programs, instructions and modules stored in the memory 52, that is, implements the method for constructing the thermal resistance model of the power device in the above method embodiment.

The memory 52 may include a storage program area and a storage data area, wherein the storage program area may store an operating device, an application program required for at least one function; the storage data area may store data created by the processor 51, and the like. Further, the memory 52 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 52 may optionally include memory located remotely from the processor 51, and these remote memories may be connected to the processor 51 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The one or more modules are stored in the memory 52 and, when executed by the processor 51, perform a power device thermal resistance model construction method as in the embodiment of fig. 1-11.

The specific details of the electronic device may be understood by referring to the corresponding descriptions and effects in the embodiments shown in fig. 1 to fig. 11, which are not described herein again.

Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.

Claims (10)

1. A method for constructing a thermal resistance model of a power device is characterized by comprising the following steps:

performing steady-state thermal simulation analysis according to preset device material parameters and preset contact thermal conductivity coefficients, determining the device material parameters and the contact thermal conductivity coefficients, and establishing a junction-shell thermal resistance model;

performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by preset shell-radiator thermal resistance, determining the heat dissipation coefficient, and establishing a shell-radiator thermal resistance model;

performing transient thermal simulation analysis according to preset fixed power, determining density and heat capacity in device material parameters, and establishing a junction-shell heat capacity model;

and determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model.

2. The method for constructing the thermal resistance model of the power device according to claim 1, wherein steady-state thermal simulation analysis is performed according to preset device material parameters and thermal conductivity coefficients, the device material parameters and the thermal conductivity coefficients are determined, and a junction-shell thermal resistance model is established, comprising:

performing steady-state thermal simulation analysis according to preset device material parameters, determining the device material parameters, and establishing a junction-shell medium thermal resistance model;

performing steady-state thermal simulation analysis according to the thermal conductivity, determining the contact thermal conductivity, and establishing a junction-shell contact thermal resistance model;

and determining a junction-shell thermal resistance model according to the junction-shell medium thermal resistance model and the junction-shell contact thermal resistance model.

3. The method for constructing the thermal resistance model of the power device as claimed in claim 2, wherein the steady state thermal simulation analysis is performed according to the preset device material parameters, the device material parameters are determined, and the junction-shell dielectric thermal resistance model is established, comprising:

performing steady-state thermal simulation analysis according to preset device material parameters to determine the highest junction temperature of the chip, the shell temperature and the heating power of the chip;

calculating the medium thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip;

and determining whether the preset device material parameters are modified or not according to the magnitude relation between the junction-shell medium thermal resistance and the junction-shell thermal resistance test value, and continuing to perform steady-state thermal simulation analysis on the basis of the modified device material parameters until the junction-shell medium thermal resistance is smaller than the junction-shell thermal resistance test value, so as to obtain a junction-shell medium thermal resistance model under the corresponding device material parameters.

4. The method for constructing the thermal resistance model of the power device according to claim 2, wherein the steady-state thermal simulation analysis is performed according to the thermal conductivity, the contact thermal conductivity is determined, and the junction-shell contact thermal resistance model is established, and comprises the following steps:

calculating to obtain preset contact thermal resistance according to the junction-shell thermal resistance test value and the difference value of the medium thermal resistance between the junction and the shell in the junction-shell medium thermal resistance model;

calculating to obtain a preset contact thermal conductivity according to the relation between the preset contact thermal resistance and the contact thermal conductivity;

performing steady-state thermal simulation analysis according to the preset contact thermal conductivity and device material parameters in the junction-shell medium thermal resistance model, and determining the highest junction temperature of the chip, the shell temperature and the heating power of the chip;

calculating the thermal resistance between the junction and the shell according to the highest junction temperature of the chip, the shell temperature and the heating power of the chip;

and determining whether the preset contact thermal conductivity is modified or not according to the magnitude relation between the junction-shell thermal resistance and the junction-shell thermal resistance test value, and continuously performing steady-state thermal simulation analysis on the basis of the modified contact thermal conductivity until the difference value between the junction-shell thermal resistance and the junction-shell thermal resistance test value is within an error allowable range to obtain a junction-shell contact thermal resistance model under the corresponding contact thermal conductivity.

5. The method for constructing the thermal resistance model of the power device according to claim 1, wherein the steady-state thermal simulation analysis is performed according to a preset heat dissipation coefficient determined by a preset shell-radiator thermal resistance, the heat dissipation coefficient is determined, and the shell-radiator thermal resistance model is established, including:

calculating according to the relationship between the thermal resistance and the heat dissipation coefficient of the preset shell-radiator to obtain a preset heat dissipation coefficient;

performing steady-state thermal simulation analysis according to a preset heat dissipation coefficient, and determining the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip;

calculating to obtain the shell-radiator thermal resistance according to the highest junction temperature of the tube shell, the temperature of the radiator and the heating power of the chip;

and determining whether the preset heat dissipation coefficient is modified or not according to the magnitude relation between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance, and continuously performing steady-state thermal simulation analysis on the basis of the modified heat dissipation coefficient until the difference value between the shell-radiator thermal resistance and the preset shell-radiator thermal resistance is within an error allowable range to obtain a shell-radiator thermal resistance model under the corresponding heat dissipation coefficient.

6. The method for constructing the thermal resistance model of the power device according to claim 1, wherein transient thermal simulation analysis is performed according to preset fixed power, density and heat capacity in device material parameters are determined, and a junction-shell heat capacity model is established, and comprises the following steps:

performing transient thermal simulation on the device based on preset fixed power, and determining transient thermal resistance in a transient process;

and determining whether to modify the density and the heat capacity in the device material parameters according to the magnitude relation between the transient heat resistance and the heat resistance test value, and continuing to perform transient heat simulation analysis based on the modified device material parameters until the difference value between the transient heat resistance and the heat resistance test value is within an error allowable range to obtain a junction-shell heat capacity model under the corresponding device material parameters.

7. The method for constructing the thermal resistance model of the power device according to claim 6, wherein determining whether to modify the density and the heat capacity in the device material parameters according to the magnitude relation between the transient thermal resistance and the thermal resistance test value comprises:

fitting according to the corresponding relation between the transient thermal resistance and the time to obtain a transient thermal resistance curve;

and determining whether to modify the density and the heat capacity in the parameters of the device material according to the magnitude relation between the transient thermal resistance on the transient thermal resistance curve and the thermal resistance test value corresponding to the same time point on the thermal resistance test value curve.

8. A thermal resistance model building device for a power device is characterized by comprising the following components:

the thermal resistance model building module is used for carrying out steady-state thermal simulation analysis according to preset device material parameters and preset contact heat conductivity coefficients, determining the device material parameters and the contact heat conductivity coefficients and building a junction-shell thermal resistance model;

the heat dissipation model building module is used for carrying out steady-state thermal simulation analysis according to a preset heat dissipation coefficient determined by preset shell-radiator thermal resistance, determining the heat dissipation coefficient and building a shell-radiator thermal resistance model;

the heat capacity model building module is used for carrying out transient thermal simulation analysis according to preset fixed power, determining the density and heat capacity in device material parameters and building a junction-shell heat capacity model;

and the device model building module is used for determining a thermal resistance model of the power device according to the junction-shell thermal resistance model, the junction-shell thermal impedance model and the shell-radiator thermal resistance model.

9. A computer-readable storage medium storing computer instructions for causing a computer to execute the power device thermal resistance model building method according to any one of claims 1 to 7.

10. An electronic device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to perform the method for constructing a thermal resistance model of a power device according to any one of claims 1 to 7.

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