CN116681031A - Heat dissipation mode determining method and device, storage medium and electronic equipment - Google Patents

Abstract

A heat dissipation mode determining method, a heat dissipation mode determining device, a storage medium and electronic equipment are disclosed. The method comprises the following steps: determining a first predicted temperature difference between a chip setting area corresponding to a target chip on the circuit board and a chipless area on the circuit board based on a thermal conductivity coefficient of the circuit board and a target size and target power of the target chip included in the circuit board; determining a second predicted temperature difference between a chipless region on the circuit board and an environment in which the circuit board is located; determining a third predicted temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located based on the first predicted temperature difference and the second predicted temperature difference; determining a simulated heat dissipation parameter based on the third predicted temperature difference; taking the circuit board as a simulation object, and simulating the target chip based on the simulation heat dissipation parameters to obtain a simulation junction temperature corresponding to the target chip; and determining a heat dissipation mode of the circuit board based on the simulated junction temperature and the preset junction temperature. The heat dissipation method of the circuit board can be reasonably determined so as to effectively realize heat dissipation of the chip.

Description

Heat dissipation mode determining method and device, storage medium and electronic equipment

Technical Field

The disclosure relates to chip technology, and in particular relates to a method and a device for determining a heat dissipation mode, a storage medium and electronic equipment.

Background

In general, a circuit board may include a plurality of chips, and if heat is concentrated at the chips and the temperature is too high, normal operation of the circuit board and thus the electronic device in which the circuit board is located may be adversely affected. Therefore, how to achieve heat dissipation of the chip is a concern for those skilled in the art.

Disclosure of Invention

The present disclosure is presented for achieving heat dissipation of a chip. The embodiment of the disclosure provides a heat dissipation mode determining method, a heat dissipation mode determining device, a storage medium and electronic equipment.

According to an aspect of the embodiments of the present disclosure, there is provided a heat dissipation manner determining method, including:

determining a first predicted temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board based on a thermal conductivity coefficient of the circuit board and a target size and target power of the target chip included in the circuit board;

determining a second predicted temperature difference between a chipless region on the circuit board and an environment in which the circuit board is located;

Determining a third predicted temperature difference between a chip setting area corresponding to the target chip and the environment where the circuit board is located based on the first predicted temperature difference and the second predicted temperature difference;

determining simulated heat dissipation parameters associated with the target chip based on the third predicted temperature difference;

taking the circuit board as a simulation object, and simulating the target chip based on the simulation heat dissipation parameters to obtain a simulation junction temperature corresponding to the target chip;

and determining a heat dissipation mode of the circuit board based on the simulated junction temperature and the preset junction temperature corresponding to the target chip.

According to another aspect of the embodiments of the present disclosure, there is provided a heat dissipation manner determining apparatus, including:

a first determining module, configured to determine a first predicted temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board, based on a thermal conductivity coefficient of the circuit board, and a target size and a target power of the target chip included in the circuit board;

a second determining module, configured to determine a second predicted temperature difference between a chipless region on the circuit board and an environment in which the circuit board is located;

A third determining module, configured to determine a third predicted temperature difference between a chip setting area corresponding to the target chip and an environment where the circuit board is located, based on the first predicted temperature difference determined by the first determining module and the second predicted temperature difference determined by the second determining module;

a fourth determining module, configured to determine a simulated heat dissipation parameter associated with the target chip based on the third predicted temperature difference determined by the third determining module;

the simulation module is used for simulating the target chip based on the simulated heat dissipation parameters determined by the fourth determination module by taking the circuit board as a simulation object to obtain a simulated junction temperature corresponding to the target chip;

and a fifth determining module, configured to determine a heat dissipation mode of the circuit board based on the simulated junction temperature obtained by the simulation module and a preset junction temperature corresponding to the target chip.

According to still another aspect of the embodiments of the present disclosure, there is provided a computer-readable storage medium storing a computer program for executing the above-described heat radiation pattern determination method.

According to still another aspect of the embodiments of the present disclosure, there is provided an electronic device including:

A processor;

a memory for storing the processor-executable instructions;

the processor is used for reading the executable instructions from the memory and executing the instructions to realize the heat dissipation mode determining method.

According to yet another aspect of the disclosed embodiments, a computer program product is provided, which when executed by a processor, performs the above-described heat dissipation manner determination method.

Based on the method, the device, the storage medium, the electronic device and the product for determining the heat dissipation mode provided by the embodiment of the disclosure, a first prediction temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board and a second prediction temperature difference between the chipless area on the circuit board and an environment where the circuit board is located can be combined, and a third prediction temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located is determined. Under the condition of knowing the third predicted temperature difference, through the introduction of a computer simulation technology, a dynamic experiment can be carried out on a model of the circuit board, and then the heat dissipation mode of the circuit board can be reasonably determined by combining with the preset junction temperature, for example, determining which chips in the circuit board need to be provided with heat dissipation bosses, what size, what material heat dissipation bosses and the like, and through the application of the determined heat dissipation mode, the heat dissipation of the chips can be effectively realized, so that the normal operation of the circuit board and even the electronic equipment where the circuit board is located is ensured.

The technical scheme of the present disclosure is described in further detail below through the accompanying drawings and examples.

Drawings

Fig. 1 is a flowchart illustrating a heat dissipation method determining method according to an exemplary embodiment of the present disclosure.

FIG. 2 is a flow diagram of a manner in which a first predicted temperature difference is determined in an exemplary embodiment of the present disclosure.

FIG. 3 is a flow chart of a manner in which a target temperature difference change coefficient is determined in an exemplary embodiment of the present disclosure.

FIG. 4 is a flow diagram of a manner in which a first predicted temperature difference is determined in another exemplary embodiment of the present disclosure.

FIG. 5 is a flow chart of a manner in which a temperature difference calculation safety factor is determined in an exemplary embodiment of the present disclosure.

FIG. 6 is a flow diagram of a manner in which a second predicted temperature difference is determined in an exemplary embodiment of the present disclosure.

FIG. 7 is a flow chart of a manner in which simulated heat dissipation parameters are determined in an exemplary embodiment of the present disclosure.

Fig. 8 is a flowchart of a method for determining a heat dissipation mode according to another exemplary embodiment of the present disclosure.

Fig. 9 is a schematic structural view of a heat dissipation mode determining device according to an exemplary embodiment of the present disclosure.

Fig. 10 is a schematic structural view of a first determination module in an exemplary embodiment of the present disclosure.

Fig. 11 is a schematic structural view of a third determination sub-module in an exemplary embodiment of the present disclosure.

Fig. 12 is a schematic diagram of a structure of an adjustment sub-module in an exemplary embodiment of the present disclosure.

Fig. 13 is a schematic structural view of a second determination module in an exemplary embodiment of the present disclosure.

Fig. 14 is a schematic structural view of a fourth determination module in an exemplary embodiment of the present disclosure.

Fig. 15 is a block diagram of an electronic device provided in an exemplary embodiment of the present disclosure.

Detailed Description

For the purpose of illustrating the present disclosure, exemplary embodiments of the present disclosure will be described in detail below with reference to the drawings, it being apparent that the described embodiments are only some, but not all embodiments of the present disclosure, and it is to be understood that the present disclosure is not limited by the exemplary embodiments.

It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present disclosure unless it is specifically stated otherwise.

Summary of the application

The circuit board may include a plurality of chips, for example, the circuit board in a domain controller of a vehicle may include a plurality of artificial intelligence (Artificial Intelligence, AI) chips.

At present, the power consumption of the chip gradually rises, a large amount of heat is generated in the working process of the chip, and if the heat is accumulated, the temperature of the chip is too high, so that the normal working of the circuit board and even the electronic equipment where the circuit board is located can be adversely affected. Therefore, certain measures are necessary to be taken to realize heat dissipation of the chip so as to effectively ensure normal operation of the circuit board and even the electronic equipment where the circuit board is located.

Exemplary System

The exemplary method section below relates to the use of computer simulation techniques (Computer Simulation Technology, CST) that are briefly described herein in order to facilitate an understanding of the exemplary method section below.

It can be appreciated that the computer simulation technology is a comprehensive technology that utilizes the results of computer science and technology to build a model of a system to be simulated and to perform dynamic experiments on the model under certain experimental conditions, and has the advantages of high efficiency, safety, less constraint by environmental conditions, and the like, and has become an important tool for analyzing, designing, running, evaluating, and training systems (especially complex systems).

Alternatively, the computer simulation technique may include a computer fluid dynamics (Computational Fluid Dynamics, CFD) simulation technique.

It will be appreciated that CFD simulation techniques are equivalent to "virtually" experiments performed on a computer, using numerical solutions to differential equations for controlling fluid flow, to derive the discrete distribution of the flow field of the fluid flow over a continuous region, thereby approximating the actual fluid flow conditions.

Exemplary method

Fig. 1 is a flowchart illustrating a heat dissipation method determining method according to an exemplary embodiment of the present disclosure. The method shown in fig. 1 may include step 110, step 120, step 130, step 140, step 150, and step 160, each of which is described below.

Step 110, determining a first predicted temperature difference between a chip set area corresponding to a target chip on the circuit board and a chipless area on the circuit board based on the thermal conductivity of the circuit board and the target size and target power of the target chip included in the circuit board.

Alternatively, the circuit board may be located in a domain controller of the vehicle, or in other electronic systems of the vehicle in addition to the domain controller. Of course, the circuit board may also be located in other devices besides vehicles.

Optionally, the thermal conductivity of the circuit board may include: the normal thermal conductivity of the circuit board and the horizontal thermal conductivity of the circuit board may include: the thermal conductivity of the circuit board in the horizontal X direction and the thermal conductivity of the circuit board in the horizontal Y direction. If the circuit board is placed horizontally as a whole, the normal direction of the circuit board may be the direction of gravity.

In general, to simplify the calculation, the thermal conductivity of the circuit board in the horizontal X direction and the thermal conductivity of the circuit board in the horizontal Y direction can be considered to be the same. Then, it is assumed that the thermal conductivity of the circuit board in the horizontal X direction is denoted as lambda _x The thermal conductivity of the circuit board in the horizontal Y direction is denoted as lambda _y The horizontal thermal conductivity of the circuit board is denoted as lambda _xy Then there may be:

λ _xy ＝λ _x ＝λ _y

in addition, the normal thermal conductivity of the circuit board may be expressed as λ _z 。

Optionally, the circuit board may include: a substrate and a plurality of chips disposed on the substrate; wherein the substrate may be a printed circuit board (PriRted Circuit Board, PCB); any of the plurality of chips may be the target chip.

Optionally, the target size of the target chip may include: the length dimension and width dimension of the target chip; wherein the length dimension may be denoted as L1 and the width dimension may be denoted as L2. Of course, the target size of the target chip is not limited thereto, and may include, for example, a thickness size and the like, which are not listed here.

Alternatively, the target power of the target chip may also be referred to as the thermal power consumption of the target chip, and the target power of the target chip may be denoted as P.

It should be noted that, the chip setting area corresponding to the target chip on the circuit board may refer to: the area on the circuit board, which is provided with the target chip, namely the area covered by the target chip; the chipless area on the circuit board may refer to: the area of the circuit board where no chip is disposed.

The thermal conductivity of the circuit board, and the target size and target power of the target chip may be referenced by theoretical calculation to estimate the temperature difference between the area on the circuit board where the target chip is disposed and the chipless area on the circuit board, and the estimated temperature difference may be used as the first predicted temperature difference in step 110.

Step 120, determining a second predicted temperature difference between the chipless region on the circuit board and the environment in which the circuit board is located.

Alternatively, the temperature difference between the chipless area on the circuit board and the environment in which the circuit board is located may be estimated manually and empirically, and the estimated temperature difference may be used as the second predicted temperature difference in step 120; alternatively, the temperature difference between the chipless area on the circuit board and the environment in which the circuit board is located may be estimated with reference to the chip arrangement situation on the circuit board, and the estimated temperature difference may be used as the second predicted temperature difference in step 120.

And 130, determining a third predicted temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located based on the first predicted temperature difference and the second predicted temperature difference.

Alternatively, the first predicted temperature difference and the second predicted temperature difference may be directly summed, and the obtained summation result may be used as a third predicted temperature difference between the chip setting area corresponding to the target chip and the environment in which the circuit board is located. Thus, assuming that the first predicted temperature difference is denoted as Δt1, the second predicted temperature difference is denoted as Δt2, the third predicted temperature difference is denoted as Δt3, the third predicted temperature difference can be calculated using the following formula:

ΔT3＝ΔT1+ΔT2

Of course, the determination manner of the third predicted temperature difference is not limited to this, for example, if the second predicted temperature difference is a temperature difference estimated manually and empirically, the second predicted temperature difference may be corrected in a certain manner according to the actual application scenario of the circuit board to obtain a corrected temperature difference, and then the first predicted temperature difference and the corrected temperature difference are summed, and the obtained sum result is used as the third predicted temperature difference.

Step 140, determining a simulated heat dissipation parameter associated with the target chip based on the third predicted temperature difference.

In order to strengthen the heat dissipation of the chip, a heat dissipation boss can be arranged for the chip so as to conduct the heat generated by the chip through the heat dissipation boss; wherein the heat dissipating boss includes, but is not limited to, copper boss, aluminum boss, etc. However, the heat dissipation boss is too many, which significantly increases the production cost and difficulty, so it is necessary to distinguish whether different chips are necessary to be provided with the heat dissipation boss.

In view of this, referring to the third predicted temperature difference, it may be determined whether it is necessary to verify the rationality of setting the heat radiation boss for the target chip, so as to determine the corresponding heat radiation characteristic value for the target chip accordingly. If the rationality of the heat radiation boss is required to be verified for the target chip, the first preset characteristic value for representing the heat radiation boss is determined as the heat radiation characteristic value corresponding to the target chip. If the rationality of the heat radiation boss is not required to be verified for the target chip, the second preset characteristic value for representing that the heat radiation boss is not arranged can be determined as the heat radiation characteristic value corresponding to the target chip.

Alternatively, the first preset feature value may be 1, and the second preset feature value may be 0; alternatively, the first preset feature value may be YES, and the second preset feature value may be NO.

It should be noted that, the heat dissipation characteristic value corresponding to the target chip not only can be used for representing whether to set the heat dissipation boss, but also can be used for representing the size, the material and the like of the heat dissipation boss. For ease of understanding, the embodiments of the present disclosure will be described by taking the case where the heat dissipation characteristic value is only used to represent whether the heat dissipation boss is provided.

The above describes a method for determining the heat dissipation characteristic value corresponding to the target chip, in this way, the heat dissipation characteristic values corresponding to the plurality of chips included in the circuit board may be determined, and the heat dissipation characteristic values corresponding to the plurality of chips included in the circuit board may form the simulated heat dissipation parameter associated with the target chip.

And 150, simulating the target chip based on the simulated heat dissipation parameters by taking the circuit board as a simulation object to obtain the simulated junction temperature corresponding to the target chip.

Optionally, the drawing, the size, the material, and the like of the circuit board and the simulated heat dissipation parameters determined in the step 140 may be provided to a computer simulation software, so that the computer simulation software may build a model of the circuit board, simulate the working conditions that each chip with the corresponding heat dissipation characteristic value as the first preset characteristic value is provided with a heat dissipation boss, and perform a dynamic experiment on the model of the circuit board, so as to obtain, through simulation calculation, simulated junction temperatures (including simulated junction temperatures corresponding to the target chips) corresponding to each of the plurality of chips.

It is understood that junction temperature generally refers to: the highest temperature of a semiconductor chip located in an electronic device, typically above the case temperature and the device surface temperature, may be used to measure the heat dissipation capability of the chip from the semiconductor wafer to the case.

Step 160, determining a heat dissipation mode of the circuit board based on the simulated junction temperature and the preset junction temperature corresponding to the target chip.

Optionally, the preset junction temperature corresponding to the target chip may refer to: the junction temperature that the target chip can withstand is a maximum value designed for the target chip in advance, and thus, the preset junction temperature may also be referred to as a preset maximum junction temperature. Similarly, the remaining chips of the plurality of chips included in the circuit board may also have respective preset junction temperatures.

By combining the simulation junction temperature and the preset junction temperature corresponding to each of the plurality of chips included in the circuit board, it is possible to evaluate which chips of the plurality of chips are necessary to be provided with the heat dissipation boss, which chips are not necessary to be provided with the heat dissipation boss, which size and which material of the heat dissipation boss should be provided with the chips necessary to be provided with the heat dissipation boss, which heat conduction interface material should be adopted between the chips necessary to be provided with the heat dissipation boss and the heat dissipation boss, and the like, and thus a heat dissipation mode including an evaluation result can be obtained.

In one example, the circuit board includes 10 chips, namely, chip 1, chip 2, … …, chip 9 and chip 10, wherein the simulated junction temperature corresponding to any one of chip 1 to chip 6 is smaller than the preset junction temperature corresponding to the chip, and the simulated junction temperature corresponding to any one of chip 7 to chip 10 is larger than the preset junction temperature corresponding to the chip, which means that only the chip 7 to chip 10 has an overtemperature phenomenon in the 10 chips, and then it can be determined that the chip 7 to chip 10 needs to be provided with a heat dissipation boss, and the chip 1 to chip 6 do not need to be provided with a heat dissipation boss. In addition, for any one of the chips 7 to 10, a heat dissipation boss with a proper size and a proper material can be selected for the chip according to the temperature difference between the simulated junction temperature and the preset junction temperature corresponding to the chip, for example, the larger the temperature difference corresponding to the chip is, the more obvious the overtemperature of the chip is, and then the heat dissipation boss with better heat conduction performance of the material can be selected for the chip.

Based on the method for determining a heat dissipation manner provided in the foregoing embodiments of the present disclosure, a first predicted temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board, and a second predicted temperature difference between the chipless area on the circuit board and an environment where the circuit board is located may be combined, and a third predicted temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located is determined. Under the condition of knowing the third predicted temperature difference, through the introduction of a computer simulation technology, a dynamic experiment can be carried out on a model of the circuit board, and then the heat dissipation mode of the circuit board can be reasonably determined by combining with the preset junction temperature, for example, the heat dissipation bosses which are required to be arranged on the chips in the circuit board, the heat dissipation bosses which are required to be arranged in any size and any material, and the like are determined, and the heat dissipation of the chips can be effectively realized through the application of the determined heat dissipation mode, so that the normal operation of the circuit board and the electronic equipment where the circuit board is positioned is ensured.

In some alternative examples, as shown in fig. 2, step 110 includes step 1101, step 1103, step 1105, and step 1107.

Step 1101, determining a target heat flux density of a target chip based on a target size and a target power.

It is understood that the heat flux density, which may also be referred to as heat flux, is generally defined as: heat per unit time per unit cross-sectional area of the object is passed. In this defined manner, a target heat flux density of the target chip may be calculated.

Assuming that the length dimension in the target dimension is denoted as L1, the width dimension is denoted as L2, the target power is denoted as P, and the target heat flux density is denoted as q, the target heat flux density can be calculated using the following formula:

q＝P/(L1×L2)

in step 1103, a reference predicted temperature difference between the chip set region and the chipless region is determined under the working conditions of using the target power, the target heat flux density, and the reference thermal conductivity.

Referring to the description of the thermal conductivity of the circuit board above, the reference thermal conductivity may include: normal reference thermal conductivity and horizontal reference thermal conductivity.

The normal reference thermal conductivity and the horizontal reference thermal conductivity may be set according to actual conditions, for example, the horizontal reference thermal conductivity may be set to 30W/mK (30W/m·degree), the normal reference thermal conductivity may be set to 0.3W/mK, and for example, the horizontal reference thermal conductivity may be set to 20W/mK, and the normal reference thermal conductivity may be set to 0.2W/mK.

Alternatively, the curve of the predicted temperature difference between the chip setting region and the chipless region according to the heat flux density may be determined in advance by experiments for each of a plurality of preset powers when the reference heat conductivity is employed. Assuming that the target power is a certain preset power of the multiple preset powers, the predicted temperature difference corresponding to the target heat flux density may be determined by referring to the change curve corresponding to the preset power, and the determined predicted temperature difference may be used as the reference predicted temperature difference in step 1103.

The above description refers to the case that the target power is exactly one of the plurality of preset powers, if the target power is different from any one of the plurality of preset powers, two preset powers closest to the target power in the plurality of preset powers may be determined, two predicted temperature differences corresponding to the target heat flux density may be determined by referring to two change curves corresponding to the two preset powers, and then interpolation may be performed between the two predicted temperature differences to obtain a predicted temperature difference corresponding to the target power as the reference predicted temperature difference in step 1103.

Alternatively, the curve of the predicted temperature difference between the chip setting area and the chipless area according to the power may be determined in advance by experiments for each of a plurality of preset heat flux densities when the reference heat conductivity is adopted. Assuming that the target heat flux density is a certain preset heat flux density of the plurality of preset heat flux densities, the predicted temperature difference corresponding to the target power can be determined by referring to the change curve corresponding to the preset heat flux density, and the determined predicted temperature difference can be used as the reference predicted temperature difference in step 1103. Assuming that the target heat flux density is different from any one of the plurality of preset heat flux densities, referring to the description in the upper section, two predicted temperature differences may be obtained by referring to the two change curves, and the reference predicted temperature difference in step 1103 may be obtained by interpolating between the two predicted temperature differences.

In step 1105, a target temperature difference change coefficient is determined based on the thermal conductivity of the circuit board and the reference thermal conductivity.

In some alternative embodiments, the normal thermal conductivity of the circuit board may be referred to as a target normal thermal conductivity, and the horizontal thermal conductivity of the circuit board may be referred to as a target horizontal thermal conductivity, and then the thermal conductivity of the circuit board may include: target normal thermal conductivity and target horizontal thermal conductivity.

As shown in fig. 3, step 1105 includes step 11051, step 11053, and step 11057.

In step 11051, a target mapping relationship corresponding to the reference thermal conductivity is determined, where the target mapping relationship is a mapping relationship among the normal thermal conductivity, the horizontal thermal conductivity and the temperature difference change coefficient.

Alternatively, the target mapping relationship corresponding to the reference thermal conductivity may be obtained through experiments, and the target mapping relationship corresponding to the reference thermal conductivity may be stored in the database.

The reference thermal conductivity is assumed to include: the normal reference thermal conductivity and the horizontal reference thermal conductivity, the horizontal reference thermal conductivity may be set to 30W/mK, the normal reference thermal conductivity may be set to 0.3W/mK, and the target mapping relationship corresponding to the reference thermal conductivity may be referred to as table 1 below:

TABLE 1

In Table 1, the normal thermal conductivity is nine possibilities, 0.05W/mK, 0.1W/mK, 0.2W/mK, 0.3W/mK, 0.4W/mK, 0.5W/mK, 0.6W/mK, 0.8W/mK, 1W/mK, and the horizontal thermal conductivity is nine possibilities, 5W/mK, 10W/mK, 20W/mK, 30W/mK, 40W/mK, 50W/mK, 60W/mK, 80W/mK, 100W/mK, and the temperature difference change coefficient corresponding to the reference thermal conductivity formed by the combination of 30W/mK and 0.3W/mK is 1.000.

It should be noted that, the reference thermal conductivity may be regarded as a working condition (assuming that it is referred to as a working condition a), and the combination of a certain normal thermal conductivity except for 0.3W/mK and a certain horizontal thermal conductivity except for 30W/mK in the target map may be regarded as another working condition (assuming that it is referred to as a working condition B), the temperature difference change coefficient corresponding to the working condition B may be referred to as: from the working condition A to the working condition B, the temperature difference between the chip setting area and the chip-free area is changed in proportion.

In one example, the horizontal thermal conductivity under the working condition B is 20W/mK, and the normal thermal conductivity under the working condition B is 0.2W/mK, then it can be seen from table 1 that the temperature difference change coefficient corresponding to the working condition B is 1.342, which indicates that the temperature difference between the chip arrangement region and the chipless region under the working condition B is 1.342 times the temperature difference between the chip arrangement region and the chipless region under the working condition a.

In another example, the horizontal thermal conductivity under the working condition B is 40W/mK, and the normal thermal conductivity under the working condition B is 0.4W/mK, then as can be seen from table 1, the temperature difference change coefficient corresponding to the working condition B is 0.835, which indicates that the temperature difference between the chip set region and the chipless region under the working condition B is 0.835 times the temperature difference between the chip set region and the chipless region under the working condition a.

In step 11053, based on the target mapping relationship, a temperature difference change coefficient mapped by both the target normal thermal conductivity coefficient and the target horizontal thermal conductivity coefficient is determined.

Alternatively, the target normal thermal conductivity may be a certain normal thermal conductivity among nine normal thermal conductivities appearing in table 1, and the target horizontal thermal conductivity may be a certain horizontal thermal conductivity among nine horizontal thermal conductivities appearing in table 1, in which case the temperature difference change coefficients mapped with the target normal thermal conductivity and the target horizontal thermal conductivity at the same time may be directly determined by referring to table 1.

In some cases, the target normal thermal conductivity is different from any one of the nine normal thermal conductivities shown in table 1, and the target horizontal thermal conductivity is different from any one of the nine horizontal thermal conductivities shown in table 1, so that the temperature difference change coefficient mapped with the target normal thermal conductivity and the target horizontal thermal conductivity simultaneously can be obtained by interpolation.

In one example, where the target horizontal heat transfer coefficient is 35W/mK and the target normal heat transfer coefficient is 0.25W/mK, the two horizontal heat transfer coefficients closest to the target horizontal heat transfer coefficient among the nine horizontal heat transfer coefficients shown in Table 1 are determined to be obviously 30W/mK and 40W/mK, and the two normal heat transfer coefficients closest to the target normal heat transfer coefficient among the nine normal heat transfer coefficients shown in Table 1 are determined to be obviously 0.2W/mK and 0.3W/mK. The two horizontal heat transfer coefficients of 30W/mK and 40W/mK and the two normal heat transfer coefficients of 0.2W/mK and 0.3W/mK can be combined into four working conditions, and referring to Table 1, it is known that the temperature difference change coefficient corresponding to the working condition formed by the combination of 30W/mK and 0.2W/mK is 1.151, the temperature difference change coefficient corresponding to the working condition formed by the combination of 30W/mK and 0.3W/mK is 1.000, the temperature difference change coefficient corresponding to the working condition formed by the combination of 40W/mK and 0.2W/mK is 1.038, and the temperature difference change coefficient corresponding to the working condition formed by the combination of 40W/mK and 0.3W/mK is 0.907. By performing bilinear interpolation between the four temperature difference coefficients 1.151, 1.000, 1.038, 0.907, the temperature difference coefficient of variation mapped with the target normal thermal conductivity and the target horizontal thermal conductivity at the same time can be obtained.

In step 11055, a target thermal conductivity is determined based on the thermal conductivity mapped to both the target normal thermal conductivity and the target horizontal thermal conductivity.

Optionally, the temperature difference change coefficient mapped by the target normal thermal conductivity coefficient and the target horizontal thermal conductivity coefficient can be directly determined as the target temperature difference change coefficient; or, according to the actual application scene of the circuit board, a certain algorithm is adopted to correct the temperature difference change coefficient mapped by the target normal heat conduction coefficient and the target horizontal heat conduction coefficient so as to obtain the target temperature difference change coefficient.

In this way, in the embodiment shown in fig. 3, only the target mapping relation corresponding to the reference thermal conductivity is obtained through experiments, and the target temperature difference change coefficient adapted to the target mapping relation can be determined efficiently and reliably by applying the target mapping relation no matter what thermal conductivity is of the circuit board.

Step 1107, adjusting the reference predicted temperature difference by using the target temperature difference change coefficient to obtain a first predicted temperature difference.

In some alternative embodiments, as shown in fig. 4, step 1107 includes step 11071, step 11073, and step 11075.

In step 11071, a temperature difference calculation safety factor is determined.

Alternatively, the temperature difference calculation safety coefficient may be a preset constant value, for example, 1, 1.1, or the like. Of course, the safety coefficient calculated by the temperature difference can also be the safety coefficient calculated by adopting a certain algorithm. For example, as shown in fig. 5, step 11071 includes step 110711, step 110713, and step 110715.

Step 110711, determining a neighborhood chipset of the target chip, the neighborhood chipset comprising: the circuit board includes chips located within a predetermined distance range of the target chip.

Alternatively, the preset distance range of the target chip may be rectangular, circular, diamond, or the like, the center of the target chip may be the center of the preset distance range, and the range size of the preset distance range may be set according to the actual situation, which is not limited in the embodiments of the present disclosure.

For other chips except the target chip in the plurality of chips included in the circuit board, the distance between each of the other chips and the target chip can be respectively determined by means of manual measurement and the like, so that the chips positioned in the preset distance range of the target chip can be screened from the other chips, and the chips can form a neighborhood chip set of the target chip.

And 110713, fusing the power of each chip in the neighborhood chip set based on the distance between each chip in the neighborhood chip set and the target chip, and obtaining fused power.

Assuming that the neighborhood chip set of the target chip includes N chips, where the power and distance corresponding to the first chip are P1 and d1 respectively, the power and distance corresponding to the second chip are P2 and d2 respectively, the power and distance corresponding to the third chip are P3 and d3 respectively, … …, and the power and distance corresponding to the nth chip are Pn and dn respectively, and assuming that the fusion power is denoted as P', the fusion power can be calculated by using the following formula:

P＇＝(P1×d1+P2×d2+P3×d3+……+Pn×dn)/(d1+d2+d3+……+dn)

of course, the manner of obtaining the fusion power is not limited thereto, and for example, the following formula may be adopted to obtain the fusion power:

P＇＝(P1×e ^d1 +P2×e ^d2 +P3×e ^d3 +……+Pn×e ^dn )/(e ^d1 +e ^d2 +e ^d3 +……+e ^dn )

where e is a mathematical constant representing the base of the natural logarithmic function.

In this way, the N powers corresponding to the N chips are weighted and averaged based on the N distances corresponding to the N chips one by one, so that the fusion of the N powers can be efficiently and reliably realized to obtain the fusion power.

Step 110715, determining a temperature difference calculation safety coefficient based on the fusion power, wherein the temperature difference calculation safety coefficient and the fusion power are positively correlated.

Alternatively, the independent variable may be preset as power, the dependent variable as a first function of the safety coefficient, and the first function may be a monotonically increasing function, including but not limited to a linear function with a positive slope, an exponential function with a base greater than 1, and the like.

Therefore, only the fusion power is brought into the first function to calculate, a safety coefficient can be obtained, and the obtained safety coefficient can be used as a temperature difference to calculate the safety coefficient.

Since the chips in the neighborhood chip set of the target chip are located within the preset distance range of the target chip, the fact that the distance between the chips in the neighborhood chip set and the target chip is relatively short indicates that the chips in the neighborhood chip set are likely to influence the temperature difference between the chip setting area corresponding to the target chip and the chipless area on the circuit board. By referring to the distance between each chip in the neighborhood chip set and the target chip, the respective power of each chip in the neighborhood chip set is fused, the obtained fusion power can be used for comprehensively evaluating the influence of the neighborhood chip set on the temperature difference, the obtained fusion power is used for determining the temperature difference calculation safety coefficient, and the rationality and reliability of the determined temperature difference calculation safety coefficient can be improved.

In step 11073, the product of the target temperature difference change coefficient and the temperature difference calculation safety coefficient is determined.

Assuming that the target temperature difference change coefficient is expressed as K _λ The temperature difference calculation safety coefficient is expressed as K ₁ The product of the target temperature difference change coefficient and the temperature difference calculation safety coefficient can be expressed as K _λ ×K ₁ 。

In step 11075, the reference predicted temperature difference is adjusted using the product to obtain a first predicted temperature difference.

Alternatively, the product determined in step 11073 may be directly multiplied by the reference predicted temperature difference, and the resulting multiplication result may be taken as the first predicted temperature difference.

In the embodiment shown in fig. 4, the product of the target temperature difference change coefficient and the temperature difference calculation safety coefficient may be used for adjusting the reference predicted temperature difference to obtain the first predicted temperature difference, and a certain margin may be reserved for estimating the first predicted temperature difference through introduction of the temperature difference calculation safety coefficient.

Of course, the embodiment of step 1107 is not limited to the case shown in fig. 4, for example, the embodiment of step 1107 may not introduce a temperature difference calculation safety coefficient, but directly multiply the target temperature difference change coefficient by the reference predicted temperature difference, and take the obtained multiplication result as the first predicted temperature difference.

In the embodiment of the disclosure, the target heat flux density of the target chip can be determined efficiently and reliably by referring to the target size and the target power of the target chip, the reference predicted temperature difference corresponding to the reference working condition (for example, the working condition a above) can be determined by combining the target power, the target heat flux density and the reference heat conductivity coefficient, and the first predicted temperature difference can be estimated efficiently and reliably by combining the heat conductivity coefficient of the circuit board and the reference heat conductivity coefficient corresponding to the reference working condition and by applying the temperature difference change coefficient. Conversely, for the working condition requiring the determination of the first predicted temperature difference, the determination of the first predicted temperature difference can be realized by determining and applying the temperature difference change coefficient of the working condition relative to the reference working condition, and the determination operation of the first predicted temperature difference is very convenient and quick to implement.

In some alternative examples, as shown in fig. 6, step 120 includes step 1201, step 1203, and step 1205.

Step 1201, determining a neighborhood chipset of the target chip, the neighborhood chipset comprising: the circuit board includes chips located within a predetermined distance range of the target chip.

It should be noted that, the specific embodiment of step 1201 is described above with reference to step 110711, and will not be described herein.

Step 1203, based on the distance between each chip in the neighborhood chip set and the target chip, fusing the power of each chip in the neighborhood chip set to obtain fused power.

It should be noted that, the specific embodiment of the step 1203 needs to be described above with reference to the step 110713, which is not repeated here.

In step 1205, a second predicted temperature difference is determined based on the fusion power, the second predicted temperature difference being in positive correlation with the fusion power.

Alternatively, the independent variable may be preset as power, the dependent variable as a second function of the predicted temperature difference, and the second function may be a monotonically increasing function, including but not limited to a linear function with a positive slope, an exponential function with a base greater than 1, and the like.

Therefore, only the fusion power is brought into the second function to calculate, one predicted temperature difference can be obtained, and the obtained predicted temperature difference can be used as the second predicted temperature difference.

It should be noted that the chips in the neighboring chip set may affect the temperature difference between the chipless area and the environment where the circuit board is located. By referring to the distance between each chip in the neighborhood chip set and the target chip, the respective power of each chip in the neighborhood chip set is fused, the obtained fusion power can be used for comprehensively evaluating the influence of the neighborhood chip set on the temperature difference, the obtained fusion power is used for determining the second prediction temperature difference, and the rationality and reliability of the determined second prediction temperature difference can be improved.

In some alternative examples, step 120 includes:

based on a first distance between the target chip and the center of the circuit board, a second predicted temperature difference is determined, and the second predicted temperature difference is inversely related to the first distance.

Alternatively, the independent variable may be preset as the distance, the dependent variable as a third function of the predicted temperature difference, and the third function may be a monotonically decreasing function including, but not limited to, a linear function with a negative slope, an exponential function with a base greater than 0 and less than 1, and the like.

Therefore, only the first distance between the target chip and the center of the circuit board is brought into the third function to calculate, one predicted temperature difference can be obtained, and the obtained predicted temperature difference can be used as a second predicted temperature difference.

Because the second predicted temperature difference is inversely related to the first distance, the more the target chip is close to the center of the circuit board, the larger the second predicted temperature difference is, the more the target chip is far away from the center of the circuit board, and the smaller the second predicted temperature difference is, namely, the adaptive second predicted temperature difference can be determined for the target chip according to the distribution condition of the target chip on the circuit board, so that the rationality and the reliability of the determined second predicted temperature difference can be better ensured.

In some alternative examples, step 120 includes:

and determining a second predicted temperature difference based on a second distance between the target chip and the edge of the circuit board, wherein the second predicted temperature difference is positively correlated with the second distance.

Alternatively, the independent variable may be preset as the distance, the dependent variable as a fourth function of the predicted temperature difference, and the fourth function may be a monotonically increasing function, including but not limited to a linear function with a positive slope, an exponential function with a base greater than 1, and the like.

Therefore, only the second distance between the target chip and the edge of the circuit board is brought into the fourth function to be calculated, one predicted temperature difference can be obtained, and the obtained predicted temperature difference can be used as the second predicted temperature difference.

Because the second predicted temperature difference is positively correlated with the second distance, the closer the target chip is to the edge of the circuit board, the smaller the second predicted temperature difference is, the farther the target chip is from the edge of the circuit board, and the larger the second predicted temperature difference is, namely, the adaptive second predicted temperature difference can be determined for the target chip according to the distribution condition of the target chip on the circuit board, so that the rationality and reliability of the determined second predicted temperature difference can be better ensured.

In some alternative examples, as shown in fig. 7, step 140 includes step 1401, step 1403, step 1405, step 1407, and step 1409.

In step 1401, the cooling mode of the circuit board and the junction temperature of the chip are determined, and the safety coefficient is calculated.

Alternatively, the cooling mode of the circuit board may be set manually, including but not limited to an air cooling mode, a liquid cooling mode, etc.; the chip junction temperature calculation safety coefficient can be a safety coefficient estimated according to experience.

Step 1403, determining a cooling medium temperature corresponding to the cooling mode.

Alternatively, the temperature of the cooling medium corresponding to the cooling mode may be set manually, the temperature of the cooling medium corresponding to the air cooling mode may be referred to as an ambient temperature, and the cooling medium corresponding to the liquid cooling mode may be referred to as a cooling liquid inlet temperature.

In step 1405, a safety coefficient, a target power and a hardening thermal resistance of the target chip are calculated based on the cooling medium temperature, the third predicted temperature difference and the chip junction temperature, and a theoretical junction temperature corresponding to the target chip is determined.

Alternatively, the theoretical junction temperature of the target chip may be calculated using the following formula:

T _pcb ＝T _α +△T _pcb

T _j ＇＝k×P×R _jb +T _pcb

wherein T is _α Represents the temperature of the cooling medium, deltaT _pcb Representing a third predicted temperature difference, T _pcb Representing the sum of the temperature of the cooling medium and the third predicted temperature difference, T _j ' represents the theoretical junction temperature of the target chip, k represents the chip junction temperature calculation safety coefficient, P represents the target power, R _jb Indicating the thermal hardening resistance of the target chip.

It is understood that the thermal resistance of the target chip to be hardened may refer to the thermal resistance between the heat source junction of the target chip to the PCB.

Of course, the embodiment of step 1405 is not limited thereto, e.g., T in the above formula _j ' after that, T can be manually controlled _j ' make corrections and let T _j The correction result of' is taken as the theoretical junction temperature corresponding to the target chip.

And step 1407, determining a hot air risk level corresponding to the target chip based on the theoretical junction temperature and the preset junction temperature.

Optionally, step 1407 includes:

determining a junction temperature difference value between a preset junction temperature and a theoretical junction temperature corresponding to the target chip;

determining a target preset temperature difference range to which the junction temperature difference value belongs; wherein, different preset temperature difference ranges correspond to different hot air risk grades;

and determining the hot air risk level corresponding to the target chip based on the target preset temperature difference range.

It should be noted that a plurality of preset temperature difference ranges may be preset, and a corresponding relationship between the plurality of preset temperature difference ranges and the corresponding hot air risk levels may be constructed. Alternatively, there may be a one-to-one correspondence between the preset temperature difference range and the hot air risk level.

The junction temperature difference value can be obtained by making a difference between the preset junction temperature corresponding to the target chip and the theoretical junction temperature, the junction temperature difference value can be regarded as the junction temperature design margin of the target chip, and the hot air risk level corresponding to the target preset temperature difference range to which the junction temperature difference value belongs can be regarded as the hot air risk level corresponding to the target chip.

In a specific example, the correspondence between the plurality of preset temperature difference ranges and the corresponding hot air risk levels may be as shown in the following table 2:

TABLE 2

Wherein (-infinity, N) ₁ ]、(N ₁ ，N ₂ ]、(N ₂ ，N ₃ ]、……、(N _n-1 ，N _n ]、(N _n , + -infinity) can be used for respectively represent a preset temperature difference range. In addition, deltaT _j The junction temperature difference may be represented.

Assume that the junction temperature difference value corresponding to the target chip belongs to (N ₂ ，N ₃ ]In this preset temperature difference range, according to table 2, it can be known that the hot air risk Level corresponding to the target chip may be Level 2.

Therefore, through presetting the corresponding relation between the plurality of preset temperature difference ranges and the corresponding hot air risk levels, the hot air risk levels corresponding to the target chips can be determined efficiently and reliably only by making the difference between the preset junction temperature corresponding to the target chips and the theoretical junction temperature according to the distribution condition of the obtained junction temperature difference value relative to the plurality of preset temperature difference ranges.

Of course, the embodiment of step 1407 is not limited thereto, and for example, the correspondence between a plurality of proportion ranges and the corresponding hot air risk levels may be preset, and after the preset junction temperature corresponding to the target chip is differentiated from the theoretical junction temperature to obtain the junction temperature difference, the obtained junction temperature difference may be divided from the theoretical junction temperature corresponding to the target chip, and the hot air risk level corresponding to the proportion range to which the obtained division result belongs may be regarded as the hot air risk level corresponding to the target chip.

Step 1409, determining the simulated heat dissipation parameters based on the hot air risk level.

The above describes a manner of determining the hot air risk level corresponding to the target chip, and in this manner, the hot air risk levels corresponding to the chips included in the circuit board may be determined. And then, a first set of chips with the corresponding hot air risk Level of Level n can be determined from a plurality of chips included in the circuit board, and simulation heat dissipation parameters used for representing that each chip in the first set is respectively provided with a heat dissipation boss are determined. Or, a second set of chips with corresponding hot air risk levels of Level n and Level n-1 can be determined from a plurality of chips included in the circuit board, and simulation heat dissipation parameters used for representing that each chip in the second set is respectively provided with a heat dissipation boss are determined. Or, a third set of chips with corresponding hot air risk levels of Level n, level n-1 and Level n-2 can be determined from a plurality of chips included in the circuit board, and simulation heat dissipation parameters for representing that each chip in the third set is respectively provided with a heat dissipation boss are determined.

Assuming that the upper section specifically determines a simulation heat dissipation parameter for representing that each chip in the first set is respectively provided with a heat dissipation boss, the circuit board can be taken as a simulation object, and a plurality of chips included in the circuit board are simulated for the first time based on the simulation heat dissipation parameter so as to obtain simulation junction temperatures corresponding to the chips.

Comparing the simulated junction temperature corresponding to each of the plurality of chips obtained through the first simulation with the preset junction temperature corresponding to each of the plurality of chips, screening out a chip with the corresponding hot air risk Level of Level n and overtemperature and a fourth set of chips with the corresponding hot air risk Level of Level n-1 from the plurality of chips, determining a simulated heat dissipation parameter used for representing that each chip in the fourth set is respectively provided with a heat dissipation boss, and performing second simulation on the plurality of chips based on the simulated heat dissipation parameter by taking the circuit board as a simulation object so as to obtain the simulated junction temperature corresponding to each of the plurality of chips.

Comparing the simulated junction temperature corresponding to each of the plurality of chips obtained through the second simulation with the preset junction temperature corresponding to each of the plurality of chips, and screening out chips with the corresponding hot air risk grades of Level n and Level n-1 and overtemperature from the plurality of chips, and a fifth set of chips with the corresponding hot air risk grade of Level n-2, determining simulated heat dissipation parameters for representing that each chip in the fifth set is respectively provided with a heat dissipation boss, and performing third simulation on the plurality of chips based on the simulated heat dissipation parameters by taking the circuit board as a simulation object so as to obtain the simulated junction temperature corresponding to each of the plurality of chips.

In the manner described in the above three paragraphs, a total of N simulations may be performed, and then the simulated junction temperatures of the respective plurality of chips obtained by the nth simulation may be compared with the preset junction temperatures of the respective plurality of chips. If the simulated junction temperature corresponding to a certain chip obtained through the Nth simulation is larger than the preset junction temperature corresponding to the chip, the fact that the chip needs to be provided with a heat dissipation boss in order to ensure the heat dissipation effect of the chip is indicated, and if the simulated junction temperature corresponding to the chip is smaller than or equal to the preset junction temperature corresponding to the chip, the fact that the chip does not need to be provided with the heat dissipation boss is indicated, and therefore a proper heat dissipation mode can be determined for a circuit board.

In the embodiment of the disclosure, the theoretical junction temperature corresponding to the target chip can be determined efficiently and reliably by referring to the cooling medium temperature, the third prediction temperature difference, the chip junction temperature and the calculated safety coefficient, the target power and the hardening thermal resistance of the target chip through simple operation logics such as addition operation, multiplication operation and the like, and then the design margin of the target chip can be effectively evaluated by combining with the preset junction temperature corresponding to the target chip, specifically, the larger the difference between the theoretical junction temperature and the preset junction temperature is, the larger the design margin of the target chip is considered, the smaller the difference between the theoretical junction temperature and the preset junction temperature is considered, the smaller the design margin of the target chip is considered, and according to the design margin, the reasonable hot air risk level can be determined for the target chip, for example, the larger the design margin of the target chip is, the higher the hot air risk level corresponding to the target chip is, the lower the hot air risk level corresponding to the chip is used for determining the simulation heat dissipation parameter, and the determined hot air risk level is favorable for ensuring the rationality of the determined simulation heat dissipation parameter.

In some alternative examples, as shown in fig. 8, in order to determine the heat dissipation manner of the circuit board, the relevant parameters of the target chip and the relevant parameters of the circuit board may be acquired first; wherein the correlation of the target chipParameters include, but are not limited to, a length dimension L1, a width dimension L2, and a target power P of the target chip; relevant parameters of the circuit board include, but are not limited to, normal thermal conductivity and horizontal thermal conductivity of the circuit board. The target heat flux density of the target chip can be calculated by utilizing the length dimension L1, the width dimension L2 and the target power P, and the reference predicted temperature difference delta T corresponding to the reference working condition can be determined based on the target power, the target heat flux density and the reference heat conductivity coefficient _pcb 'S'. The normal heat conduction coefficient and the horizontal heat conduction coefficient of the circuit board are combined with the reference heat conduction coefficient, so that the target temperature difference change coefficient K can be determined _λ . In addition, the temperature difference calculation safety coefficient K can be determined ₁ Combining the reference predicted temperature difference delta T _pcb ' target temperature difference change coefficient K _λ And the temperature difference is used for calculating the safety coefficient K ₁ The first predicted temperature difference above may be determined, which may be expressed as Δt1=k ₁ ×ΔT _pcb ＇×K _λ . In addition, the temperature difference between the chipless area on the circuit board and the environment in which the circuit board is located, i.e., the second predicted temperature difference Δt2 above, can also be estimated. The temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located can be obtained by summing the first predicted temperature difference and the second predicted temperature difference, namely the third predicted temperature difference delta T3 is obtained, and therefore the third predicted temperature difference can be calculated by adopting the following formula:

ΔT3＝K ₁ ×ΔT _pcb ＇×K _λ +ΔT2

The obtained third prediction temperature difference can be used for determining simulation heat dissipation parameters, and by means of simulation calculation and combination of application of preset junction temperature, a proper heat dissipation mode can be determined for the circuit board so as to ensure heat dissipation effect.

Any of the heat dissipation manner determination methods provided by the embodiments of the present disclosure may be performed by any suitable device having data processing capabilities, including, but not limited to: terminal equipment, servers, etc. Alternatively, any of the heat dissipation mode determining methods provided by the embodiments of the present disclosure may be executed by a processor, such as the processor executing any of the heat dissipation mode determining methods mentioned by the embodiments of the present disclosure by calling corresponding instructions stored in a memory. And will not be described in detail below.

Exemplary apparatus

Fig. 9 is a schematic structural view of a heat dissipation mode determining device according to an exemplary embodiment of the present disclosure. The apparatus shown in fig. 9 includes a first determination module 910, a second determination module 920, a third determination module 930, a fourth determination module 940, a simulation module 950, and a fifth determination module 960.

A first determining module 910, configured to determine a first predicted temperature difference between a chip setting area corresponding to a target chip on the circuit board and a chipless area on the circuit board based on a thermal conductivity coefficient of the circuit board and a target size and a target power of the target chip included in the circuit board;

A second determining module 920, configured to determine a second predicted temperature difference between the chipless area on the circuit board and the environment in which the circuit board is located;

a third determining module 930, configured to determine a third predicted temperature difference between the chip setting area corresponding to the target chip and the environment where the circuit board is located based on the first predicted temperature difference determined by the first determining module 910 and the second predicted temperature difference determined by the second determining module 920;

a fourth determining module 940, configured to determine a simulated heat dissipation parameter associated with the target chip based on the third predicted temperature difference determined by the third determining module 930;

the simulation module 950 is configured to simulate the target chip based on the simulated heat dissipation parameter determined by the fourth determination module 940 by using the circuit board as a simulation object, so as to obtain a simulated junction temperature corresponding to the target chip;

the fifth determining module 960 is configured to determine a heat dissipation manner of the circuit board based on the simulated junction temperature obtained by the simulating module 950 and the preset junction temperature corresponding to the target chip.

In some alternative examples, as shown in fig. 10, the first determining module 910 includes:

a first determination submodule 9101 for determining a target heat flux density of the target chip based on the target size and the target power;

the second determining submodule 9103 is configured to determine a reference predicted temperature difference between the chip setting area and the chipless area under the working condition of using the target power, the target heat flux density determined by the first determining submodule 9101, and the reference heat conductivity coefficient;

A third determining submodule 9105, configured to determine a target temperature difference change coefficient based on the thermal conductivity of the circuit board and the reference thermal conductivity;

the adjusting submodule 9107 is configured to adjust the reference predicted temperature difference determined by the second determining submodule 9103 by using the target temperature difference change coefficient determined by the third determining submodule 9105 to obtain a first predicted temperature difference.

In some alternative examples, the thermal conductivity of the circuit board includes: target normal thermal conductivity and target horizontal thermal conductivity;

as shown in fig. 11, the third determination submodule 9105 includes:

a first determining unit 91051, configured to determine a target mapping relationship corresponding to the reference thermal conductivity, where the target mapping relationship is a mapping relationship among the normal thermal conductivity, the horizontal thermal conductivity, and the temperature difference change coefficient;

a second determining unit 91053, configured to determine a temperature difference change coefficient mapped to both the target normal thermal conductivity coefficient and the target horizontal thermal conductivity coefficient based on the target mapping relationship determined by the first determining unit 91051;

third determining unit 91055 is configured to determine a target temperature difference change coefficient based on the temperature difference change coefficients that are mapped by both the target normal thermal conductivity and the target horizontal thermal conductivity determined by second determining unit 91053.

In some alternative examples, as shown in fig. 12, the adjustment submodule 9107 includes:

a fourth determination unit 91071 for determining a temperature difference calculation safety coefficient;

a fifth determining unit 91073 for determining a product of the target temperature difference change coefficient determined by the third determining submodule 9105 and the temperature difference calculation safety coefficient determined by the fourth determining unit 91071;

the adjusting unit 91075 is configured to adjust the reference predicted temperature difference determined by the second determining submodule 9103 by using the product determined by the fifth determining unit 91073 to obtain a first predicted temperature difference.

In some optional examples, the fourth determining unit 91071 includes:

a first determining subunit, configured to determine a neighborhood chipset of the target chip, where the neighborhood chipset includes: the circuit board comprises chips positioned in a preset distance range of the target chip;

the fusion subunit is used for fusing the power of each chip in the neighborhood chip set determined by the first determination subunit based on the distance between each chip in the neighborhood chip set determined by the first determination subunit and the target chip, so as to obtain fusion power;

and the second determining subunit is used for determining a temperature difference calculation safety coefficient based on the fusion power obtained by the fusion subunit, and the temperature difference calculation safety coefficient and the fusion power are positively correlated.

In some alternative examples, as shown in fig. 13, the second determining module 920 includes:

a fourth determination submodule 9201, configured to determine a neighborhood chipset of the target chip, where the neighborhood chipset includes: the circuit board comprises chips positioned in a preset distance range of the target chip;

the fusion submodule 9203 is configured to fuse the power of each chip in the neighborhood chip set determined by the fourth determination submodule 9201 based on the distance between each chip in the neighborhood chip set determined by the fourth determination submodule 9201 and the target chip, so as to obtain fusion power;

and a fifth determining submodule 9205, configured to determine a second predicted temperature difference based on the fusion power obtained by the fusion submodule 9203, where the second predicted temperature difference and the fusion power are positively correlated.

In some alternative examples, the second determination module 920 includes:

a sixth determining submodule, configured to determine a second predicted temperature difference based on a first distance between the target chip and a center of the circuit board, where the second predicted temperature difference is inversely related to the first distance;

or alternatively, the process may be performed,

and a seventh determination submodule, configured to determine a second predicted temperature difference based on a second distance between the target chip and an edge of the circuit board, where the second predicted temperature difference is positively correlated with the second distance.

In some alternative examples, as shown in fig. 14, the fourth determination module 940 includes:

an eighth determining submodule 9401, configured to determine a cooling mode of the circuit board and calculate a safety coefficient of the chip junction temperature;

a ninth determining submodule 9403, configured to determine a temperature of the cooling medium corresponding to the cooling mode determined by the eighth determining submodule 9401;

a tenth determination submodule 9405, configured to determine a theoretical junction temperature corresponding to the target chip based on the cooling medium temperature determined by the ninth determination submodule 9403, the third predicted temperature difference determined by the third determination module 930, and the chip junction temperature determined by the eighth determination submodule 9401, to calculate a safety coefficient, the target power, and the hardening thermal resistance of the target chip;

an eleventh determining submodule 9407, configured to determine a hot air risk level corresponding to the target chip based on the theoretical junction temperature and the preset junction temperature determined by the tenth determining submodule 9405;

the twelfth determining submodule 9409 is configured to determine the simulated heat dissipation parameter based on the hot air risk level determined by the eleventh determining submodule 9407.

In the apparatus of the present disclosure, various optional embodiments, optional implementations, and optional examples of the disclosure may be flexibly selected and combined as needed to achieve corresponding functions and effects, which are not listed in one-to-one.

Exemplary electronic device

Fig. 15 illustrates a block diagram of an electronic device, according to an embodiment of the disclosure, the electronic device 1500 includes one or more processors 1510 and memory 1520.

The processor 1510 may be a Central Processing Unit (CPU) or other form of processing unit having data processing and/or instruction execution capabilities, and may control other components in the electronic device 1500 to perform desired functions.

Memory 1520 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or nonvolatile memory. Volatile memory can include, for example, random Access Memory (RAM) and/or cache memory (cache) and the like. The non-volatile memory may include, for example, read Only Memory (ROM), hard disk, flash memory, and the like. One or more computer program instructions may be stored on a computer readable storage medium and executed by the processor 1510 to implement the heat dissipation manner determination method and/or other desired functions of the various embodiments of the present disclosure described above.

In one example, the electronic device 1500 may further include: input devices 1530 and output devices 1540, which are interconnected by a bus system and/or other forms of connection mechanisms (not shown).

The input device 1530 may also include, for example, a keyboard, mouse, and the like.

The output device 1540 may output various information to the outside, which may include, for example, a display, a speaker, a printer, and a communication network and a remote output apparatus connected thereto, and the like.

Of course, for simplicity, only some of the components of the electronic device 1500 that are relevant to the present disclosure are shown in fig. 15, components such as buses, input/output interfaces, and the like are omitted. In addition, electronic device 1500 may include any other suitable components depending on the particular application.

Exemplary computer program product and computer readable storage Medium

In addition to the methods and apparatus described above, embodiments of the present disclosure may also be a computer program product comprising computer program instructions which, when executed by a processor, cause the processor to perform the steps in a heat dissipation manner determination method according to various embodiments of the present disclosure described in the above "exemplary methods" section of this specification.

The computer program product may write program code for performing the operations of embodiments of the present disclosure in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server.

Furthermore, embodiments of the present disclosure may also be a computer-readable storage medium, having stored thereon computer program instructions, which when executed by a processor, cause the processor to perform steps in a heat dissipation manner determination method according to various embodiments of the present disclosure described in the above "exemplary method" section of the present disclosure.

The computer readable storage medium may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may include, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: an electrical connection having one or more wires, a portable disk, a hard disk, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

The basic principles of the present disclosure have been described above in connection with specific embodiments, but the advantages, benefits, effects, etc. mentioned in this disclosure are merely examples and are not to be considered as necessarily possessed by the various embodiments of the present disclosure. The specific details disclosed herein are merely for purposes of example and understanding, and are not intended to limit the disclosure to the specific details described above.

Various modifications and alterations to this disclosure may be made by those skilled in the art without departing from the spirit and scope of the application. Thus, the present disclosure is intended to include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (11)

1. A heat dissipation mode determining method includes:

determining a first predicted temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board based on a thermal conductivity coefficient of the circuit board and a target size and target power of the target chip included in the circuit board;

determining a second predicted temperature difference between a chipless region on the circuit board and an environment in which the circuit board is located;

determining a third predicted temperature difference between a chip setting area corresponding to the target chip and the environment where the circuit board is located based on the first predicted temperature difference and the second predicted temperature difference;

determining simulated heat dissipation parameters associated with the target chip based on the third predicted temperature difference;

taking the circuit board as a simulation object, and simulating the target chip based on the simulation heat dissipation parameters to obtain a simulation junction temperature corresponding to the target chip;

And determining a heat dissipation mode of the circuit board based on the simulated junction temperature and the preset junction temperature corresponding to the target chip.

2. The method of claim 1, wherein the determining a first predicted temperature difference between a chip placement area on the circuit board corresponding to the target chip and a chipless area on the circuit board based on the thermal conductivity of the circuit board and a target size and target power of the target chip included in the circuit board comprises:

determining a target heat flux density of the target chip based on the target size and the target power;

determining a reference prediction temperature difference between a chip setting area and a chip-free area under the working conditions of adopting the target power, the target heat flux density and the reference heat conductivity coefficient;

determining a target temperature difference change coefficient based on the thermal conductivity of the circuit board and the reference thermal conductivity;

and adjusting the reference predicted temperature difference by using the target temperature difference change coefficient to obtain the first predicted temperature difference.

3. The method of claim 2, wherein the thermal conductivity of the circuit board comprises: target normal thermal conductivity and target horizontal thermal conductivity;

The determining a target temperature difference change coefficient based on the thermal conductivity of the circuit board and the reference thermal conductivity includes:

determining a target mapping relation corresponding to the reference heat conduction coefficient, wherein the target mapping relation is a mapping relation among a normal heat conduction coefficient, a horizontal heat conduction coefficient and a temperature difference change coefficient;

determining a temperature difference change coefficient mapped by the target normal heat conduction coefficient and the target horizontal heat conduction coefficient based on the target mapping relation;

and determining the target temperature difference change coefficient based on the temperature difference change coefficients mapped by the target normal heat conductivity coefficient and the target horizontal heat conductivity coefficient.

4. The method of claim 2, wherein said adjusting the reference predicted temperature difference to obtain the first predicted temperature difference using the target temperature difference coefficient of variation comprises:

determining a temperature difference to calculate a safety coefficient;

determining the product of the target temperature difference change coefficient and the temperature difference calculation safety coefficient;

and adjusting the reference predicted temperature difference by using the product to obtain the first predicted temperature difference.

5. The method of claim 4, wherein the determining a temperature difference calculates a safety factor comprising:

Determining a neighborhood chipset for the target chip, the neighborhood chipset comprising: the circuit board comprises a chip positioned in a preset distance range of the target chip;

based on the distance between each chip in the neighborhood chip set and the target chip, fusing the power of each chip in the neighborhood chip set to obtain fusion power;

and determining the temperature difference calculation safety coefficient based on the fusion power, wherein the temperature difference calculation safety coefficient and the fusion power are positively correlated.

6. The method of claim 1, wherein the determining a second predicted temperature difference between a chipless area on the circuit board and an environment in which the circuit board is located comprises:

determining a neighborhood chipset for the target chip, the neighborhood chipset comprising: the circuit board comprises a chip positioned in a preset distance range of the target chip;

based on the distance between each chip in the neighborhood chip set and the target chip, fusing the power of each chip in the neighborhood chip set to obtain fusion power;

and determining the second predicted temperature difference based on the fusion power, wherein the second predicted temperature difference is positively correlated with the fusion power.

7. The method of claim 1, wherein the determining a second predicted temperature difference between a chipless area on the circuit board and an environment in which the circuit board is located comprises:

determining the second predicted temperature difference based on a first distance between the target chip and the center of the circuit board, wherein the second predicted temperature difference is in negative correlation with the first distance;

or alternatively, the process may be performed,

and determining the second predicted temperature difference based on a second distance between the target chip and the edge of the circuit board, wherein the second predicted temperature difference is positively correlated with the second distance.

8. The method of any of claims 1-7, wherein the determining, based on the third predicted temperature difference, a simulated heat dissipation parameter associated with the target chip comprises:

determining a cooling mode of the circuit board and a chip junction temperature to calculate a safety coefficient;

determining the temperature of a cooling medium corresponding to the cooling mode;

determining a theoretical junction temperature corresponding to the target chip based on the cooling medium temperature, the third predicted temperature difference, the chip junction temperature calculation safety coefficient, the target power and the hardening thermal resistance of the target chip;

Determining a hot air risk level corresponding to the target chip based on the theoretical junction temperature and the preset junction temperature;

and determining the simulated heat dissipation parameters based on the hot air risk level.

9. A heat dissipation manner determining apparatus, comprising:

a first determining module, configured to determine a first predicted temperature difference between a chip setting area corresponding to a target chip on a circuit board and a chipless area on the circuit board, based on a thermal conductivity coefficient of the circuit board, and a target size and a target power of the target chip included in the circuit board;

a second determining module, configured to determine a second predicted temperature difference between a chipless region on the circuit board and an environment in which the circuit board is located;

a third determining module, configured to determine a third predicted temperature difference between a chip setting area corresponding to the target chip and an environment where the circuit board is located, based on the first predicted temperature difference determined by the first determining module and the second predicted temperature difference determined by the second determining module;

a fourth determining module, configured to determine a simulated heat dissipation parameter associated with the target chip based on the third predicted temperature difference determined by the third determining module;

The simulation module is used for simulating the target chip based on the simulated heat dissipation parameters determined by the fourth determination module by taking the circuit board as a simulation object to obtain a simulated junction temperature corresponding to the target chip;

and a fifth determining module, configured to determine a heat dissipation mode of the circuit board based on the simulated junction temperature obtained by the simulation module and a preset junction temperature corresponding to the target chip.

10. A computer-readable storage medium storing a computer program for executing the heat radiation pattern determination method according to any one of the preceding claims 1 to 8.

11. An electronic device, the electronic device comprising:

a processor;

a memory for storing the processor-executable instructions;

the processor is configured to read the executable instructions from the memory and execute the instructions to implement the heat dissipation mode determining method according to any one of the preceding claims 1-8.