CN114597132A - 芯片封装方法以及芯片封装单元 - Google Patents
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Abstract
一种芯片封装方法以及芯片封装单元。芯片封装方法包含:提供一底材,包含多个指状接点;在底材上设置多个芯片以及围绕各芯片的多个垂直导热结构,其中芯片以倒装芯片方式设置于底材上,并使垂直导热结构分别接触对应的指状接点;提供一封装材料,封装底材、芯片与垂直导热结构;通过一黏着层,将一金属薄膜黏着于封装材料上,以形成一封装结构;以及切割封装结构,以形成多个芯片封装单元,其中各芯片封装单元中包含各芯片、围绕各芯片的对应的多个垂直导热结构、切割后底材以及切割后金属薄膜。
Description
技术领域
本发明涉及一种芯片封装方法,特别涉及一种封装过程中,围绕各芯片的多个垂直导热结构分别热连接底材以及金属薄膜的芯片封装方法。
背景技术
现有技术中,参照图1,其显示美国专利案US 9984992的芯片封装结构,其中包含两芯片,下方芯片CH设置于底材110上,位于多个打线材100以及其他芯片所环绕形成的法拉第笼(Faraday cage)中,其形成一内部电磁保护结构。打线材100设置于底材110上,与底材110中线路相连,为封装材料120所包覆,此为防电磁感扰设计。根据附图,芯片CH散热主要为往下透过底材110,而往上方的散热途径过长,且通过其他芯片,散热效果有限。
参照图2,其显示美国专利案US 9812402的芯片封装结构。类似于图1,图2中打线材100与导电薄膜115环绕形成一法拉第笼,打线材100与底材110中线路相连,以形成防电磁感扰设计。然而,导电薄膜115之外又包含一金属盖130,此金属盖130虽可加强防电磁感扰,但反而造成芯片产生的热被积聚在金属盖130内,其散热效果不佳。
又参照图3,其中显示美国专利案US 7355289的芯片封装结构,其中为加强芯片CH的热传导,在芯片CH上形成多个打线材100,以加强芯片CH散热效果。其中打线材100外露于芯片CH上方的封装材料120外侧。此设计虽考虑散热需求,但打线材100离芯片CH距离远,且打线材100外露于封装结构外的面积小,散热效果有限。
参照图4,其显示美国专利案US 6023096的芯片封装单元,其中位于芯片CH下方的底材110上具有一开孔,开孔下方设有一金属薄膜120,封装材料100充填于芯片CH下方、底材110的开孔、以及金属薄膜120之间。此金属薄膜120具有加强芯片CH散热的功能,但此制程十分复杂。首先,底材110上需有开孔,金属薄膜120设置于未完全硬化的封装材料100上,其金属薄膜120设置有相当难度。
参照图5,其显示美国专利案US 6411507的芯片封装单元,其中通过依形状复杂的金属盖140,其中金属盖140设计为与芯片CH热接触。其中金属盖140的形状复杂,其加工有一定难度,金属盖140定位步骤中如何能正确放到位置,以达到与芯片CH间具有最佳热接触,也是另一技术困扰。此外,因制作技术限制,金属盖140有尺寸的下限,无法用于小尺寸的芯片封装单元。
针对现有技术的缺点,本发明提供一芯片封装单元,此设计具有过程简单、制造容易、成本低、不受尺寸限制的优点。
发明内容
就其中一个观点言,本发明提供了一种芯片封装方法,以解决前述的困扰。此芯片封装方法,包含:提供一底材(base material),包含多个指状接点(finger);在底材上设置多个芯片以及围绕各芯片的多个垂直导热结构,其中芯片以倒装芯片(Flip chip)方式设置于底材上,并垂直导热结构分别设置于对应的指状接点上,并通过指状接点热连接底材,以形成热传路径;提供一封装材料,封装底材、芯片与垂直导热结构;提供一黏着层,并通过此黏着层将一金属薄膜黏着于封装材料上,以形成一封装结构;以及切割封装结构,以形成多个芯片封装单元,其中各芯片封装单元中包含各芯片、围绕各芯片的对应的多个垂直导热结构、切割后底材以及切割后金属薄膜。各芯片封装单元中,芯片所产生的热,可通过切割后底材与切割后金属薄膜传递至芯片封装单元外。垂直导热结构可进一步加强从芯片至切割后底材与切割后金属薄膜的热传效果。此外,本发明的方法中,可应用至各种尺寸的芯片封装单元,无需特制的金属盖,也无需打线(Wiring)就可具有高效率的热传效果。
一实施例中,前述的在底材上设置芯片以及围绕各芯片的垂直导热结构的步骤中,包含:在底材上设置芯片之后、设置围绕各芯片的垂直导热结构;或者,在底材上设置垂直导热结构之后、设置垂直导热结构所围绕的各芯片。用户可依照制程的特性与需要,选择芯片与垂直导热结构的设置顺序。
一实施例中,垂直导热结构接触黏着层或金属薄膜。垂直导热结构可经由黏着层而连接至金属薄膜、或者,垂直导热结构可穿过黏着层而连接至金属薄膜。
另一观点中,本发明提供一种芯片封装单元,其包含:一底材,其包含多个指状接点;一芯片,以倒装芯片方式设置于底材上;多个垂直导热结构,设置于指状接点上并围绕芯片;一封装材料,封装底材、芯片与垂直导热结构;以及一黏着层与一金属薄膜,金属薄膜通过黏着层以黏着于封装材料上。
以下通过具体实施例详加说明,会更容易了解本发明的目的、技术内容、特点及其所达到的效果。
附图说明
图1至图5显示现有技术中芯片封装单元的示意图。
图6A至图6G、图7A至图7C显示根据本发明两实施例的芯片封装方法示意图。
图8、图9显示根据本发明两个实施例的芯片封装单元的示意图。
图中符号说明
100:封装材料
110:底材
110A:切割后底材
115:导电薄膜
120,220:金属薄膜
130,140:金属盖
205:垂直导热结构
210:黏着层
250:芯片封装单元
220A:切割后金属薄膜
CH:芯片
具体实施方式
本发明中的附图均属示意,主要意在表示各电路组成部分间的相互关系,至于形状与尺寸则并未依照比例绘制。
图6A至图6G、图7A至图7C,显示本发明中两个实施例的芯片封装方法,图7A至图7C实施例的后续步骤也请参照图6D至图6G。其中,本发明的芯片封装方法主要包括:包含:提供一底材110(图6A、图7A),底材110包含多个指状接点(Substrate finger),此指状接点可浮接或连接至底材110的其他线路,附图中显示指状接点的侧向剖面图,从底材110垂直方向的视角上可呈现其指状接点的几何特征;在底材110上设置芯片CH以及围绕各芯片CH的多个垂直导热结构205(图6B、图6C、图7B、图7C),其中芯片CH以倒装芯片(Flip chip)方式设置于底材110上(芯片CH的信号接点位于芯片CH与底材110间的空隙中),并垂直导热结构205设置于对应的指状接点上,通过指状接点热连接底材110,以形成芯片CH往下的热传路径;提供一封装材料100,封装底材110、芯片CH与垂直导热结构205,封装材料100填入底材110、芯片CH与垂直导热结构205间的空间(图6D),其中封装材料100可包覆芯片CH的顶面、也可不包覆芯片CH的顶面(图6D中显示不包覆的实施例,图8显示封装材料100包覆芯片CH顶面的实施例);提供一黏着层210,并通过此黏着层210将一金属薄膜220黏着于封装材料100上(图6E),以形成一封装结构,此封装结构包含芯片CH、垂直导热结构205、底材110以及金属薄膜220;以及切割封装结构(图6F、图6G),以形成多个芯片封装单元250,其中各芯片封装单元250中包含各芯片CH、围绕各芯片的对应的多个垂直导热结构205、切割后底材110A以及切割后金属薄膜220A。各芯片封装单元250中,芯片CH所产生的热,可通过切割后底材110A与切割后金属薄膜220A传递至芯片封装单元250外。垂直导热结构205可进一步加强从芯片CH至切割后底材110A与切割后金属薄膜220A的热传效果。此外,本发明的方法中,可应用至各种尺寸的芯片封装单元,无需类似现有技术中特制的金属盖,也无需打线(Wiring)就可产生高效率的热传效果。
前述的实施例附图中,通过单一个芯片封装单元250以举例说明本发明方法的步骤。一实施例中,底材110可为引线框架(Lead frame)。一实施例中,此引线框架可属于一引线框架条(Lead frame stripe)的一部分。一实施例中,底材110可为一印刷电路板(printed circuit board,PCB)。一实施例中,此印刷电路板可属于一大范围电路板其中一部分。
需说明的是,一般而言,引线框架通常用于四方平面无引脚(quad flat noleads,QFN)封装与小型封装(small outline package,SOP);而印刷电路板通常用于球栅阵列(ball grid array,BGA)封装、平面阵列(land grid array,LGA)封装、芯片尺寸封装(chip scale package,CSP),此为本领域技术人员所熟知,在此不予赘述。
本发明的垂直导热结构205,可为金属材质,将芯片CH所产生的热,通过切割后底材110A以及切割后金属薄膜220A,以高效率地传递至各芯片封装单元250外。其中,垂直导热结构205可为不同几何断面的延伸结构,断面例如圆形、椭圆形、方形、三角形、矩形等。
一实施例中,前述的在底材110上设置芯片CH以及围绕各芯片CH的垂直导热结构205的步骤中,可依需要而有不同的步骤。例如,在底材110上设置芯片CH之后、设置围绕各芯片CH的垂直导热结构205(图6B、图6C)。又例如,在底材110上设置垂直导热结构205之后、设置垂直导热结构205所围绕的各芯片CH(图7B、图7C)。用户可依照制程的特性与需要,选择芯片CH与垂直导热结构205的设置顺序。
切割后金属薄膜220A与切割后底材110A的表面积,基本上等同于芯片封装单元250的顶面积与底面积。如此,芯片封装单元250可具有最大散热面积的顶面积与底面积。操作芯片封装单元250中芯片CH时,切割后金属薄膜220A与切割后底材110A具有提升其中散热效率、增加散热面积、大幅降低热集中、达到热分散以及快速传热的效果。前述的黏着层210,可包含具高热传性能的黏着材料。切割后金属薄膜220A通过黏着层210黏固于芯片CH,芯片CH操作过程所产生的热,可通过黏着层210传递至切割后金属薄膜220A,然后传递至芯片封装单元250外。
本发明中,可根据封装材料100是否包覆芯片CH的顶面(顶面为芯片CH中面对底材110的相反侧),来决定黏着层210是否接触芯片CH。例如,当封装材料100包覆芯片CH的顶面,黏着层210不接触芯片CH的顶面,黏着层210接触芯片CH顶面上的封装材料100(图8),芯片封装单元250中芯片CH产生的热经过顶面上的封装材料100、黏着层210而传递至切割后金属薄膜220A。又例如,当封装材料100不包覆芯片CH的顶面,黏着层210接触芯片CH的顶面(图6E),芯片封装单元250中芯片CH产生的热可直接经过黏着层210传递至切割后金属薄膜220A。
一实施例中,前述的切割封装结构,以形成芯片封装单元250的步骤中,包含:烘烤黏着层210以黏固金属薄膜220于芯片CH上,加强金属薄膜220与芯片CH间的黏固状态。又一实施例中,又可在封装结构上进行标印(Marking),定位后续切割的芯片封装单元(图6F),便于标示位置以进行切割。
图6G显示封装结构上切割为多个芯片封装单元250,此切割为已知技术、故不详述内容。
一实施例中,垂直导热结构205接触黏着层210或金属薄膜220。垂直导热结构205可经由黏着层210而连接金属薄膜220;或者垂直导热结构205可穿过黏着层210,而接触至金属薄膜220。用户可依需要,而决定垂直导热结构205是否接触至金属薄膜220。
本发明中的底材110、垂直导热结构205以及金属薄膜220间的热接触,可形成高效率热传的结构,其不同于现有技术中法拉第笼(Faraday cage),本发明主要特征之一为垂直导热结构以及金属薄膜可不接地,也可不连接信号。
参照图6E、图8,本发明提供一种芯片封装单元,其包含:一底材110,其包含多个指状接点;一芯片CH,以倒装芯片(Flip chip)方式设置于底材110上;多个垂直导热结构205,设置于指状接点上并围绕芯片CH;一封装材料100,封装底材110、芯片CH与垂直导热结构205,封装材料100填入底材110、芯片CH与垂直导热结构205间的空间;以及一黏着层210与一金属薄膜220,金属薄膜220通过黏着层210以黏固于封装材料100上。
关于芯片封装单元中各部分的详细内容,请参见前述芯片封装方法中的解释与说明,在此不赘述。
本发明的芯片封装方法或芯片封装单元,可应用于球栅阵列封装(Ball gridarray package,BGA)、平面阵列封装(Land grid array package,LGA)、芯片尺寸封装(Chip scale package,CSP)、四方平面无引脚封装(quad flat no leads,QFN)、或小型封装(small outline package,SOP)。
参照图9,一实施例中,当底材110包含引线框架时,各芯片封装单元250又可设置于一外接电路板上,以连接对外信号。
以上已针对实施例来说明本发明,但以上所述,仅为使本领域技术人员易于了解本发明的内容,并非用来限定本发明的权利范围。在本发明的相同精神下,本领域技术人员可以想到各种等效变化。
Claims (13)
1.一种芯片封装方法,包含:
提供一底材,包含多个指状接点;
在该底材上设置多个芯片以及围绕各该芯片的多个垂直导热结构,该些芯片以倒装芯片方式设置于该底材上,该些垂直导热结构分别设置于对应的该指状接点上;
提供一封装材料,封装该底材、该些芯片与该些垂直导热结构;
通过一黏着层,将一金属薄膜黏着于该封装材料上,以形成一封装结构;以及
切割该封装结构,以形成多个芯片封装单元,其中各该芯片封装单元中包含各该芯片、围绕各该芯片的对应的该些垂直导热结构、切割后该底材以及切割后该金属薄膜。
2.如权利要求1所述的芯片封装方法,其中,该底材包含一引线框架、或一印刷电路板。
3.如权利要求2所述的芯片封装方法,其中,当该底材包含该引线框架,各该芯片封装单元设置于一外接电路板上。
4.如权利要求2所述的芯片封装方法,其中,当该底材包含该引线框架,该引线框架位于一引线框架条中。
5.如权利要求1所述的芯片封装方法,其中,该些垂直导热结构为金属材质。
6.如权利要求1所述的芯片封装方法,其中,前述的在该底材上设置该些芯片以及围绕各该芯片的该些垂直导热结构的步骤中,包含:在该底材上设置该些芯片之后,设置围绕各该芯片的该些垂直导热结构;或者,在该底材上设置该些垂直导热结构之后,设置该些垂直导热结构所围绕的各该芯片。
7.如权利要求1所述的芯片封装方法,其中,切割后该金属薄膜的表面积,基本上等同于该芯片封装单元的顶面积。
8.如权利要求1所述的芯片封装方法,其中,该黏着层接触各该芯片,而将该金属薄膜黏着于该封装材料与各该芯片上。
9.如权利要求1所述的芯片封装方法,其中,前述的切割该封装结构,以形成该些芯片封装单元的步骤中,还包含:在该封装结构上进行标印,以定位后续切割的该些芯片封装单元。
10.如权利要求1所述的芯片封装方法,其中,该些垂直导热结构接触该黏着层或该金属薄膜。
11.一种芯片封装单元,包含:
一底材,其包含多个指状接点;
一芯片,以倒装芯片方式设置于该底材上;
多个垂直导热结构,设置于该些指状接点上并围绕该芯片;
一封装材料,封装该底材、该芯片与该些垂直导热结构;以及
一黏着层与一金属薄膜,该金属薄膜通过该黏着层以黏固于该封装材料上。
12.如权利要求11所述的芯片封装单元,其中,该些垂直导热结构接触该黏着层或该金属薄膜。
13.如权利要求11所述的芯片封装单元,可应用于球栅阵列封装、平面阵列封装、芯片尺寸封装、四方平面无引脚封装、或小型封装。
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