CN114584109A - Method for real-time filtering parallel signals transmitted by high-speed serial interface - Google Patents
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- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
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- H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
Abstract
The invention discloses a method for real-time filtering parallel signals transmitted by a high-speed serial interface, which is characterized in that on the basis of constructing a prototype filter, a D-group filter bank is obtained for filtering D-path low-speed parallel signals after deserializing the high-speed serial interface, and the results of the D-group filter bank are added according to yD‑1[n]、…、y1[n]、y0[n]The sequence of the signals is output in sequence to obtain a signal y [ n ]]. Thus, without memory read, the samples can be processed continuously to obtain a digital signal x [ n ]]The entire filtering processing speed is kept at fsThereby improving the efficiency and real-time performance of the filtering. In addition, the invention has the following advantages: (1) the order of the prototype filter can be designed to be higher, better pass band ripple and stop band ripple indexes can be obtained, and the suppression of the pass band compared with the stop band can also be higher; (2) in the invention, the order of each sub-filter is 1 of the order of the prototype filterD, and the working speed is the original sampling rate fsThe 1/D of the filter can improve the filtering effect, reduce the design complexity and be easier to realize in engineering.
Description
Technical Field
The invention belongs to the technical field of high-speed signal acquisition and processing, and particularly relates to a method for filtering parallel signals transmitted by a high-speed serial interface in real time.
Background
With the rise of the New generation of technologies such as 5G NR (5G New Radio), WIFI6E, etc., the communication data rate is increasing, often needs to reach tens of Gbps or even tens of Gbps, and is far beyond the transmission limit of the traditional CMOS and LVDS interface technologies. At present, the transmission between the high-speed high-precision ADC and the back-end logic processing device can only be realized through a high-speed serial interface of a new interface standard, such as JESD 204B.
JESD204B is a high-speed serial interface whose basic principle is to convert a high data rate input signal into several parallel signals at relatively low speed for easy reception and processing by back-end logic devices. However, due to the high overall data rate, logic devices can generally only transmit parallel signals without difference.
Fig. 1 is a diagram illustrating filtering of parallel signals transmitted in a high-speed serial configuration according to the prior art.
Once algorithmic processing of the serial signal is involved, such as the filtering process shown in FIG. 1, the high speed serial interface converts the incoming analog signal to a digital signal x [ n ]]Then with D parallel signals x0[n],x1[n],…,xD-1[n]Output, the traditional processing mode can only store the parallel signals first, then transmit the signals to the upper computer software and then splice the signals to obtain the digital signals x [ n ]]Filtering to obtain filtered signal y [ n ]]The real-time performance is poor, and only the data with limited length in the memory can be processed, and the digital signal x [ n ] cannot be processed]The efficiency is low for the purpose of continuous processing.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for filtering parallel signals transmitted by a high-speed serial interface in real time so as to carry out real-time filtering processing on digital signals x [ n ] obtained by converting the high-speed serial interface and improve the filtering efficiency and the real-time performance.
In order to achieve the above object, the present invention provides a method for real-time filtering of parallel signals transmitted by a high-speed serial interface, comprising the steps of:
(1) sampling the input analog signal x (t) according to the high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f ofsAnd a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient of h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface;
(2) and taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following conditions:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … …, h [ nD ];
(3) using D sub-filters h [ nD ] in filter bank 0]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x0[n]，x1[n]，…，xD-1[n]Filtering to obtain D filtering results y00[n]、y01[n]、……、y0(D-1)[n]；
y00[n]＝x0[n]*h[Dn]
y01[n]＝x1[n]*h[Dn+1]
……
y0(D-1)[n]＝xD-1[n]*h[Dn+D-1]
Wherein "+" represents a convolution operation;
with D sub-filters h [ nD-D +1] in filter bank 1]、h[nD-D+2]、……、h[nD]Are respectively paired with x0[n]，x1[n]，…，xD-1[n]Filtering to obtain D filtering results y10[n]、y11[n]、……、y1(D-1)[n]：
y10[n]＝x0[n]*h[Dn-1]；
y11[n]＝x1[n]*h[Dn]
……
y1(D-1)[n]＝xD-1[n]*h[Dn+D-2]
And so on, obtaining D sub-filters in the filter banks 2 and … D-1 respectively for x0[n]，x1[n]，…，xD-1[n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1(D-1)0[n]、y11[n]、……、y1(D-1)[n]：
y(D-1)0[n]＝x0[n]*h[Dn-D+1]；
y(D-1)1[n]＝x1[n]*h[Dn-D+2]
……
y(D-1)(D-1)[n]＝xD-1[n]*h[Dn]；
By x0[n]，x1[n]，…，xD-1[n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets xd[n]＝x[nD-d]，d∈[0，D-1]；
(4) And summing the D filtering results of the filter bank 0 to obtain y0[n]：
Summing the D filter results of filter bank 1 to obtain y1[n]：
And so on, the sum of the filter results of the filter banks 2, … D-1 is obtained, wherein the sum of the D filter results of the last filter bank D-1 results in yD-1[n]Comprises the following steps:
(5) summing the filter results of the D filter bank according to yD-1[n]、…、y1[n]、y0[n]The sequence of the digital signal x [ n ] is output in sequence to obtain a filtering output signal y [ n ] of the digital signal x [ n ]]。
The purpose of the invention is realized as follows:
the invention relates to a method for real-time filtering parallel signals transmitted by a high-speed serial interface, which obtains digital signals x [ n ] by sampling input analog signals x (t) through the high-speed serial interface]Sampling rate f ofsAnd the passband cut-off frequency B of the filtering requirement is designed to have a filtering coefficient h [ n ]]The prototype filter is characterized in that on the basis, a D-group filter bank is obtained for filtering the D-path low-speed parallel signals after the high-speed serial interface is deserialized, and the results of the D-group filter bank are added according to yD-1[n]、…、y1[n]、y0[n]The sequence of the signals is output in sequence to obtain a signal y [ n ]]. Thus, the D-path low-speed parallel signal after the high-speed serial interface is deserialized can be filtered in parallel and in real time to obtain the correct digital signal x [ n ]]The filtered output signal. The digital signal x [ n ] can be obtained by continuously processing samples without storing and reading]The entire filtering processing speed is kept at fsThereby improving the efficiency and real-time performance of the filtering.
In addition, the invention has the following advantages:
(1) the order of the prototype filter can be designed to be higher, better pass band ripple and stop band ripple indexes can be obtained, and the suppression of the pass band compared with the stop band can also be higher;
(2) in the invention, the order of each sub-filter is 1/D of that of the prototype filter, and the working rates are the original sampling rates fsThe 1/D can not only improve the filtering effect, but also reduce the design complexity and is easier to realize in engineering.
Drawings
Fig. 1 is a diagram of fig. 1 illustrating filtering of parallel signals transmitted in a high-speed serial configuration according to the prior art.
FIG. 2 is a schematic diagram illustrating an embodiment of a method for real-time filtering of parallel signals transmitted by a high-speed serial interface according to the present invention;
fig. 3 is a flowchart of an embodiment of a method for real-time filtering a parallel signal transmitted by a high-speed serial interface according to the present invention.
Detailed Description
The following description of the embodiments of the present invention is provided in order to better understand the present invention for those skilled in the art with reference to the accompanying drawings. It is to be expressly noted that in the following description, a detailed description of known functions and designs will be omitted when it may obscure the subject matter of the present invention.
Fig. 2 is a schematic diagram illustrating a method for real-time filtering a parallel signal transmitted by a high-speed serial interface according to an embodiment of the present invention.
In this embodiment, as shown in FIG. 2, the analog input signal is represented by x (t), x [ n ]]At a high sampling rate fsThe digital signal, h [ n ], obtained by sampling the input analog signal x (t)]Represents the pair x [ n ]]Filter coefficients for low-pass filtering and called prototype filter, yn]Representing a digital signal x n]The result of the filtering is then y [ n ]]Satisfy y [ n ]]＝x[n]*h[n]。
In this embodiment, the high speed serial interface is JESD204B, using x0[n]，x1[n]，…，xD-1[n]Represents the D-path low-speed parallel signal after deserializing the JESD204B high-speed serial interface and meets the requirement of xd[n]＝x[nD-d]，d∈[0，D-1]Then, the present invention is directed to xd[n]＝x[nD-d]Parallel real-time filtering to obtain correct filtered output signal y [ n ]]。
Fig. 3 is a flow chart of an embodiment of the method for filtering parallel signals transmitted by a high-speed serial interface in real time according to the present invention.
In this embodiment, as shown in fig. 3, the method for filtering parallel signals transmitted by a high-speed serial interface in real time according to the present invention includes the following steps:
step S1: designing a prototype filter based on analog signal sampling and passband cutoff frequencies
Sampling an input analog signal x (t) according to a high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f ofsAnd a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface.
Step S2: construction of a group D filterbank from prototype filters
Taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following conditions:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … … and h [ nD ].
That is, for the ith group, the filter coefficients of the D sub-filters are:
a filter bank i: h [ nD-i ], h [ nD-i +1], … … and h [ nD-i + D-1 ].
Step S3: d-path low-speed parallel signals after high-speed serial interface deserializing are filtered by a D-group filter bank
With D sub-filters h nD in filter bank 0]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x0[n]，x1[n]，…，xD-1[n]Filtering to obtain D filtering results y00[n]、y01[n]、……、y0(D-1)[n]；
y00[n]＝x0[n]*h[Dn]；
y01[n]＝x1[n]*h[Dn+1]
……
y0(D-1)[n]＝xD-1[n]*h[Dn+D-1]
With D sub-filters h [ nD-D +1] in filter bank 1]、h[nD-D+2]、……、h[nD]Respectively to x0[n]，x1[n]，…，xD-1[n]Filtering to obtain D filtering results y10[n]、y11[n]、……、y1(D-1)[n]：
y10[n]＝x0[n]*h[Dn-1]；
y11[n]＝x1[n]*h[Dn]
……
y1(D-1)[n]＝xD-1[n]*h[Dn+D-2]
And so on, obtaining D sub-filters in the filter banks 2 and … D-1 respectively for x0[n]，x1[n]，…，xD-1[n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1(D-1)0[n]、y11[n]、……、y1(D-1)[n]：
y(D-1)0[n]＝x0[n]*h[Dn-D+1]；
y(D-1)1[n]＝x1[n]*h[Dn-D+2]
……
y(D-1)(D-1)[n]＝xD-1[n]*h[Dn]；
By x0[n]，x1[n]，…，xD-1[n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets xd[n]＝x[nD-d]，d∈[0，D-1]。
Specifically, for the ith group, the D filtering results of the D sub-filters are:
yi0[n]＝x0[n]*h[Dn-i]；
yi1[n]＝x1[n]*h[Dn-i+1]
……
yi(D-1)[n]＝xD-1[n]*h[Dn-i+D-1]
specifically, the filtering result for the ith group and the d-th sub-filter is:
yid[n]＝xd[n]*h[Dn-i+d]。
step S4: summing the D filtering results of each group of filter groups
Summing the D filter results of filter bank 0 to obtain y0[n]：
Summing the D filter results of the filter bank 1 to obtain y1[n]：
And so on, the sum of the filter results of the filter banks 2, … D-1 is obtained, wherein the sum of the D filter results of the last filter bank D-1 results in yD-1[n]Comprises the following steps:
in particular, the filtering results for the ith filter bank are summed yi[n]Comprises the following steps:
step S5: adding the filtering results and outputting the filtering results in sequence to obtain a filtering output signal
Summing the results of the D-filterbanks by yD-1[n]、…、y1[n]、y0[n]The sequence of the digital signal x [ n ] is output in sequence to obtain a filtering output signal y [ n ] of the digital signal x [ n ]]。
Summing the filter results for the kth filterbanki[n]Comprises the following steps:
let k be D (n-r) -D, then:
thus, for the filter results of the filter bank D-1, the filter results are summed yD-1[n]Is y [ Dn-D +1]And for the filter results of filter bank 0, the filter results are summed y0[n]Is y [ Dn]Therefore, the output sequence is that the filtering result of the filter bank D-1 is output first, then the filtering result of the filter bank D-2 is output, and finally the filtering results of the filter banks 1 and 0 are output.
In the present embodiment, a parallel signal transmitted by a high-speed serial interface with the model number of 4-lane JESD204B is taken as an example.
The input analog signal is represented as x (t), and four paths of parallel signals are obtained after sampling by an ADC configured by JESD204B standard and 4-lane, namely:
xd[n]＝x[4n-d]
wherein d is 0,1, 2, 3.
X is to bed[n]And carrying out one-to-one corresponding filtering with the filter banks 0-3 and adding filtering results to obtain:
where i is 0,1, …, and D-1 is 0,1, 2, 3, specifically for filter banks 0-3, the sum of each filtering result is:
with y0[n]As objects, the results are:
let k be 4(n-r) -d, then
In a similar way, the method comprises the following steps:
it can be seen that according to y3[n]、y2[n]、y1[n]、y0[n]The four paths of signals are combined in sequence to obtain a complete output signal y [ n ]]The invention realizes obtaining digital signal x [ n ] by sampling]The real-time filtering improves the filtering efficiency and the real-time performance.
Although illustrative embodiments of the present invention have been described above to facilitate the understanding of the present invention by those skilled in the art, it should be understood that the present invention is not limited to the scope of the embodiments, and various changes may be made apparent to those skilled in the art as long as they are within the spirit and scope of the present invention as defined and defined by the appended claims, and all matters of the invention which utilize the inventive concepts are protected.
Claims (1)
1. A method for real-time filtering of parallel signals transmitted by a high-speed serial interface, comprising the steps of:
(1) sampling the input analog signal x (t) according to the high-speed serial interface to obtain a digital signal x [ n ]]Sampling rate f ofsAnd a required passband cut-off frequency B of the filter, designing a filter as a prototype filter with a filter coefficient of h [ n ]]The order is multiple of the number D of parallel signal paths output by the high-speed serial interface;
(2) and taking the number of the filter coefficients h [ n ] of the prototype filter every D points to form D sub-filters, and obtaining D groups of filter banks 0,1, … and D-1 in D number taking modes, wherein the D groups of filter banks satisfy the following conditions:
filter bank 0: h [ nD ], h [ nD +1], … …, h [ nD + D-1]
Filter bank 1: h [ nD-1], h [ nD ], … …, h [ nD + D-2]
……
Filter bank D-1: h [ nD-D +1], h [ nD-D +2], … …, h [ nD ];
(3) with D of filter bank 0Sub-filter h [ nD]、h[nD+1]、……、h[nD+D-1]Are respectively paired with x0[n],x1[n],…,xD-1[n]Filtering to obtain D filtering results y00[n]、y01[n]、……、y0(D-1)[n]；
y00[n]＝x0[n]*h[Dn]
y01[n]＝x1[n]*h[Dn+1]
……
y0(D-1)[n]＝xD-1[n]*h[Dn+D-1]
Wherein "+" represents a convolution operation; with D sub-filters h [ nD-D +1] in filter bank 1]、h[nD-D+2]、……、h[nD]Are respectively paired with x0[n],x1[n],…,xD-1[n]Filtering to obtain D filtering results y10[n]、y11[n]、……、y1(D-1)[n]：
y10[n]＝x0[n]*h[Dn-1]；
y11[n]＝x1[n]*h[Dn]
……
y1(D-1)[n]＝xD-1[n]*h[Dn+D-2]
And so on, obtaining D sub-filters in the filter banks 2 and … D-1 respectively for x0[n],x1[n],…,xD-1[n]Filtering to obtain corresponding filtering results, wherein the last group is D filtering results y of the filter bank D-1(D-1)0[n]、y11[n]、……、y1(D-1)[n]：
y(D-1)0[n]＝x0[n]*h[Dn-D+1]；
y(D-1)1[n]＝x1[n]*h[Dn-D+2]
……
y(D-1)(D-1)[n]＝xD-1[n]*h[Dn]；
By x0[n],x1[n],…,xD-1[n]Represents the D-path low-speed parallel signal after the deserialization of the high-speed serial interface and meets xd[n]＝x[nD-d]，d∈[0,D-1]；
(4) And summing the D filtering results of the filter bank 0 to obtain y0[n]：
Summing the D filter results of the filter bank 1 to obtain y1[n]：
And so on, the sum of the filter results of the filter banks 2, … D-1 is obtained, wherein the sum of the D filter results of the last filter bank D-1 results in yD-1[n]Comprises the following steps:
(5) summing the filter results of the D filter bank according to yD-1[n]、…、y1[n]、y0[n]Sequentially outputting the sequence of the digital signals x [ n ] to obtain the digital signals x [ n ]]Filtered output signal y n]。
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