CN105066990A - High-precision digital filter applicable to strapdown inertial navigation - Google Patents

Abstract

The invention discloses a high-precision acceleration DAC (digital-to-analogue conversion) digital filter applicable to strapdown inertial navigation and relates to the field of data acquisition. The filter comprises a sampling comb filter, an FIR double-extraction compensation filter and an FIR quadruple-extraction compensation filter, wherein the sampling comb filter adopts an efficient down-sampling filter structure put forward by Hogenauer and is used for realizing high-rate underclocking; the FIR double-extraction compensation filter is generated through a fir2 function in the matlab, the function can design a multi-band random response curve phase FIR filter, the filter is mainly used for compensating the pre-stage CIC (cascaded integrator comb) filter with attenuation on band margins and realizing double extraction; the FIR quadruple-extraction compensation filter calculates coefficients of the optimal filter with the Parks-McClellan algorithm, and the filter is low in pass band ripple, narrow in transition band, large in stop band attenuation and high in filter order. The high-precision digital filter meets the strapdown inertial navigation system data sampling requirement.

Description

A kind of high accuracy number wave filter being applicable to strap-down inertial

One, technical field

The present invention relates to a kind of strapdown inertial navigation system data collector, more particularly, adopt there is the FPGA of high-performance and high flexibility, by the design of multiple filter group, and the in addition high-accuracy data acquisition being applicable to strap-down inertial that realizes of complicated algorithm.

Two, background technology

In view of field programmable gate array (FieldProgrammableGateArray, FPGA) there is the feature of flexible design, high integration, high reliability, hardware programming, programme by VHDL hardware description language, it is powerful, flexible design, fast operation, and real-time, so possesses the situations and advantages of process data at high speeds.The mode of FPGA process data is hardware based parallel processing manner, and has great dirigibility, can develop the hardware configuration very pointed to designing requirement.FPGA realizes filtering process be based on storing, computing stores again, the pattern of computing again, this has well catered to the inner structure of FPGA, and namely the storage unit heel configurable logic cell of FPGA adds the form of arithmetic element again.Store for data, there is abundant storage unit FPGA inside.The distributed RAM that its existing fritter is scattered is evenly distributed on FPGA inside, also has the BRAM of bulk, and these abundant storage unit can meet great majority application.The inner quantity of FPGA is maximum, most important in addition is also the abundantest look-up table (LUT) resource, also can be configured to various storage unit flexibly.For data operation, there are the resources such as abundant look-up table, MUX, carry chain, multiplier FPGA inside to complete various simple or complex calculations.And, the supplier of FPGA provide a large amount of, efficiently IP kernel can be used for complicated design of filter.

∑-△ analog to digital converter modulator export highspeed serial data stream need by a series of filtering and extract just can obtain navigational computer can acceleration information.Along with the precision of strapdown inertial navigation system improves constantly, require that ADC not only has high sampling rate, but also there is high resolving power.Owing to being subject to the restriction of the analog input bandwidth of single ADC, this structure is difficult to directly quantize high speed analog signal.So the present invention adopts multistage compound filter group system, can obtain high-resolution analog-to-digital while, also completely eliminate the bottleneck that single ADC analog input bandwidth is inadequate, thus achieve high speed and high-precision analog to digital conversion, the requirement of strapdown inertial navigation system can be met completely.

Three, summary of the invention

1, goal of the invention: the object of this invention is to provide a kind of high speed, the collection of high precision acceleration information that are applicable to strap-down inertial, by the design of multiple filter group, and complicated algorithm in addition, have employed the field programmable gate array of high flexibility, utilize the VHDL hardware description language of its easy programming, in conjunction with the powerful simulation capacity of matlab software, realize the high precision to accelerometer data, high performance collection.

2, technical scheme: for reaching above-mentioned goal of the invention, the present invention includes the following step:

1) design of cic filter

Exponent number due to ∑-△ modulator is quadravalence, therefore selects the progression of cic filter to be Pyatyi.It should be noted that first it will realize all integrators, be then withdrawal device is finally comb filter, and such structure can save R delay device doubly, is also referred to as Hogenauer decimation filter.

2) determination of cic filter bit wide

For ensureing that wave filter can not overflow when normally running, need the determination carrying out bit wide.The gain of CIC decimation filter is, wherein R extracts the factor, and N is the cascade number of cic filter.When using two's complement to represent, then exporting ratio input growth figure place is:

B _grow＝Nlog ₂R(1)

When realizing, all ranks of cic filter being all the bit wide determined according to above formula designs, this ensure that output terminal can not overflow.

3) FIR bis-takes out the design of a compensating filter

In order to obtain smooth amplitude frequency curve in the passband after cic filter and compensation filter cascade, then the amplitude-frequency response of CIC compensating filter passband should be the inverse of formula (2), now get f for sampling after frequency f=f/R, then now amplitude-frequency response such as formula (3).

$\left|H\left(f\right)\right|=|\frac{\sin \left(\mathrm{\π}Rf\right)}{\sin \left(\mathrm{\π}f\right)}{|}^N---\left(2\right)$

$G\left(f\right)={\left|\frac{\sin (\mathrm{\π}f/R)}{\sin \left(\mathrm{\π}f\right)}\right|}^N---\left(3\right)$

When realizing, employing ' fir2 ' function in matlab, calling its " b=fir2 (n, f, m) " form, produce CIC compensating filter.

4) FIR tetra-takes out the design of a wave filter

First the mould of H (k) is determined by performance index and filter type, it is made to meet | H (k) |=| H (N-k) | with H (N/2)=0, then determine the phase angle theta (k) of H (k) according to the type of wave filter and the feature of Frequency Sampling Method, make it meet θ (k)=-θ (N-k).Finally by | H (k) | construct H (k) with θ (k), then obtain shock response through inverse transformation.

Four, accompanying drawing explanation

Fig. 1 is bank of filters one-piece construction;

Fig. 2 is the spectral characteristic of different length single-stage cic filter;

Fig. 3 is 10 rank cic filter spectral characteristics of different cascade number;

Fig. 4 is CIC compensating filter amplitude-frequency response;

Fig. 5 is that FIR4 takes out 1 frequency response curve;

Fig. 6 is the frequency response that bank of filters cascade obtains;

Fig. 7 is for extracting front and back spectral contrast;

Fig. 8 is the frequency response adopting different quantization digit wave filter.

Five, embodiment

The present invention is the data collector based on FPGA, mainly ∑-△ analog to digital converter modulator export highspeed serial data stream need by a series of filtering and extract obtain navigational computer can acceleration information.Below in conjunction with accompanying drawing, realization of the present invention is described in further detail.

As shown in Figure 1, ∑-△ modulator export 8kHz data stream first through sampling rate be the cic filter of 10, this wave filter is the first order, the down-sampled rate of its structure simple realization is comparatively large but comparatively serious at logical band attenuation, therefore adopt CIC compensating filter to be used as the rear class wave filter of cic filter, and realize the extraction of 2 times.The amplitude-frequency response of this grade of wave filter is the inverse of cic filter amplitude-frequency response, and the passband therefore after its cascade is very smooth, reaches the object of compensation.

The characteristic of 1.CIC wave filter

Comb filter can be expressed as:

H(z)＝1-z ^-R(4)

Wherein R represents the exponent number of wave filter, identical with extracting multiple.Fig. 2 shows when R is different, the spectral characteristic of single-stage cic filter.As can be seen from its spectral characteristic, regardless of the size of R, the difference of the relative main lobe of the first secondary lobe amplitude of spectral characteristic is almost fixed, and very little.

For N rank its amplitude-frequency response of cic filter cascade be:

$\left|H\left(f\right)\right|={\left|\frac{sin\left(\mathrm{\π}Rf\right)}{sin\left(\mathrm{\π}f\right)}\right|}^N---\left(5\right)$

Fig. 3 gives the amplitude-frequency response figure when R be 10, N is 1,2,3 and 5.Along with the raising of cascade exponent number, passband edge decay is faster, needs to compensate it.

2.FIR compensating filter characteristic

According to the amplitude versus frequency characte of previous stage cic filter, can show that the amplitude-frequency response of CIC compensating filter passband is:

$G\left(f\right)={\left|\frac{sin(\mathrm{\π}f/R)}{sin\left(\mathrm{\π}f\right)}\right|}^N---\left(6\right)$

Fig. 4 is the amplitude-versus-frequency curve of CIC compensating filter, and design exponent number is 80 rank, and cut-off frequecy of passband is arranged on 100Hz frequency place.Can find out that it has significantly to promote at passband to be used for compensating the decay of cic filter in passband edge.

3.FIR filter characteristic

Observe actual design effect and determine that whether wave filter is optimum, reach best by the frequency response after adjustment parameter makes compensating filter and cic filter cascade, finally draw, wave filter needs 142 rank,-3dB frequency is about 45.5Hz, and the amplitude-frequency response of wave filter as shown in Figure 5.The upper right corner is its partial enlargement curve at passband.

4. bank of filters cascade characteristic

Fig. 6 is the frequency response that bank of filters cascade obtains, and its passband ripple is 0.0078dB, and passband-3dB frequency is 48Hz, and stopband attenuation is better than 150dB, and transitional zone is 35Hz, much smaller than monolithic ADC from band filter 0.6kHz transitional zone.

5. spectrum analysis before and after signal extraction

Bring unnecessary pressure to follow-up data processing compared with high sampling rate, need the frequency reducing digital signal for this reason, namely signal is extracted.Fig. 7 carries out 4 times to former sequence to extract front and back signal spectrum schematic diagram, and the low-pass filter before extraction avoids the aliasing of frequency spectrum.

6. the quantitative analysis of filter coefficient

Digital filter is when using hardware implementing, and filter coefficient is all limited wordlength, and therefore the actual wave filter realized can exist some errors.Determine final filter coefficient length by l-G simulation test in the present invention, and the quantification of analysis filter coefficient affects and corresponding solution qualitatively in system.As shown in Figure 8, adopt the ripple FIR filter such as 142 rank, its passband edge is 0.2 π, and stopband edge is 0.3 π, and stopband attenuation is 160dB.These coefficients are used 32 and 16 bit representations respectively, then uses matlab to carry out analyzing the result obtained.

Claims (4)

1. be applicable to a high precision acceleration digital-to-analog conversion digital filter for strap-down inertial, it is characterized in that, it comprises sampling comb filter, FIR bis-takes out a compensating filter and FIR tetra-takes out a wave filter;

Described sampling comb filter adopts a kind of efficient desampling fir filter structure proposed by Hogenauer to realize, for realizing powerful frequency reducing;

Described FIR bis-is smoked a compensating filter and is produced by ' fir2 ' function in matlab, this function can design any response curve phase FIR filter of many passbands, and this wave filter is mainly used in compensating prime cic filter in the decay of passband edge and realizes the extraction of two times;

Described FIR tetra-takes out a wave filter and adopts Parks-McClellan algorithm to calculate the coefficient of optimal filter, and this wave filter adopts passband ripple low, and excessively band is narrow, and stopband attenuation is large, the wave filter that filter order is high.

2. a kind of high precision acceleration digital-to-analog conversion digital filter being applicable to strap-down inertial according to claim 1, it is characterized in that, sampling comb filter is formed by integrator and comb filter cascade, thus increases the stopband attenuation of the cic filter of single-stage.

3. a kind of high precision acceleration digital-to-analog conversion digital filter being applicable to strap-down inertial according to claim 1, is characterized in that, can obtain smooth amplitude frequency curve in the passband after taking out a compensating filter cascade by cic filter and FIR bis-.

4. based on a kind of high precision acceleration digital-to-analog conversion digital filter being applicable to strap-down inertial according to claim 1, it is characterized in that, FIR tetra-takes out a wave filter and adopts Parks-McClellan algorithm to calculate the coefficient of optimal filter.