CN114578153A - Crystal oscillation detection circuit - Google Patents
Crystal oscillation detection circuit Download PDFInfo
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- CN114578153A CN114578153A CN202210094632.3A CN202210094632A CN114578153A CN 114578153 A CN114578153 A CN 114578153A CN 202210094632 A CN202210094632 A CN 202210094632A CN 114578153 A CN114578153 A CN 114578153A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application provides a crystal oscillator oscillation detection circuit, which comprises a first detection circuit and a second detection circuit, wherein the first detection circuit and the second detection circuit are used for detecting the high-frequency crystal oscillator from oscillation starting to stable; the first detection circuit detects the vibration frequency of the high-frequency crystal oscillator for multiple times by utilizing the RC clock in the first time, and stops detecting when the difference between the two vibration frequencies in any time period in the first time is a minimum value; dividing the frequency of the high-frequency crystal oscillator with the vibration frequency in a stable state; the second detection circuit detects the frequency division vibration frequency of the high-frequency crystal oscillator by using the RC clock for multiple times within the second time, and stops detecting when the difference between the two frequency division vibration frequencies at any time interval within the second time is a minimum value. The above description shows that the RC clock is used for accurately calculating the time point from the oscillation starting to the complete stability of the high-frequency crystal oscillator, the oscillation starting time does not need to be obtained through repeated tests, the resource waste is avoided to the maximum extent, and the dead halt probability of the chip is reduced.
Description
Technical Field
The application relates to the technical field of integrated circuits, in particular to a crystal oscillation detection circuit.
Background
The working period of the chip can be divided into a sleep period and a wake-up period, wherein in the sleep period, the high-frequency crystal oscillator sleeps, and a low-frequency RC oscillator (a frequency selection network consisting of the RC oscillator, a resistor and a capacitor element and used for generating a low-frequency signal) provides a time reference for the sleep period of the chip. In the wake-up period, a high-frequency Crystal Oscillator (XTAL, External Crystal Oscillator) starts to oscillate stably, and provides a time reference with extremely high accuracy for the chip.
However, a certain time is required from the start of oscillation to the stabilization of the high-frequency crystal oscillator, the chip can start to work after the start of oscillation of the high-frequency crystal oscillator is stabilized, and otherwise the chip may be halted. Most of the existing schemes estimate the oscillation starting time (T) through repeated tests, and the chip starts to work after a fixed delay for a period of time. The defect of the solution is that the crystal oscillator has different qualities and needs different time from starting oscillation to being stable, so that the crystal oscillator can reach the stable state before T time possibly, and the working time of a chip is wasted; the crystal oscillator still does not reach a stable state after T time, and the chip starts to work to cause dead halt; and each development board needs to do a lot of tests to estimate the time T.
Disclosure of Invention
The application provides a crystal oscillation detection circuit, which ensures the working stability of a chip to the maximum extent, avoids the chip from causing dead halt,
a crystal oscillation detection circuit comprising: the first detection circuit and the second detection circuit are used for detecting that the high-frequency crystal oscillator is stable from oscillation starting; wherein the content of the first and second substances,
the first detection circuit detects the vibration frequency of the high-frequency crystal oscillator for multiple times by utilizing an RC clock in first time, and stops detecting when the difference between the two vibration frequencies at any time interval in the first time is a minimum value;
the high-frequency crystal oscillator with the vibration frequency in a steady state carries out frequency division;
and the second detection circuit detects the frequency division vibration frequency of the high-frequency crystal oscillator for multiple times within a second time by using the RC clock pair, and stops detecting when the difference between the frequency division vibration frequency of two times within any time period within the second time is a minimum value.
In a specific possible implementation, the first time and the second time are time references of the chip from a sleep period to a wake period.
In a specific possible embodiment, the first detection circuit includes: a low frequency oscillator;
and the low-frequency oscillator is connected with the RC clock and tracks the vibration frequency of the high-frequency crystal oscillator in the first time.
In a specific possible implementation, the low-frequency oscillator is continuously operated during a sleep period of the chip.
In a specific implementation mode, when the vibration frequency of the high-frequency crystal oscillator is not in a steady state in the first time, the chip enters a sleep period, and the chip is powered on to start oscillation again after a third time.
In a specific embodiment, the duration of the third time is extended with the number of times the frequency of the vibration in the first time is not in a steady state.
In a specific implementation mode, the high-frequency crystal oscillator with the oscillation frequency in a steady state carries out frequency division through the chip open phase-locked loop.
In a specific possible embodiment, the second detection circuit includes: a frequency division clock;
and the frequency division clock is connected with the RC clock and tracks the frequency division vibration frequency of the high-frequency crystal oscillator in the second time.
In a specific implementation scheme, when the frequency division vibration frequency of the high-frequency crystal oscillator in the second time is not in a steady state, the frequency division clock is turned off, and the high-frequency crystal oscillator divides again.
In a specific implementation scheme, when the frequency division vibration frequency of the high-frequency crystal oscillator in the second time is not in a steady state for multiple times, the chip enters a sleep period, and the chip is powered on to restart oscillation of the high-frequency crystal oscillator after the third time is spaced.
In the implementation of the application, the starting frequency of the high-frequency crystal oscillator is measured and calculated by utilizing the RC clock, and whether the high-frequency crystal oscillator reaches a stable state is judged; and the phase-locked loop is used for generating high-frequency crystal oscillator frequency division, and the RC clock is used for measuring, calculating and dividing the frequency to perform secondary verification. Therefore, the RC clock is used for accurately calculating the time point from oscillation starting to complete stability of the high-frequency crystal oscillator, the oscillation starting time does not need to be obtained through repeated tests, the resource waste is avoided to the maximum extent, and the dead halt probability of the chip is reduced.
Drawings
Fig. 1 is a schematic diagram illustrating a state of a chip from a sleep period to an awake period according to an embodiment of the present application;
fig. 2 is a schematic diagram of oscillation starting time of a high-frequency crystal oscillator according to an embodiment of the present application;
fig. 3 is a flowchart of a crystal oscillation detection circuit according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clear, the present application will be further described in detail with reference to the accompanying drawings.
First, an application scenario of the crystal oscillator oscillation detection circuit according to the embodiment of the present application is described, where a certain time is required from oscillation start to stabilization of the high-frequency crystal oscillator, and the chip can start to operate only after the oscillation start of the high-frequency crystal oscillator is stabilized, otherwise the chip may be halted. Most of the existing schemes estimate the oscillation starting time (T) through repeated tests, and the chip starts to work after a fixed delay for a period of time. The defect of the solution is that the crystal oscillator has different qualities and needs different time from starting oscillation to being stable, so that the crystal oscillator can reach the stable state before T time possibly, and the working time of a chip is wasted; the crystal oscillator still does not reach a stable state after T time, and the chip starts to work to cause dead halt; and each development board needs to do a lot of tests to estimate the time T. Therefore, in the embodiment of the application, the RC clock is used for accurately calculating the time point from the oscillation starting to the complete stability of the high-frequency crystal oscillator, the oscillation starting time does not need to be obtained through repeated tests, the resource waste is avoided to the maximum extent, and the dead halt probability of the chip is reduced.
First, the embodiment of the application detects the oscillation frequency of the high-frequency crystal oscillator (XTAL) from the starting oscillation state to the steady state by means of the low-frequency oscillator and the RC clock, and detects the counted oscillation frequency of the high-frequency crystal oscillator (XTAL) from the starting oscillation state to the steady state for N times in a first time (T1); the high-frequency crystal oscillator (XTAL) after the vibration frequency is stable is subjected to frequency division. And dividing the vibration frequency by the count of M times after frequency division for the second time (T2) until the vibration frequency is stable, and starting the chip to operate.
Referring to fig. 1 to 2, the crystal oscillator oscillation detection circuit in the present application is configured to calculate a vibration frequency of a high-frequency crystal oscillator (XTAL) by using an RC oscillator that continuously operates, and if the vibration frequency is within a reasonable range, it is determined that the high-frequency crystal oscillator (XTAL) has achieved stable oscillation starting, and a chip starts to operate. And for guaranteeing the reliability of stable oscillation starting of the high-frequency crystal oscillator (XTAL), repeated verification is carried out for many times so as to guarantee the working stability of the chip to the maximum extent.
The single maximum time reference from the sleep period to the wake-up period of the chip is the first time (T1) plus the second time (T2), however, when the high-frequency crystal oscillator (XTAL) is detected to vibrate or divide the oscillation to be abnormal in the first time (T1) or the second time (T2), the first time (T1) and the second time (T2) are repeatedly detected, and the chip is ensured to be operated in a stable state. Meanwhile, after the high-frequency crystal oscillator (XTAL) operates stably in the first time (T1), the frequency division of the high-frequency crystal oscillator (XTAL) is not needed after the detection of the first time (T1) is completed, so that the detection time is shortened. Similarly, after the frequency division vibration frequency of the high-frequency crystal oscillator (XTAL) is stable within the second time (T2), the chip is started without waiting for the completion of the detection within the second time (T2), so that the detection of the rated time caused by different qualities is shortened, and the waste of the starting time is avoided.
Referring to fig. 3, fig. 3 is a flowchart of a crystal oscillation detection circuit according to an embodiment of the present application. The crystal oscillation detection circuit comprises a first detection circuit and a second detection circuit which are used for detecting the oscillation of a high-frequency crystal oscillator (XTAL) from starting to be stable. The first detection circuit detects the vibration frequency of the high-frequency crystal oscillator (XTAL) N times continuously by using the RC clock in a first time (T1), and stops detecting when the vibration frequency of two times in any time period in the first time (T1) differs from a minimum value. The first detection circuit includes: a low frequency oscillator; the low-frequency oscillator continuously works in the dormant period of the chip. The low frequency oscillator is coupled to the RC clock and tracks the frequency of the oscillation of the high frequency crystal oscillator (XTAL) during a first time (T1).
When any two adjacent vibration frequencies of the high-frequency crystal oscillator (XTAL) at the first time (T1) are different from each other by a minimum value, the vibration frequency of the high-frequency crystal oscillator (XTAL) is judged to be stable. However, when the vibration frequency of the high-frequency crystal oscillator (XTAL) is not in a steady state in the first time (T1), the chip enters a sleep period, and after a third time, the chip is powered on to start the high-frequency crystal oscillator (XTAL) again.
As can be seen from the above description, when two adjacent oscillation frequencies in any time interval within the first time (T1) differ by the minimum value, it is determined that the high-frequency crystal oscillator (XTAL) is in the stable operation state, so that the frequency division detection can be performed on the high-frequency crystal oscillator (XTAL) again, and the detection time duration is reduced. However, after the vibration frequency of the high-frequency crystal oscillator (XTAL) in the first time (T1) is detected, the vibration frequency in the first time (T1) is continuously and repeatedly unable to meet the requirement, the start-up of the high-frequency crystal oscillator (XTAL) is considered to be abnormal, at this time, the chip is made to enter the sleep period again, the third time (the duration of the sleep period) is increased along with the continuous abnormal times, and the high-frequency crystal oscillator (XTAL) is made to start up again after the third time is ended.
Continuing with FIG. 3, after the counted oscillation frequency of the high frequency crystal oscillator (XTAL) reaches the requirement during the first time (T1), a second verification is added. And the second verification adopts a high-frequency crystal oscillator (XTAL) which keeps the vibration frequency in a stable state to open a phase-locked loop through a chip to carry out frequency division. The second detection circuit detects the frequency division vibration frequency of the high-frequency crystal oscillator (XTAL) of the RC clock pair for M times continuously in a second time (T2); the second detection circuit includes: a frequency division clock; the divided clock is connected to the RC clock and tracks the divided oscillation frequency of the high frequency crystal oscillator (XTAL) within the second time (T2).
When the frequency of the frequency division vibration of two times in any period within the second time (T2) is different from the minimum value, the second detection circuit stops detecting, and then the frequency division vibration frequency of the high-frequency crystal oscillator (XTAL) is judged to be stable, and the chip starts to start. However, when the frequency division oscillation frequency of the high-frequency crystal oscillator (XTAL) in the second time (T2) is not in a steady state, the frequency division clock is turned off, and the high-frequency crystal oscillator (XTAL) divides again. When the frequency division vibration frequency of the high-frequency crystal oscillator (XTAL) in the second time (T2) is not in a steady state for a plurality of times, the chip enters a dormant period, and the chip is electrified to restart the oscillation of the high-frequency crystal oscillator (XTAL) after a third time.
As can be seen from the above description, when the difference between the two adjacent sub-oscillation frequencies in any time period within the second time (T2) is the minimum value, it is determined that the high-frequency crystal oscillator (XTAL) is in the stable operation state, so that the chip can operate and operate, and the detection time period is reduced. However, after the frequency-division vibration frequency of the high-frequency crystal oscillator (XTAL) in the second time (T2) is detected, the frequency-division vibration frequency in the second time (T2) cannot meet the requirement continuously for multiple times, the frequency-division clock is turned off, the phase-locked loop is restarted after a period of time, and the stability of the new frequency-division clock is determined again. And when the frequency division clocks do not reach the stable value after multiple times of circulating detection, the chip enters the sleep period again, and is awakened again after the third time is over, so that the high-frequency crystal oscillator (XTAL) starts oscillation again.
In the implementation of the application, the starting frequency of the high-frequency crystal oscillator (XTAL) is measured and calculated by using the RC clock, and whether the high-frequency crystal oscillator (XTAL) reaches a stable state is judged; and the phase-locked loop is used for generating high-frequency crystal oscillator (XTAL) frequency division, and the RC clock is used for measuring and calculating the frequency division to perform secondary verification. Therefore, the RC clock is used for accurately calculating the time point from oscillation starting to complete stability of the high-frequency crystal oscillator (XTAL), the oscillation starting time is obtained without repeated tests, the resource waste is avoided to the maximum extent, and the dead halt probability of the chip is reduced.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A crystal oscillation detection circuit is characterized by comprising a first detection circuit and a second detection circuit, wherein the first detection circuit and the second detection circuit are used for detecting that a high-frequency crystal oscillator is stable from oscillation starting; wherein the content of the first and second substances,
the first detection circuit detects the vibration frequency of the high-frequency crystal oscillator for multiple times by utilizing an RC clock in first time, and stops detecting when the difference between the two vibration frequencies at any time interval in the first time is a minimum value;
the high-frequency crystal oscillator with the vibration frequency in a steady state carries out frequency division;
and the second detection circuit detects the frequency division vibration frequency of the high-frequency crystal oscillator for multiple times within a second time by using the RC clock pair, and stops detecting when the difference between the frequency division vibration frequency of two times within any time period within the second time is a minimum value.
2. The crystal oscillator oscillation detection circuit of claim 1, wherein the first time and the second time are time references of the chip from a sleep period to a wake-up period.
3. The crystal oscillation detection circuit of claim 2, wherein the first detection circuit comprises: a low frequency oscillator;
and the low-frequency oscillator is connected with the RC clock and tracks the vibration frequency of the high-frequency crystal oscillator in the first time.
4. The crystal oscillation detection circuit of claim 3 wherein the low frequency oscillator is continuously operated during a sleep period of the chip.
5. The crystal oscillator oscillation detection circuit of claim 4, wherein when the oscillation frequency of the high-frequency crystal oscillator in the first time is not in a steady state, the chip enters a sleep period, and after a third time, the chip is powered on to restart oscillation of the high-frequency crystal oscillator.
6. The crystal oscillation detection circuit of claim 5 wherein the duration of the third time is extended with the number of times the frequency of oscillation within the first time is not in a steady state.
7. The crystal oscillator oscillation detection circuit of claim 5, wherein the high frequency crystal oscillator with the oscillation frequency in a steady state is divided by the chip open phase-locked loop.
8. The crystal oscillation detection circuit of claim 7 wherein the second detection circuit comprises: a frequency division clock;
and the frequency division clock is connected with the RC clock and tracks the frequency division vibration frequency of the high-frequency crystal oscillator in the second time.
9. The crystal oscillator oscillation detection circuit of claim 8, wherein when the frequency division oscillation frequency of the high-frequency crystal oscillator in the second time is not in a steady state, the frequency division clock is turned off, and the high-frequency crystal oscillator divides again.
10. The crystal oscillator oscillation detection circuit of claim 9, wherein when the frequency division oscillation frequency of the high-frequency crystal oscillator in the second time is not in a steady state for a plurality of times, the chip enters a sleep period, and the chip is powered on to restart oscillation of the high-frequency crystal oscillator after the third time interval.
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