CN114552974A - Two-stage DC-DC converter applied to pulse load and control method thereof - Google Patents

Two-stage DC-DC converter applied to pulse load and control method thereof Download PDF

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CN114552974A
CN114552974A CN202111646337.6A CN202111646337A CN114552974A CN 114552974 A CN114552974 A CN 114552974A CN 202111646337 A CN202111646337 A CN 202111646337A CN 114552974 A CN114552974 A CN 114552974A
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stage
converter
voltage
load
transient
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嵇保健
曹瑄
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1588Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load comprising at least one synchronous rectifier element
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a two-stage DC-DC converter applied to a pulse load and a control method thereof.A main circuit topology comprises a preceding stage synchronous rectification TL-Buck converter, a subsequent stage DCX-LLC converter and a pulse load circuit; taking a direct current converter under a pulse load working condition as a starting point, designing a steady-state controller based on voltage decoupling double closed-loop control under the steady-state load working condition, designing a transient state controller based on a duty ratio expansion mode under the pulse load working condition, and outputting a voltage v by a preceding stage of the converterC3And an inductor current iL1The value of the voltage-limiting factor is compared with the preset critical state value to serve as a switching condition of the stability/transient controller, and compared with capacity expressions of energy storage capacitors of pulse load direct current converters with single-stage and two-stage architectures, the power density advantage of the two-stage architecture is demonstrated. The invention can be used togetherThe output voltage of the synchronous rectification TL-Buck and the flying capacitor voltage are controlled in time, and the synchronous rectification TL-Buck has the advantages of high efficiency and power density.

Description

Two-stage DC-DC converter applied to pulse load and control method thereof
Technical Field
The invention relates to the technical field of power electronics, in particular to a two-stage DC-DC converter applied to a pulse load and a control method thereof.
Background
In power supply systems of radars, transmitters and the like, more load devices show pulse characteristics, which have higher requirements on the dynamic response performance of a power supply, and the output voltage over/under-rush amplitude value of the power supply under the working condition of pulse load is required to be as low as possible, and the dynamic recovery time is required to be as short as possible, so that the normal work and safety of a circuit are ensured. The existing pulse load direct current converter has the following three defects:
(1) the control mode of the pulse load direct current converter in the prior art is a single control mode, namely the same control strategy is used when the load is in a steady state and a pulse load transient state, the change rate of the inductive current is consistent, a corresponding controller is not designed aiming at the characteristics of the pulse load, and the dynamic response performance of the pulse load direct current converter is to be optimized;
(2) the pulse load direct current converter of the existing method uses a single-stage architecture, an energy storage capacitor is positioned on the output low-voltage side, and the capacity of the energy storage capacitor is large due to low voltage, and the power density of the pulse load direct current converter needs to be improved;
(3) the pulse load direct current converter of the existing method uses a single-stage architecture, the efficiency of the converter is further reduced along with the expansion of the voltage difference between input voltage and output voltage, and the efficiency of the pulse load direct current converter is to be improved.
Disclosure of Invention
The invention provides a two-stage DC-DC converter applied to a pulse load and a control method thereof, which can realize the voltage stabilization of a middle bus voltage and a flying capacitor voltage under the working condition of a steady-state load, ensure the normal work of the converter and realize the improvement of the inductance current change rate of a preceding-stage converter under the working condition of a transient state of the pulse load; and the over/under impact amplitude of the voltage of the energy storage capacitor is reduced, the dynamic recovery time is shortened, and the dynamic response performance of the converter is optimized.
The technical solution for realizing the purpose of the invention is as follows: a two-stage DC-DC converter applied to a pulse load, wherein a main circuit topology comprises a preceding stage synchronous rectification TL-Buck converter, a subsequent stage DCX-LLC converter and a pulse load circuit, wherein:
the preceding-stage synchronous TL-Buck converter is used for providing power for the intermediate bus energy storage capacitor and providing average power for an output load; sampling v under steady state load conditionC3Control Q1~Q4(ii) a Pulse of lightAccording to v under load conditionC3And iL1Switching the control mode in real time;
the rear-stage DCX-LLC converter is used for electrical isolation and voltage conversion and transmitting the average power and pulse power provided by the front-stage converter and the middle bus energy storage capacitor to an output load;
pulse load circuit by Q giving a predetermined switching frequency and duty cycle7And two power resistors R1、R2Simulating the working conditions of a steady-state load and a pulse load, and simulating the switching of load resistance of an output end between full load and half load to realize the effect of the pulse load;
wherein v isC3For intermediate bus voltage between preceding and succeeding converters, Q1、Q2Being the main power switch, Q, of a preceding converter3、Q4Synchronous rectifier switch for pre-converter iL1For filtering inductor current, Q, of preceding-stage converters7Being pulsed switches, R1For steady-state loading, R2Is a pulsed load.
A control method of a two-stage DC-DC converter applied to a pulse load is based on the two-stage DC-DC converter applied to the pulse load and comprises the following steps:
step 1, according to a voltage decoupling double closed loop control small signal model of TL-Buck, giving an output voltage duty ratio instruction-output voltage transfer function, a flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function;
step 2, sampling vC3And iL1Determining a scheme for switching the controller between the steady-state/transient-state controllers and a control logic of the transient-state controller according to the comparison between the two and the critical state value;
and 3, determining capacity expressions of the energy storage capacitors of the pulse load direct current converters of the single-stage and two-stage architectures, and explaining the power density advantage of the two-stage architecture.
Compared with the prior art, the invention has the following remarkable advantages: (1) the two control schemes can realize the voltage stabilization of the intermediate bus voltage and the flying capacitor voltage under the steady-state load working condition, ensure the normal work of the converter, and can also realize the improvement of the change rate of the pre-stage converter inductance current under the pulse load transient working condition, thereby reducing the over/under-rush amplitude of the energy storage capacitor voltage, shortening the dynamic recovery time of the pre-stage converter, and optimizing the dynamic response performance of the converter; (2) the two-stage DC converter has higher power density compared with a pulse load DC converter with a single-stage architecture; (3) the two-stage type DC converter has higher efficiency compared with a pulse load DC converter with a single-stage type architecture.
Drawings
Fig. 1 shows a main circuit structure of a two-stage DC-DC converter applied to a pulsed load.
FIG. 2 is a block diagram of a two-stage converter voltage decoupling dual closed loop control.
FIG. 3 is a diagram illustrating the effect of closed-loop control on flying capacitor voltage regulation when the input voltage fluctuates.
Fig. 4 is a block diagram of the transient/steady switching control of the two-stage converter.
FIG. 5 is a timing diagram of a critical waveform during the loading of a two-stage converter.
FIG. 6 is a timing diagram of a key waveform during load shedding for a two-stage converter.
FIG. 7 is a graph of the effect of a steady state controller on the dynamic response of a converter at a 1kHz pulse repetition frequency.
FIG. 8 is a graph of the effect of a transient controller on the dynamic response of a converter at a 1kHz pulse repetition frequency.
FIG. 9 is a graph of efficiency versus input voltage for single-stage and two-stage architectures.
Detailed Description
The invention relates to a two-stage DC-DC converter applied to a pulse load and a control method thereof, which take a DC converter under the working condition of the pulse load as a starting point, design a steady-state controller based on voltage decoupling double closed-loop control under the working condition of the steady-state load, design a transient-state controller based on a duty ratio expansion mode under the working condition of the pulse load, and output voltage v of a former-stage converterC3And the inductor current iL1Comparing the obtained result with the preset critical state value to serve as the switching condition of the stable/transient controller, and comparing the single-stage type with the two-stage typeThe capacity expression of the energy storage capacitor of the pulse load DC converter of the structure shows the power density advantage of the two-stage structure.
The invention relates to a two-stage DC-DC converter applied to a pulse load, wherein a main circuit topology comprises a front-stage synchronous rectification TL-Buck converter, a rear-stage DCX-LLC converter and a pulse load circuit, wherein:
the preceding-stage synchronous TL-Buck converter is used for providing power for the intermediate bus energy storage capacitor and providing average power for an output load; sampling v under steady state load conditionC3Control Q1~Q4(ii) a According to v under pulse loadC3And iL1Switching the control mode in real time;
the rear-stage DCX-LLC converter is used for electrical isolation and voltage conversion and transmitting the average power and pulse power provided by the front-stage converter and the middle bus energy storage capacitor to an output load;
pulse load circuit by Q giving a predetermined switching frequency and duty cycle7And two power resistors R1、R2Simulating the working conditions of a steady-state load and a pulse load, and simulating the switching of load resistance of an output end between full load and half load to realize the effect of the pulse load;
wherein v isC3For intermediate bus voltage between preceding and succeeding converters, Q1、Q2Being the main power switch, Q, of a preceding converter3、Q4Synchronous rectifier switch for pre-converter iL1For filtering inductor current, Q, of preceding-stage converters7Being pulsed switches, R1For steady-state loading, R2For pulse loading
As an embodiment, the preceding stage synchronous TL-Buck converter comprises an input voltage source VinInput capacitance C1Front stage flying capacitor C2Front stage main power switch Q1、Q2Synchronous rectifier switch Q of preceding stage3、Q4Front stage filter inductor L1Intermediate bus energy storage capacitor C3(ii) a Said Q1Drain electrode and C1One end is commonly connected to VinOne end, Q1Source and Q2The drains are connected in common to C2One end, Q2Source and Q3The drains are connected in common to L1One end, Q3Source and Q4The drains are connected in common to C2The other end of L1 is connected with C3One end connected to the output of the preceding converter, C3The other end is connected with Q4Source electrode, VinAnother end, C1The other ends are connected to a common ground PGND of the converter; the preceding stage synchronous TL-Buck converter is in a switching period VinBy Q1~Q4Is C2Charging, transmitting a chopper voltage, L, to an output terminal1And C3The LC filter circuit filters the chopped wave voltage into a steady-state DC voltage with ripples and provides the steady-state DC voltage to the capacitor C3And a pre-converter output.
As a specific embodiment, the post-stage DCX-LLC converter comprises a post-stage main power switch tube Q5、Q6Rear stage resonant inductor L2The rear stage resonant capacitor C4The latter stage transformer T1A rear stage rectifier diode D1~D4Post filtering capacitor C5(ii) a Said Q5Drain and pre-converter C3One end is connected to Q5Source and Q6The drains are connected in common to C4One end, Q6Source and L2A common ground PGND, C connected in common to the converters at one end4The other end is connected to T1Primary side end, L2The other end is connected to T1The other end of the primary side, D1Anode and D2Cathodes are connected in common to T1One end of the secondary side, D3Anode and D4Cathodes are connected in common to T1The other end of the secondary side, D1Cathode and D3Cathodes are connected in common to C5One end, D2Anode and D4Anode, C5The other ends are connected in common to another common ground SGND of the converter; the later-stage DCX-LLC converter transfers the energy transferred by the preceding-stage synchronous TL-Buck converter through Q5、Q6The constituent half-bridges form 1/2 gain, then pass through C4、L2And T1Harmonic of primary side compositionThe oscillator circuit forms resonant cavity gain and passes the AC signal through the resonant cavity1~D4The composed rectifier tube then passes through C5And filtering, and transferring energy to the pulse load circuit.
As a specific embodiment, the pulse load circuit comprises the steady-state load R1Pulsed load R2D.pulse switch Q7(ii) a The R is1One terminal and Q7Drain electrodes connected in common to one end of the output terminal of the post-stage converter, Q7Source connected to R2One end, R2The other end and R1The other end of the two-phase current transformer is connected to the other end of the output end of the post-stage converter and the other common ground SGND of the converter in common; q under steady state operating conditions7In the off state, the load in the circuit contains only R1(ii) a Q under pulse load working condition7Switching at a fixed pulse frequency and duty cycle, Q7When the pulse load circuit is in a conducting state, the equivalent resistance of the pulse load circuit is at R1、R1Parallel connection of R2To switch between them.
The invention relates to a control method of a two-stage DC-DC converter applied to a pulse load, which is based on the two-stage DC-DC converter applied to the pulse load and comprises the following steps:
step 1, according to a voltage decoupling double closed loop control small signal model of TL-Buck, giving an output voltage duty ratio instruction-output voltage transfer function, a flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function;
step 2, sampling vC3And iL1Determining a scheme for switching the controller between the steady-state/transient-state controllers and a control logic of the transient-state controller according to the comparison between the two and the critical state value;
and 3, determining capacity expressions of the energy storage capacitors of the pulse load direct current converters of the single-stage and two-stage architectures, and explaining the power density advantage of the two-stage architecture.
As a specific embodiment, in step 1, the TL-Buck output voltage duty ratio command-output voltage transfer function and the flying capacitor voltage duty ratio command-flying capacitor voltage transfer function are respectively:
(1.1) the TL-Buck output voltage duty ratio instruction-output voltage transfer function is as follows:
Figure BDA0003443967010000051
Figure BDA0003443967010000052
the described
Figure BDA0003443967010000053
For the output voltage duty cycle command-output voltage transfer function of the pre-converter,
Figure BDA0003443967010000054
is a closed loop weight of output voltage, VinFor inputting a voltage source, VC3Is the intermediate bus capacitor voltage, M is the impedance coefficient of the preceding stage converter, Zin_DCX-LLCFor the input impedance of the subsequent converter, C3Is an intermediate bus capacitor, RC3Equivalent series resistance, L, of intermediate bus capacitance1Is a pre-stage filter inductor, RL1The equivalent direct current resistance of the preceding stage filter inductor;
(1.2) TL-Buck flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function:
Figure BDA0003443967010000055
the above-mentioned
Figure BDA0003443967010000056
Is a flying capacitor voltage transfer function of a flying capacitor voltage duty ratio instruction of a preceding converter,
Figure BDA0003443967010000057
is a flying capacitor voltage closed loop weight, C2Is the flying capacitor voltage of the front stage, VsIs a comparatorThe sawtooth amplitude at the inverting input.
As a specific embodiment, the scheme that the controller switches between the steady-state/transient-state controllers in step 2, and the control logic of the transient-state controller are respectively:
(2.1) scheme of switching between steady state/transient state controllers:
in the load loading process, the starting and ending conditions of the transient control of the duty cycle extension mode are respectively as follows:
Figure BDA0003443967010000058
the described
Figure BDA0003443967010000059
Intermediate bus voltage threshold value, i, for loading transient control startL1For the preceding converter inductor current, IL1_overThe current is the critical value of the inductance current of the pre-stage converter after the transient control is loaded; after the loading starting condition is met, switching the control mode of the converter from a voltage decoupling double closed-loop control mode to a transient state control mode based on a duty ratio expansion mode; after the loading ending condition is met, the control mode of the converter is switched from a transient state control mode based on a duty ratio expansion mode to a voltage decoupling double closed-loop control mode;
secondly, in the process of unloading the load, the starting and ending conditions of the transient state control of the duty cycle expansion mode are respectively as follows:
Figure BDA0003443967010000061
the above-mentioned
Figure BDA0003443967010000062
Intermediate bus voltage threshold for onset of unloading transient control, IL1_underThe current is the critical value of the inductance current of the pre-stage converter after the unloading transient control is finished; after the unloading starting condition is met, the control mode of the converter is controlled by voltage decoupling double closed loopsThe mode is switched to a transient state control mode based on a duty ratio expansion mode; after the unloading ending condition is met, switching the control mode of the converter from a transient state control mode based on a duty ratio expansion mode to a voltage decoupling double closed-loop control mode;
(2.2) control logic of the transient controller:
in the load loading process, when the converter meets the loading starting condition and the loading ending condition, under the transient control based on the space ratio expansion mode, Q1~Q4The switching logic of (1) is:
Figure BDA0003443967010000063
the above-mentioned
Figure BDA0003443967010000065
For loading Q in transient control process1The logic signal is driven in such a manner that,
Figure BDA0003443967010000066
for loading Q in transient control process2The logic signal is driven in such a manner that,
Figure BDA0003443967010000067
for loading Q in transient control process3The logic signal is driven in such a manner that,
Figure BDA0003443967010000068
for loading Q in transient process4Driving a logic signal; during the loading transient control, Q1~Q4The switching logic of is Q1And Q2Remains on, Q3And Q4Keeping turning off;
secondly, in the process of unloading the load, when the converter meets the unloading starting condition and does not meet the unloading ending condition, under the transient control based on the space ratio expansion mode, Q1~Q4The switching logic of (1) is:
Figure BDA0003443967010000064
the above-mentioned
Figure BDA0003443967010000069
For unloading Q during a transient1The logic signal is driven in such a manner that,
Figure BDA00034439670100000611
for unloading Q in transient control process2The logic signal is driven in such a manner that,
Figure BDA00034439670100000610
for unloading Q in transient control process3The logic signal is driven in such a manner that,
Figure BDA00034439670100000612
for unloading Q in transient control process4A drive logic signal; during the unloading transient, Q1~Q4The switching logic of (1) is namely Q1And Q2Remains off, Q3And Q4Remain on.
As a specific embodiment, in step 3, the capacity expressions of the energy storage capacitor of the pulse load dc converter with the single-stage and two-stage architectures, and the capacity comparison between the two types are respectively:
(3.1) single-stage and two-stage architecture energy storage capacitor capacity expressions:
Figure BDA0003443967010000071
Figure BDA0003443967010000072
said C iso_sAn output end energy storage capacitor with a single-stage structure, Io_peakIs the peak value of the load current, DpulseFor pulse duty ratio, Δ voTo output voltage ripple, fpulseFor pulse repetition frequency, VoIs an outputThe voltage is applied to the surface of the substrate,
Figure BDA0003443967010000074
is the intermediate bus voltage ripple;
(3.2) comparing the capacity of the energy storage capacitor of the pulse load direct current converter with a two-stage structure and a single-stage structure:
Figure BDA0003443967010000073
k is the capacity ratio of the energy storage capacitor of the pulse load direct current converter with the two-stage architecture and the single-stage architecture, and n is the transformer transformation ratio of the post-stage converter with the two-stage architecture.
The two-stage DC-DC converter topology applied to the pulse load has the following three advantages:
(1) according to the control mode of the two-stage DC-DC converter applied to the pulse load, when the load is in a stable state, voltage decoupling double closed-loop control is used, the intermediate bus voltage and the flying capacitor voltage of the pre-stage converter are simultaneously stabilized, when the load is in a pulse load transient state, transient state control based on a duty ratio expansion mode is used, the change rate of the inductor current of the pre-stage converter is improved, the reduction of the over/under impulse amplitude value of the voltage of the energy storage capacitor and the shortening of the dynamic recovery time are realized, and the dynamic response performance of the pulse load DC converter is optimized;
(2) according to the two-stage architecture of the two-stage DC-DC converter applied to the pulse load, the energy storage capacitor is positioned on the high-voltage side of the middle bus, and the voltage is higher than the output end, so that the capacity of the energy storage capacitor is smaller, and the power density of the pulse load DC converter is improved;
(3) the two-stage architecture of the two-stage DC-DC converter applied to the pulse load improves the efficiency of the pulse load DC converter in power supply systems of radars, transmitters and the like with input and output voltage difference of ten times or more.
The invention will be further described with reference to the following drawings and specific embodiments.
Examples
The invention provides a solution for optimizing the dynamic response performance of a converter for a direct current converter under the working condition of pulse load, a steady-state controller can simultaneously control the output voltage of a synchronous rectification TL (three level) -Buck and the flying capacitor voltage, a transient controller can reduce the fluctuation amplitude of the voltage of an energy storage capacitor and accelerate the dynamic recovery time of the voltage when the pulse load acts, and a design scheme of the synchronous rectification TL-Buck + DCX (DC transformer) -LLC steady-state and transient controller is provided. In an application occasion with a large voltage difference between input voltage and output voltage, the two-stage architecture has better efficiency advantage than a single-stage architecture, and meanwhile, the two-stage architecture transfers the energy storage capacitor to the high-voltage side of the middle bus, so that the two-stage architecture has better power density advantage.
Fig. 1 shows a main circuit structure of a two-stage DC-DC converter applied to a pulse load, wherein a main circuit topology mainly comprises a preceding stage synchronous rectification TL-Buck converter, a subsequent stage DCX-LLC converter and a pulse load circuit. The preceding converter adopts synchronous rectification technology to improve the overall efficiency, and the intermediate bus voltage v is sampled under the steady-state working conditionC3To control the switch tube Q1~Q4According to v under transient condition of pulse loadC3、iL1And switching the steady/transient controller to improve the change rate of the inductor current of the pre-stage converter so as to optimize the dynamic response performance of the converter. The rear-stage converter adopts open-loop fixed-frequency control, the intermediate bus voltage is raised through the transformer transformation ratio to reduce the capacity of the energy storage capacitor and realize the improvement of power density, the DCX-LLC converter selected by the rear stage can realize soft switching in the full range, and the overall efficiency can be improved. In a pulse load circuit, Q is supplied7The preset pulse repetition frequency and pulse duty ratio, and the load resistance of the output end is at R1,R1//R2And the effect of pulse load is realized.
According to the TL-Buck S-domain equivalent model, the obtained TL-Buck output voltage duty ratio instruction-output voltage transfer function is as follows:
Figure BDA0003443967010000081
Figure BDA0003443967010000082
the above-mentioned
Figure BDA0003443967010000083
For the output voltage duty cycle command-output voltage transfer function of the pre-converter,
Figure BDA0003443967010000084
is the closed loop weight value of the output voltage, VinFor inputting a voltage source, VC3Is the intermediate bus capacitor voltage, M is the impedance coefficient of the preceding stage converter, Zin_DCX-LLCFor the input impedance of the subsequent converter, C3Is an intermediate bus capacitor, RC3Equivalent series resistance, L, of intermediate bus capacitance1Is a pre-stage filter inductor, RL1Is the equivalent direct current resistance of the pre-stage filter inductor.
According to the TL-Buck S-domain equivalent model, obtaining the TL-Buck flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function:
Figure BDA0003443967010000091
the above-mentioned
Figure BDA0003443967010000092
Is a flying capacitor voltage transfer function of a flying capacitor voltage duty ratio instruction of a preceding converter,
Figure BDA0003443967010000093
is a flying capacitor voltage closed loop weight, C2Is the pre-stage flying capacitor voltage, VsThe sawtooth amplitude is the inverting input of the comparator.
The block diagram of the voltage decoupling double closed loop control small signal model of the TL-Buck converter comprising an output voltage closed loop and a flying capacitor voltage closed loop is shown in FIG. 2. After voltage decoupling double closed-loop control, the intermediate bus voltage v can be realizedC3Stabilization ofAnd can also realize flying capacitor voltage vC2And (4) stabilizing. As shown in FIG. 3, when the input voltage changes from 300V to 320V, the flying capacitor voltage controlled by the closed loop can be stabilized at V within 1msinAnd/2, 160V, while the flying capacitor voltage without closed-loop control needs 40ms to stabilize at 160V.
In the load loading process, the starting condition and the ending condition of the transient state control of the duty ratio expansion mode are respectively as follows:
Figure BDA0003443967010000094
the above-mentioned
Figure BDA0003443967010000095
Intermediate bus voltage threshold value, i, for loading transient control startL1For the preceding converter inductor current, IL1_overThe critical value of the inductance current of the pre-stage converter for loading the transient control end.
In the load unloading process, the starting condition and the ending condition of the transient control of the duty ratio expansion mode are respectively as follows:
Figure BDA0003443967010000096
the above-mentioned
Figure BDA0003443967010000097
Intermediate bus voltage threshold for onset of unloading transient control, IL1_underThe critical value of the inductance current of the fore converter for the end of unloading transient control. Fig. 4 shows a block diagram of the steady/transient switching control during the loading and unloading process of the load, wherein the intermediate bus voltage v is applied during the loading or unloading processC3Determines the moment when the controller is switched from a steady state to a transient state, and the inductance current i of the pre-converterL1Determines the moment at which the controller switches from transient to steady state. Accordingly, Q of the pre-converter during load loading or unloading1~Q4The specific switching logic of (a) is as follows.
In the load loading process, when the converter meets the loading starting condition and does not meet the loading ending condition, under the transient control based on the duty ratio expansion mode, Q1~Q4The switching logic of (c) has:
Figure BDA0003443967010000098
the described
Figure BDA0003443967010000105
For loading Q in transient control process1The logic signal is driven in such a manner that,
Figure BDA0003443967010000108
for loading Q in transient control process2The logic signal is driven in such a manner that,
Figure BDA0003443967010000107
for loading Q in transient control process3The logic signal is driven in such a manner that,
Figure BDA0003443967010000106
for loading Q in transient process4The logic signal is driven.
In the load unloading process, when the converter meets the unloading starting condition and does not meet the unloading ending condition, under the transient control based on the duty ratio expansion mode, Q1~Q4The switching logic of (1) is:
Figure BDA0003443967010000101
the above-mentioned
Figure BDA0003443967010000109
For unloading Q in the transient process1The logic signal is driven in such a manner that,
Figure BDA00034439670100001011
for unloading transient controlIn-process Q2The logic signal is driven in such a manner that,
Figure BDA00034439670100001010
for unloading Q in transient control process3The logic signal is driven in such a manner that,
Figure BDA00034439670100001012
for unloading Q in transient control process4The logic signal is driven.
FIGS. 5 and 6 show the key waveform timing of the two-stage converter during loading and unloading, respectively, including the intermediate bus voltage vC3Inductor current i of preceding converterL1And Q1~Q4Of the switching logic signal, during load loading, Q1、Q2On, Q3、Q4Turning off; during the unloading of the load, Q1、Q2Off, Q3、Q4And conducting. FIGS. 7 and 8 show the v after adding transient control and the v after adding transient control, respectivelyC3And iL1In the simulation waveform under the pulse load transient working condition, the change rate of the inductive current is improved when the load is loaded, the voltage drop amplitude of the middle bus is reduced, and the dynamic recovery time is shortened; the overshoot amplitude of the intermediate bus voltage is reduced when the load is unloaded, and the dynamic recovery time is shortened.
The two-stage architecture also has a greater advantage in power density than the single-stage architecture. The capacity expression of the single-stage and two-stage architecture energy storage capacitor is as follows:
Figure BDA0003443967010000102
Figure BDA0003443967010000103
said C iso_sAn output end energy storage capacitor with a single-stage structure, Io_peakIs the peak value of the load current, DpulseFor pulse duty ratio, Δ voTo be transportedOutput voltage ripple, fpulseFor pulse repetition frequency, VoIn order to output the voltage, the voltage is,
Figure BDA0003443967010000104
is the intermediate bus voltage ripple.
Capacity comparison of energy storage capacitors of pulse load direct-current converters with two-stage and single-stage architectures:
Figure BDA0003443967010000111
k is the capacity ratio of the energy storage capacitor of the pulse load direct current converter with the two-stage architecture and the single-stage architecture, and n is the transformer transformation ratio of the post-stage converter with the two-stage architecture. The rear-stage converter adopts DCX-LLC (direct current-liquid level control) which is characterized in that the rear stage has fixed input and output voltage gain n, and compared with the energy storage capacitor expressions of single-stage and two-stage architectures, the energy storage capacitor capacity of the two-stage architecture can be set to be 1/n of that of the single-stage architecture2And the power density of the converter is greatly improved.
Finally, as can be seen from fig. 9, when the input voltage is close to the output voltage, the duty ratio of the pulse load dc converter with the single-stage architecture is large, and the efficiency is higher than that with the two-stage architecture. With the increase of the input voltage, the efficiency of the single-stage architecture is gradually surpassed by the two-stage architecture due to the limited duty ratio, and is lower than the two-stage architecture. In the application occasions of pulse load power supply power sources with large input and output voltage difference, such as radars, transmitters and the like, the two-stage type framework has higher efficiency, and the preceding stage TL-Buck is more suitable for the application occasions of high input voltage than other Buck family converters.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.

Claims (8)

1. A two-stage DC-DC converter applied to pulse load is characterized in that a main circuit topology comprises a preceding stage synchronous rectification TL-Buck converter, a subsequent stage DCX-LLC converter and a pulse load circuit, wherein:
the preceding-stage synchronous TL-Buck converter is used for providing power for the intermediate bus energy storage capacitor and providing average power for an output load; sampling v under steady state load conditionC3Control Q1~Q4(ii) a According to v under pulse loadC3And iL1Switching control modes in real time;
the rear-stage DCX-LLC converter is used for electrical isolation and voltage conversion and transmitting the average power and pulse power provided by the front-stage converter and the middle bus energy storage capacitor to an output load;
pulse load circuit by Q giving a predetermined switching frequency and duty cycle7And two power resistors R1、R2Simulating the working conditions of a steady-state load and a pulse load, and simulating the switching of load resistance of an output end between full load and half load to realize the effect of the pulse load;
wherein v isC3For intermediate bus voltage between preceding and succeeding converters, Q1、Q2Being main power switches, Q, of preceding converters3、Q4Synchronous rectifier switch for pre-converter iL1For filtering inductor current, Q, of preceding-stage converters7Being pulsed switches, R1For steady-state loading, R2Is a pulsed load.
2. The two-stage DC-DC converter for pulsed loads according to claim 1, wherein the pre-stage synchronous TL-Buck converter comprises an input voltage source VinInput capacitance C1Front stage flying capacitor C2Front stage main power switch Q1、Q2Synchronous rectifier switch Q of preceding stage3、Q4Front stage filter inductor L1Middle bus energy storage capacitor C3(ii) a Said Q1Drain electrode and C1One end is commonly connected to VinOne end, Q1Source and Q2The drains are connected in common to C2One end, Q2Source and Q3Common drain electrodeIs connected to L1One end, Q3Source and Q4The drains are connected in common to C2The other end of L1 and C3One end connected to the output of the preceding converter, C3The other end is connected with Q4Source electrode, VinThe other end, C1The other ends are connected to a common ground PGND of the converter;
the preceding stage synchronous TL-Buck converter is in a switching period VinBy Q1~Q4Is C2Charging, transmitting a chopped voltage, L, to the output terminal1And C3The LC filter circuit filters the chopped wave voltage into a steady-state direct-current voltage with ripples and provides the steady-state direct-current voltage to the capacitor C3And a pre-converter output.
3. The two-stage DC-DC converter for pulsed loads according to claim 1, wherein the post-stage DCX-LLC converter comprises a post-stage main power switch Q5、Q6Rear stage resonant inductor L2The rear stage resonant capacitor C4The latter stage transformer T1A rear stage rectifier diode D1~D4Post-stage filter capacitor C5(ii) a Said Q5Drain and pre-converter C3One end is connected to Q5Source and Q6The drains are connected in common to C4One terminal, Q6Source and L2A common ground PGND, C connected in common to the converters at one end4The other end is connected to T1Primary side end, L2The other end is connected to T1The other end of the primary side, D1Anode and D2Cathodes are connected in common to T1One end of the secondary side, D3Anode and D4Cathodes are connected in common to T1The other end of the secondary side, D1Cathode and D3Cathodes are connected in common to C5One end, D2Anode and D4Anode, C5The other ends are connected in common to another common ground SGND of the converter;
the later-stage DCX-LLC converter transfers the energy transferred by the preceding-stage synchronous TL-Buck converter through Q5、Q6Formation of half-bridge of composition 1/2 increaseThen through C4、L2And T1The resonant circuit composed of the primary side forms resonant cavity gain, and an alternating current signal passes through the resonant cavity gain1~D4The composed rectifier tube then passes through C5And filtering, and transferring energy to the pulse load circuit.
4. The two-stage DC-DC converter for pulsed loads according to claim 1, wherein the pulsed load circuit comprises the steady-state load R1Pulsed load R2D.pulse switch Q7(ii) a The R is1One terminal and Q7Drain electrodes connected in common to one end of the output terminal of the post-stage converter, Q7Source connected to R2One end, R2The other end and R1The other end is connected to the other end of the output end of the post-stage converter and the other common ground SGND of the converter in common;
q under steady state operating conditions7In the off state, the load in the circuit contains only R1(ii) a Q under pulse load condition7Switching at a fixed pulse frequency and duty cycle, Q7When the pulse load circuit is in a conducting state, the equivalent resistance of the pulse load circuit is at R1、R1Parallel connection R2To switch between.
5. A control method of a two-stage DC-DC converter applied to a pulsed load, characterized in that the two-stage DC-DC converter applied to the pulsed load according to any one of claims 1 to 4 comprises the following steps:
step 1, according to a voltage decoupling double closed loop control small signal model of TL-Buck, giving an output voltage duty ratio instruction-output voltage transfer function, a flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function;
step 2, sampling vC3And iL1Determining a scheme for switching the controller between the steady-state/transient-state controllers and control logic of the transient-state controller according to the comparison between the two and the critical state value;
and 3, determining capacity expressions of the energy storage capacitors of the pulse load direct current converters of the single-stage and two-stage architectures, and explaining the power density advantage of the two-stage architecture.
6. The method for controlling the two-stage DC-DC converter applied to the pulsed load according to claim 5, wherein the TL-Buck output voltage duty ratio command-output voltage transfer function and the flying capacitor voltage duty ratio command-flying capacitor voltage transfer function in step 1 are respectively as follows:
(1.1) the TL-Buck output voltage duty ratio instruction-output voltage transfer function is as follows:
Figure FDA0003443966000000021
Figure FDA0003443966000000031
the above-mentioned
Figure FDA0003443966000000032
For the output voltage duty cycle command-output voltage transfer function of the pre-converter,
Figure FDA0003443966000000033
is a closed loop weight of output voltage, VinFor inputting a voltage source, VC3Is the intermediate bus capacitor voltage, M is the impedance coefficient of the preceding stage converter, Zin_DCX-LLCFor the input impedance of the subsequent converter, C3Is an intermediate bus capacitor, RC3Is the equivalent series resistance, L, of the intermediate bus capacitor1Is a pre-stage filter inductor, RL1The equivalent direct current resistance of the front-stage filter inductor;
(1.2) TL-Buck flying capacitor voltage duty ratio instruction-flying capacitor voltage transfer function:
Figure FDA0003443966000000034
the above-mentioned
Figure FDA0003443966000000035
Is a flying capacitor voltage transfer function of a flying capacitor voltage duty ratio instruction of a preceding converter,
Figure FDA0003443966000000036
is a flying capacitor voltage closed loop weight, C2Is the pre-stage flying capacitor voltage, VsThe sawtooth amplitude is the inverting input of the comparator.
7. The method as claimed in claim 5, wherein the scheme for switching the controller between the steady-state/transient-state controllers in step 2 and the control logic of the transient-state controller are respectively:
(2.1) scheme of switching between steady state/transient state controllers:
in the load loading process, the starting and ending conditions of the transient control of the duty cycle extension mode are respectively as follows:
Figure FDA0003443966000000037
the above-mentioned
Figure FDA0003443966000000038
Intermediate bus voltage threshold value, i, for loading transient control startL1For pre-converter inductor current, IL1_overThe current is the critical value of the inductance current of the pre-stage converter after the transient control is loaded; after the loading starting condition is met, the control mode of the converter is switched from a voltage decoupling double closed-loop control mode to a transient control mode based on a duty cycle expansion mode; after the loading ending condition is met, switching the control mode of the converter from a transient state control mode based on a duty ratio expansion mode to a voltage decoupling double closed loop control mode;
secondly, in the process of unloading the load, the starting and ending conditions of the transient state control of the duty cycle expansion mode are respectively as follows:
Figure FDA0003443966000000039
the above-mentioned
Figure FDA0003443966000000041
Intermediate bus voltage threshold for onset of unloading transient control, IL1_underThe critical value of the inductance current of the preceding-stage converter after the unloading transient control is finished; after the unloading starting condition is met, switching the control mode of the converter from a voltage decoupling double closed-loop control mode to a transient control mode based on a duty cycle expansion mode; after the unloading ending condition is met, switching the control mode of the converter from a transient state control mode based on a duty ratio expansion mode to a voltage decoupling double closed loop control mode;
(2.2) control logic of the transient controller:
during the load loading process, when the converter meets the loading starting condition and the loading ending condition, under the transient control based on the duty ratio expansion mode, Q1~Q4The switching logic of (1) is:
Figure FDA0003443966000000042
the above-mentioned
Figure FDA0003443966000000043
For loading Q in transient control process1The logic signal is driven in such a manner that,
Figure FDA0003443966000000044
for loading Q in transient control process2The logic signal is driven in such a manner that,
Figure FDA0003443966000000045
to loadQ in transient control process3The logic signal is driven in such a manner that,
Figure FDA0003443966000000046
for loading Q in the transient process4Driving a logic signal; during the loading transient control process, Q1~Q4The switching logic of is Q1And Q2Remains on, Q3And Q4Keeping turning off;
q under transient control based on duty cycle expansion mode when the converter meets the unloading starting condition and the unloading ending condition in the load unloading process1~Q4The switching logic of (c) has:
Figure FDA0003443966000000047
the above-mentioned
Figure FDA0003443966000000048
For unloading Q in the transient process1The logic signal is driven in such a manner that,
Figure FDA0003443966000000049
for unloading Q in transient control process2The logic signal is driven in such a manner that,
Figure FDA00034439660000000410
for unloading Q in transient control process3The logic signal is driven in such a manner that,
Figure FDA00034439660000000411
for unloading Q in transient control process4Driving a logic signal; during the unloading transient, Q1~Q4The switching logic of is Q1And Q2Remains off, Q3And Q4Remain on.
8. The method as claimed in claim 5, wherein the capacity expressions of the storage capacitor of the pulse load DC converter with the single-stage and two-stage architectures in step 3 are respectively as follows:
(3.1) single-stage and two-stage architecture energy storage capacitor capacity expressions:
Figure FDA0003443966000000051
Figure FDA0003443966000000052
said C iso_sAn output end energy storage capacitor with a single-stage structure, Io_peakIs the peak value of the load current, DpulseFor pulse duty cycle,. DELTA.voTo output voltage ripple, fpulseFor pulse repetition frequency, VoIn order to output the voltage, it is,
Figure FDA0003443966000000053
is the intermediate bus voltage ripple;
(3.2) comparing the capacity of the energy storage capacitor of the pulse load direct current converter with a two-stage structure and a single-stage structure:
Figure FDA0003443966000000054
k is the capacity ratio of the energy storage capacitor of the pulse load direct current converter with the two-stage architecture and the single-stage architecture, and n is the transformer transformation ratio of the post-stage converter with the two-stage architecture.
CN202111646337.6A 2021-12-29 2021-12-29 Two-stage DC-DC converter applied to pulse load and control method thereof Pending CN114552974A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115833547A (en) * 2023-02-08 2023-03-21 西南交通大学 Decoupling circuit suitable for wide-band pulse load and control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115833547A (en) * 2023-02-08 2023-03-21 西南交通大学 Decoupling circuit suitable for wide-band pulse load and control method

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