CN114526824A - Infrared imaging system based on Zynq SOPC framework - Google Patents
Infrared imaging system based on Zynq SOPC framework Download PDFInfo
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- 238000003331 infrared imaging Methods 0.000 title claims abstract description 34
- ATHVAWFAEPLPPQ-VRDBWYNSSA-N 1-stearoyl-2-oleoyl-sn-glycero-3-phosphocholine Chemical compound CCCCCCCCCCCCCCCCCC(=O)OC[C@H](COP([O-])(=O)OCC[N+](C)(C)C)OC(=O)CCCCCCC\C=C/CCCCCCCC ATHVAWFAEPLPPQ-VRDBWYNSSA-N 0.000 title claims abstract description 22
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- G—PHYSICS
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01V—GEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
- G01V8/00—Prospecting or detecting by optical means
- G01V8/10—Detecting, e.g. by using light barriers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G06T1/00—General purpose image data processing
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- H04N5/00—Details of television systems
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- H04N5/33—Transforming infrared radiation
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
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- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
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Abstract
The invention relates to an infrared imaging system based on Zynq SOPC framework, which comprises an optical lens in front of an infrared detector, an infrared detector driving circuit, a detector temperature control circuit, a signal conditioning circuit, an analog-to-digital conversion circuit, a digital signal processing unit and a digital signal output circuit. The infrared detector driving circuit comprises a detector power supply and a detector digital signal drive, the signal conditioning circuit receives an analog video signal of the detector through a single-end-to-differential operational amplifier and amplifies the analog signal, and the signal processing unit combines data into an infrared image to complete a necessary image processing algorithm. The processing circuit has sufficient data bandwidth, can be adapted to a long-wave infrared focal plane detector, is easy to realize serial processing and has strong expansibility; the ARM hard core embedded in the FPGA can reduce the circuit complexity of a multiprocessor adopted in a traditional infrared imaging circuit.
Description
Technical Field
The application belongs to the technical field of photoelectric imaging and image processing, and particularly relates to an infrared detector driving and imaging processing technology and system.
Background
Infrared imaging techniques use the difference in infrared radiation between a target and a background to form an image scene. Compared with radar and visible light imaging, the method has the advantages of hiding capability, anti-interference capability, working time and the like. Therefore, the infrared system can easily detect objects with infrared radiation at night and in bad weather conditions such as rain and fog. The infrared imaging technology enables human eyes to exceed self vision limit, enhances the capability of obtaining information of human beings, is widely applied to military and civil fields of missile, night vision, monitoring, automatic driving, public security, temperature measurement, industrial monitoring and the like, and has wide service requirements and application prospects in the future.
The traditional infrared imaging driving circuit adopts a single FPGA framework or a double framework of an FPGA + ARM discrete chip. The algorithm of the single FPGA framework scheme is difficult to transplant and the serial processing is difficult to realize; the FPGA and ARM separated chip scheme has the main difficulty and performance bottleneck of the system in realizing data transmission among a plurality of chips, so that the finished product has the characteristics of high cost, large power consumption, overlarge volume, lack of competitiveness and the like.
Therefore, how to solve the above problem becomes an important concern.
Disclosure of Invention
The application aims to provide an infrared imaging system based on a Zynq SOPC framework, which can simplify an infrared imaging processing circuit and improve the imaging quality of the circuit.
The specific technical scheme is as follows: an infrared imaging system based on Zynq SOPC framework comprises a digital signal processing unit, wherein the digital signal processing unit connects an infrared detector with a signal conditioning circuit, an analog-to-digital conversion circuit, a TEC temperature control circuit and a digital signal output circuit; the digital signal processing unit is connected with the infrared detector through a detector driving clock; the digital signal processing unit is connected with the analog-to-digital conversion circuit through an A/D conversion chip; the digital signal processing unit provides digital driving signals for the infrared detector and the A/D conversion chip, and two paths of analog signals output by the infrared detector are converted into 14bit digital signals through the signal conditioning circuit and the analog-to-digital conversion circuit and then input into the digital signal processing unit; the TEC temperature control circuit stably adjusts the temperature of the infrared detector and maintains the detector to work near a set value; the detector driving clock comprises a detector power supply and a detector digital signal drive; a temperature sensor on the detector provides voltage Vtemp of analog output, and the voltage Vtemp is fed back to the TEC control chip to regulate the temperature of the detector; the signal conditioning circuit and the analog-to-digital conversion circuit are mainly operational amplifiers and A/D conversion chips; the signal conditioning circuit is a circuit of two single-end to differential operational amplifiers, the single-end to differential operational amplifier receives two analog video signals output by the detector and amplifies the analog signals to convert the analog signals into analog differential signals, and the signal processing unit combines data into an infrared image to complete a necessary image processing algorithm; the signal processing units are PL (programmable logic) and PS (programmable System) inside Zynq.
Further, the digital signal processing unit is a Zynq SOPC main control chip, the main control chip controls DDR3 to cache image data, and then non-uniformity correction, dynamic compression and image enhancement algorithm processing are completed inside the main control chip.
Further, the digital signal processing unit is connected with the display device through a digital signal output circuit.
Furthermore, the infrared detector is matched with an optical lens to form an infrared imaging system, the digital signal transmission circuit transmits infrared video to a remote PC end through a network through a UDP protocol of gigabit Ethernet for real-time display, and functions of screenshot, video recording and log query on the PC are achieved.
Furthermore, the temperature control circuit of the detector is an MAX1978 digital temperature control circuit, constant temperature is provided for the detector, and temperature drift of the detector is reduced.
Further, the analog-to-digital conversion circuit converts the analog differential signal into a digital signal.
Further, the infrared detector driving circuit is driven by a detector power supply and a clock.
Further, the digital signal transmission circuit is used for transmitting Ethernet signals.
The application discloses infrared imaging system based on Zynq SOPC framework, its infrared imaging processing circuit uses Zynq SOPC as main control chip framework. The processing circuit comprises an infrared detector with the resolution of 640 multiplied by 512, a detector driving circuit, a detector temperature control circuit, a signal conditioning circuit, an analog-to-digital conversion circuit, a digital signal processing unit and a digital signal output circuit. The detector driving circuit provides power and clock drive for the detector; the temperature control circuit of the detector is an MAX1978 digital temperature control circuit, and provides a constant temperature environment for the detector; the signal conditioning circuit is a two-way single-end-to-differential operational amplifier circuit and converts two analog video signals output by the detector into two analog differential signals; the analog-to-digital conversion circuit converts the analog differential signal into a digital signal; the digital signal processing unit is Zynq, a main control chip controls DDR3 to cache image data, and then algorithm processing such as non-uniformity correction, dynamic compression, image enhancement and the like is completed inside the digital signal processing unit; the infrared detector is matched with an optical lens to form an infrared imaging system; the digital signal output circuit transmits the infrared video to a remote PC end through a network through a UDP protocol of gigabit Ethernet for real-time display, and can realize the functions of software on the PC, such as screenshot support, video recording support, log query support and the like. The Zynq chip integrated by the invention combines the advantages of two architectures, and realizes convenient serial control of an ARM processor and strong bandwidth and driving capability of an FPGA. Experiments show that the processing circuit has sufficient data bandwidth, can be adapted to a long-wave infrared focal plane detector, is easy to realize serial processing and has strong expansibility; the ARM hardmac embedded in the FPGA can reduce the circuit complexity of a multi-processor adopted in a traditional infrared imaging circuit.
Drawings
FIG. 1 is a block diagram of an exemplary embodiment of an infrared imaging system processing circuit;
FIG. 2 is a signal flow diagram of a processing circuit of an infrared imaging system according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a TEC temperature control circuit in a processing circuit according to an embodiment of the present application;
FIG. 4 shows a signal conditioning circuit and an analog-to-digital conversion circuit in a processing circuit according to an embodiment of the present application;
FIG. 5 is a block diagram of PL design in a processing circuit according to an embodiment of the present application;
FIG. 6 is a block diagram of a PS design in a processing circuit according to an embodiment of the present application;
fig. 7 shows an imaging effect of the infrared imaging system according to the embodiment of the present application: (a) no thermal target; (b) there is a thermal target.
Detailed Description
An infrared imaging system based on Zynq SOPC framework comprises a digital signal processing unit, wherein the digital signal processing unit connects an infrared detector with a signal conditioning circuit, an analog-to-digital conversion circuit, a TEC temperature control circuit and a digital signal output circuit; the digital signal processing unit is connected with the infrared detector through a detector driving clock; the digital signal processing unit is connected with the analog-to-digital conversion circuit through an A/D conversion chip; the digital signal processing unit provides digital driving signals for the infrared detector and the A/D conversion chip, and two paths of analog signals output by the infrared detector are converted into 14bit digital signals through the signal conditioning circuit and the analog-to-digital conversion circuit and then input into the digital signal processing unit; the TEC temperature control circuit stably adjusts the temperature of the infrared detector and maintains the detector to work near a set value; the detector driving clock comprises a detector power supply and a detector digital signal drive; a temperature sensor on the detector provides voltage Vtemp of analog output, and the voltage Vtemp is fed back to the TEC control chip to regulate the temperature of the detector; the signal conditioning circuit and the analog-to-digital conversion circuit are mainly operational amplifiers and A/D conversion chips; the signal conditioning circuit isTwo routesSingle-ended to differential operational amplifier circuit, the single-ended to differential operational amplifier receiving the output of the detectorTwo routesAnalog video signal, and amplifying and converting the analog signal into analog differential signalThe processing unit combines the data into an infrared image to complete a necessary image processing algorithm; the signal processing units are PL (programmable logic) and PS (programmable System) inside Zynq.
Further, the digital signal processing unit is a Zynq SOPC main control chip, the main control chip controls DDR3 to cache image data, and then non-uniformity correction, dynamic compression and image enhancement algorithm processing are completed inside the main control chip. The digital signal processing unit is connected with the display device through the digital signal output circuit. The infrared detector is matched with an optical lens to form an infrared imaging system, the digital signal transmission circuit transmits infrared video to a remote PC end through a network through a UDP protocol of gigabit Ethernet to be displayed in real time, and functions of screenshot, video recording and log query on the PC are achieved. The temperature control circuit of the detector is an MAX1978 digital temperature control circuit, provides constant temperature for the detector and reduces the temperature drift of the detector. The signal conditioning circuit is a two-path circuit and converts two paths of analog video signals output by the detector into two paths of analog differential signals. The analog-to-digital conversion circuit converts the analog differential signal into a digital signal. The infrared detector driving circuit is driven by a detector power supply and a clock. Further, the digital signal transmission circuit is used for transmitting Ethernet signals.
Examples
The invention provides an infrared imaging system based on Zynq SOPC framework. The detector used by the system is a northern wide micro-technology limited model GWIR 0318X2A uncooled infrared detector with the resolution of 640
512 pixel size 17
m; the focal length of the infrared lens is 42mm, F1; the Zynq SOPC architecture chip is Xilinx Zynq-7000. The technical solution of the present invention will be described in detail below with reference to the accompanying drawings so as to be more easily understood and appreciated.
As mentioned in the background, most mature high-speed processing platforms in the prior art are single FPGA architecture schemes and FPGA + ARM discrete chip schemes, so that the finished product has the characteristics of difficult algorithm transplantation, difficult realization of serial processing, high cost, large power consumption, overlarge volume, lack of competitiveness, and the like.
In view of this, the present application provides an infrared imaging system based on the Zynq SOPC architecture. Fig. 1 is a schematic structural diagram of an infrared imaging processing circuit provided in an embodiment of the present application, including an infrared detector driving circuit, a detector temperature control circuit, a signal conditioning circuit, an analog-to-digital conversion circuit, a digital signal processing unit, and a digital signal output circuit.
The core of the infrared imaging system processing circuit is Zynq, and the chip connects the analog-to-digital conversion circuit, the TEC temperature control circuit, the digital signal output circuit and the display device together. Zynq provides digital driving signals for the infrared detector and the A/D conversion chip, two paths of analog signals output by the infrared detector are converted into 14bit digital signals through the signal conditioning circuit and the analog-to-digital conversion circuit and then input into Zynq, and the TEC temperature control circuit enables the TEC temperature control circuit to stably adjust the temperature of the infrared detector and maintains the detector to work near a set value. The integrated Zynq chip combines the advantages of two architectures, and realizes convenient serial control of an ARM processor and strong bandwidth and driving capability of an FPGA.
Schematic diagram of TEC temperature control circuit referring to fig. 3, a temperature sensor on the detector provides an analog output voltage Vtemp, which can be fed back to the TEC control chip to adjust the temperature of the detector. On-chip FETs and thermal control loops minimize external circuit components and maintain high efficiency, selectable 500kHz/1MHz switching frequency and unique ripple cancellation scheme optimizes component size and efficiency, allowing bipolar output in the range of + -3A. The AD 5691D/A conversion chip outputs different voltages through an I2c protocol setting register to set the temperature of MAX1978, the ADS1115 collects temperature information through an I2c protocol, and finally the MAX1978 adjusts the current of TEC + and TEC-to set the temperature of the thermoelectric refrigerator and maintain the temperature of the thermoelectric refrigerator stable.
Referring to fig. 4, the signal conditioning circuit and the analog-to-digital conversion circuit are mainly operational amplifier and a/D conversion chip, and specifically, the AD9240 may obtain different analog input ranges by using different circuit designs. Because the signal output of the uncooled infrared focal plane array is not matched with the input signal of the AD9240 conversion circuit, the signal preprocessing is needed, the signal preprocessing circuit is an AD8139 high-speed differential amplifier of ADI company, the operational amplifier converts the 0.5-4.5V single-end analog output signal output by the infrared detector into the differential input signal of the AD9240, and then the AD9240 is accessed into the Zynq chip by the digital input signal output by 14bit in parallel.
PL design schematic diagram referring to FIG. 5, according to the timing sequence and circuit design of the uncooled infrared focal plane, a data processing framework is designed, the system stores the non-uniform coefficients in the SD card, and since the read-out speed of the SD card memory chip is not fast enough, when the system is started, the PS needs to read out the data in the SD card, and then the data is refreshed into the DDR through the DCache so as to have a sufficient speed to be written into the infrared sensor. The infrared detector divides the odd lines and the even lines of the image data into two paths for output, so the GWIR _ Video _ In module is used for combining the odd lines and the even lines of the two paths of signals, and the odd lines and the even lines are buffered into the DDR3 after being buffered by the FIFO module so as to be convenient for subsequent algorithm processing. The GWIR _ Video _ In module adopts two protocols of AXI4-Lite and AXI4-Stream In the interaction of the chip, the AXI4-Lite can control the reset of the module and whether OCC data is written, the AXI4-Stream is used for transmitting a large amount of combined image data, the bandwidth of the system can be integrally improved through the protocol, the FIFO function is mainly used for processing the problem of data transmission between the two modules at different clock frequencies, and as the speed of data processing is improved, the DMA has a higher clock frequency than the GWIR _ Video _ In during working, so that the caching and algorithm of pictures can be quickly completed In the DDR3, and the real-time performance of the system is improved.
PS design as shown in fig. 6, PS is composed of two ARM cores of Cortex-a9 architecture, and in the present system, PS is mainly used to initialize the modules used by PL, and since the infrared sensor also has the requirement of power-up and power-down sequence, the control of this part is completed by ARM core. The correction coefficient used by the sensor is read out from the SD card by the ARM and is cached in the DDR3 through the DCache, the image data output by the sensor is cached in the DDR3 after being optimized by the PL, and the ARM is responsible for reading out the data to complete more complex algorithm processing and sending the image data to a client by adopting a UDP protocol. The ARM also opens serial port communication and is used for responding to special system commands and the requirement of external interruption, obtaining important information printed by the serial port for users and feeding back whether the commands are successfully sent.
The application provides an infrared detection system, including infrared detector and above-mentioned any embodiment infrared imaging processing circuit.
The system adopts an infrared camera scheme based on Zynq, the scheme comprehensively considers short boards existing in the existing infrared camera scheme, Zynq is used in system design to solve the problems that multiple chips are difficult to integrate and a single FPGA chip is not easy to process in serial, the system has the advantages of high-speed data processing and flexible system function expansion by reasonably using resources in the chips, an infrared focal plane detector in the scheme is 640 multiplied by 512, the whole system can also support higher resolution, and the imaging effect is shown in figure 7. There are no objects with large temperature difference in the imaging scene of fig. 7(a), but objects with similar temperature in the image can still be resolved; fig. 7(b) photographs an infrared image of a human body, and human body features can be clearly seen.
Claims (8)
1. An infrared imaging system based on Zynq SOPC framework is characterized by comprising a digital signal processing unit, wherein the digital signal processing unit connects an infrared detector with a signal conditioning circuit, an analog-to-digital conversion circuit, a TEC temperature control circuit and a digital signal output circuit;
the digital signal processing unit is connected with the infrared detector through a detector driving clock;
the digital signal processing unit is connected with the analog-to-digital conversion circuit through an A/D conversion chip;
the digital signal processing unit provides digital driving signals for the infrared detector and the A/D conversion chip, and two paths of analog signals output by the infrared detector are converted into 14bit digital signals through the signal conditioning circuit and the analog-to-digital conversion circuit and then input into the digital signal processing unit;
the TEC temperature control circuit stably adjusts the temperature of the infrared detector and maintains the detector to work near a set value;
the detector driving clock comprises a detector power supply and a detector digital signal drive;
a temperature sensor on the detector provides voltage Vtemp of analog output, and the voltage Vtemp is fed back to the TEC control chip to regulate the temperature of the detector;
the signal conditioning circuit and the analog-to-digital conversion circuit are mainly operational amplifiers and A/D conversion chips;
the signal conditioning circuit is a circuit of two single-end to differential operational amplifiers, the single-end to differential operational amplifier receives two analog video signals output by the detector and amplifies the analog signals to convert the analog signals into analog differential signals, and the signal processing unit combines data into an infrared image to complete a necessary image processing algorithm;
the signal processing unit is PL and PS inside Zynq;
the infrared detector is matched with an optical lens to form an infrared imaging system.
2. The infrared imaging system based on the Zynq SOPC framework as claimed in claim 1, wherein the digital signal processing unit is a Zynq SOPC main control chip, the main control chip controls DDR3 to buffer image data, and then nonuniformity correction, dynamic compression and image enhancement algorithm processing are completed internally.
3. The infrared imaging system based on the Zynq SOPC architecture as claimed in claim 1, wherein the digital signal processing unit is connected with the display device through a digital signal output circuit.
4. The infrared imaging system based on Zynq SOPC architecture as claimed in claim 1, wherein the digital signal transmission circuit transmits the infrared video to the remote PC end through the network for real-time display through UDP protocol of gigabit Ethernet, so as to realize the functions of screenshot, video recording and log query on the PC.
5. The infrared imaging system based on the Zynq SOPC framework as claimed in claim 1, wherein the detector temperature control circuit is a MAX1978 digital temperature control circuit, and is used for providing constant temperature for the detector and reducing the temperature of the detector.
6. The infrared imaging system based on the Zynq SOPC architecture of claim 1, wherein the analog-to-digital conversion circuit converts analog differential signals to digital signals.
7. The infrared imaging system based on the Zynq SOPC architecture as claimed in claim 1, wherein the infrared detector driving circuit is a detector power supply and a clock driver.
8. The infrared imaging system based on the Zynq SOPC architecture as claimed in claim 1, wherein the digital signal transmission circuit is Ethernet signal transmission.
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