CN114501849A - Improved design method of integrated circuit packaging bonding pad and bonding pad packaging library - Google Patents
Improved design method of integrated circuit packaging bonding pad and bonding pad packaging library Download PDFInfo
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- CN114501849A CN114501849A CN202210395131.9A CN202210395131A CN114501849A CN 114501849 A CN114501849 A CN 114501849A CN 202210395131 A CN202210395131 A CN 202210395131A CN 114501849 A CN114501849 A CN 114501849A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
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Abstract
The invention discloses an improved design method of a bonding pad of an integrated circuit package and a bonding pad package library, which comprises the following steps: conventionally designing an integrated circuit package pad; calculating the net distance between the two bonding pads to obtain the width and the distance of the routing of the intermediate signal line of the two bonding pads; determining a bonding pad with the width and the spacing not meeting the requirements; carrying out improved design on the bonding pad which does not meet the requirements to obtain the bonding pad with the improved design; and replacing the pads which do not meet the requirements with the pads of the improved design, and finishing the improved design. The invention can perfectly solve the problem of process difficulty brought to manufacturing and processing by conventional design, and ensure that the line width and the space of the routing between the bonding pads can meet the conventional process capability requirement of PCB manufacturers; the integral area of the bonding pad is ensured to be consistent with that of the original bonding pad, and the reliability of the integrated circuit assembly is ensured; the invention provides a new solution for solving the problems of increased difficulty in pad production and manufacturing, overlong period and overhigh cost.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to improvement of an integrated circuit packaging pad on a printed circuit board, and specifically relates to an improved design method of the integrated circuit packaging pad and a pad packaging library.
Background
With the development of the electronic industry, the density of integrated circuits is higher and higher, the pitch of pins is smaller and smaller, the requirements on the manufacturing process are higher and higher, and the development cost of electronic design is increased. The conventional design has the problem of bringing process difficulty to manufacturing and processing, and meanwhile, the reliability requirement of the integrated circuit assembly process is difficult to ensure.
Aiming at the design of the FLASH chip integrated circuit bonding pad packaged by BGA at present, a signal line needs to be arranged between two bonding pads, and meanwhile, the signal line is ensured not to be short-circuited to the two bonding pads, but the conventional design bonding pad has the defect that the distance between the bonding pads is too small, and for the bonding pads of certain specific points, the line width and the distance greatly exceed the conventional process capability (4 mil in the conventional process, 3.5mil in the difficulty process and below 3.5mil in the special process) of a plate making factory, so that the difficulty of the production and the manufacture of the bonding pads of the specific points is greatly increased, and meanwhile, the reliability requirement of products is difficult to ensure. The difficulty of the production and processing of the whole board card is greatly increased only due to the line width problem of the bonding pads at a plurality of specific points, and the production period and the cost are increased.
For PCB engineers, if the PCB can be optimized in the design stage, the difficult process of production and manufacture is avoided, the time and money cost of production and manufacture can be greatly reduced, and the yield of products and the products on the market in advance are improved.
Under the background, the invention hopes that the problem of process difficulty brought to manufacturing and processing by conventional design can be perfectly solved by using the pad improved design method, meanwhile, the reliability requirement of the integrated circuit assembly process can be ensured, the whole period is shortened for the development of electronic products, the cost is reduced, and the invention has great significance.
Disclosure of Invention
In order to solve the above problems, an object of the present invention is to provide an improved design method for integrated circuit package pads and a pad package library, so as to solve the problem of process difficulty caused by conventional design for manufacturing and processing, shorten the overall period for development of electronic products, reduce the cost, and meet the actual production requirements.
The above purpose can be realized by the following technical scheme:
according to one aspect of the present invention, the present invention provides, first, an improved design method for pads of an integrated circuit package, comprising the steps of:
step 1, designing an integrated circuit packaging bonding pad conventionally;
step 2, calculating the net spacing between the two bonding pads to obtain the wiring width and the spacing of the intermediate signal lines of the two bonding pads;
step 3, determining the bonding pads with the routing width and the spacing not meeting the requirements;
step 4, carrying out improved design on the bonding pad which does not meet the requirements to obtain the bonding pad with the improved design;
and 5, replacing the pads which do not meet the requirements with the pads of the improved design, and finishing the improved design.
Optionally, in step 1, the pads of the integrated circuit package are all circular pads with a diameter of 9.84 mil.
Optionally, step 2 includes:
the design software found that the center-to-center distance between the two pads was 19.69 mils, then the net spacing between the two pads was: 19.69mil-9.84mil =9.85 mil;
the trace width and the pitch of the signal line between the two pads are obtained to be 9.85mil/3=3.28 mil.
Optionally, in step 3, the pads with the trace width and the pitch smaller than 4mil are pads that do not meet the requirement.
Optionally, the step 4 improved design includes a width design of the pad, specifically:
(1) calculating the area S1 of the original design single circular pad:
in the formula, d is the diameter of the originally designed circular bonding pad;
(2) and obtaining the net spacing between the two pads to be not less than 4 mils and 3=12 mils by using the width and the spacing of the traces to be not less than 4 mils, and further obtaining the width b of the improved design pad to meet the requirement that b is not more than 19.69 mils-12 mils, namely that b is not more than 7.69 mils, and taking the integer value b =7 mils.
Optionally, in step 4, the improved design pad is designed to be a track type pad, and the improved design further includes a length design of the track type pad, specifically:
(1) calculating the improved design single pad area S2:
obtained by transformation of the above formula
Wherein a is the length of the bonding pad, b is the width of the bonding pad, and is the diameter of the semicircle at the two ends, L is the length of the middle rectangle, and L = a-b;
(2) to improve the area of the design pad to be equal to the area of the original design pad, i.e., S2= S1=76.05mil, the length a of the pad obtained from b =7 mil:
optionally, the method further includes a pad routing width and pitch rechecking step:
(1) the net spacing between the two pads of the improved design was calculated as: 19.69mil-b =19.69mil-7mil =12.69 mil;
(2) the width and the spacing of the two pad routing lines are calculated and improved to be 12.69mil/3=4.23mil, and the process requirements are met.
In accordance with another aspect of the present invention, there is also provided a library of integrated circuit package pads designed by an improved design methodology for integrated circuit package pads.
Optionally, the ic pad packaging library includes circular pads of conventional design and racetrack-type pads of improved design, and the area of a single racetrack-type pad is equal to that of a single circular pad, and the width and the pitch of the traces between two adjacent racetrack-type pads are not less than 4 mils.
Optionally, the length of the runway type pad is 12.4 mils, and the width of the runway type pad is 7 mils.
Compared with the prior art, the invention has the following beneficial effects: the invention provides an improved design method of an integrated circuit packaging pad and a pad packaging library, which can perfectly solve the problem that the conventional design brings process difficulty to manufacturing and processing, and specifically, the improved design method comprises the following steps:
(1) the width of each bonding pad is reduced, the distance between the two bonding pads is increased, and the line width and the distance of the routing between the bonding pads can meet the conventional process capability requirements of PCB manufacturers;
(2) the length of the bonding pad is lengthened, so that the integral area of the bonding pad is ensured to be consistent with that of the original bonding pad, and the reliability of the integrated circuit assembly is ensured;
(3) the invention can solve the problems of production and manufacturing difficulty increase, overlong period and overhigh cost of small-spacing devices caused by undersized spacing of the bonding pads, and provides a new design solution.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It should be apparent that the drawings in the following description are merely exemplary, and that other embodiments can be derived from the drawings provided by those of ordinary skill in the art without inventive effort.
The structures, ratios, sizes, and the like shown in the present specification are only used for matching with the contents disclosed in the specification, so that those skilled in the art can understand and read the present invention, and do not limit the conditions for implementing the present invention, so that the present invention has no technical significance, and any structural modifications, changes in the ratio relationship, or adjustments of the sizes, without affecting the functions and purposes of the present invention, shall fall within the scope covered by the technical contents disclosed in the present invention.
FIG. 1 is a process flow diagram of an exemplary embodiment of the present invention;
FIG. 2 is a schematic diagram of a normally designed integrated circuit package in accordance with an exemplary embodiment of the present invention;
FIG. 3 is a (enlarged) view of a pad of a normal design of an exemplary embodiment of the present invention;
FIG. 4 is a pad gap schematic of a normal design of an exemplary embodiment of the present invention;
FIG. 5 is a diagram of a pad fan-out via trace of a normal design in accordance with an exemplary embodiment of the present invention;
FIG. 6 is a schematic diagram of a modified design pad in accordance with an exemplary embodiment of the present invention;
FIG. 7 is a schematic diagram of the structure and dimensions of an improved design pad of an exemplary embodiment of the present invention;
FIG. 8 is a pitch diagram of an improved design pad of an exemplary embodiment of the present invention;
fig. 9 is a diagram of an improved design pad packaging library in accordance with an exemplary embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the present invention is described in further detail below with reference to the embodiments and the accompanying drawings. The exemplary embodiments and descriptions of the present invention are provided to explain the present invention, but not to limit the present invention.
In the description of the present invention, it is to be understood that the terms "comprises/comprising," "consists of … …," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a product, apparatus, process, or method that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such product, apparatus, process, or method if desired. Without further limitation, an element defined by the phrases "comprising/including … …," "consisting of … …," or "comprising" does not exclude the presence of other like elements in a product, device, process, or method that comprises the element.
It should also be understood that the terms "mounted," "connected," "fixed," and the like are intended to be broadly construed, and may include, for example, a fixed connection, a removable connection, or an integral part; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Unless otherwise expressly stated or limited, the terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," "center," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing and simplifying the present invention, and do not indicate or imply that the referenced device, component, or structure must have a particular orientation, be constructed in a particular orientation, or be operated in a particular manner, and should not be construed as limiting the present invention.
The following detailed description of the implementations of the invention refers to the accompanying drawings.
Fig. 1 illustrates an improved design method for pads of an integrated circuit package according to a preferred embodiment of the present invention, and the detailed implementation thereof will be described in detail with reference to the detailed drawings.
Step 1, the invention firstly carries out conventional design of an integrated circuit packaging bonding pad according to a normal flow, as shown in figure 2;
the integrated circuit package pad of conventional design, is a circular pad, 9.84mil in diameter; as shown in fig. 3. It should be noted that the diameter of 9.84mil (0.25 mm) is the standard diameter of a semiconductor package, and other diameters may be replaced, and other values may be modified as well, and the method of the present invention is also applicable.
Under a conventional design flow, a gap between two circular pads, namely a clear space is only 9.85mil, as shown in fig. 4, in order to meet product design requirements, a signal line needs to be routed between the two pads, and meanwhile, it is ensured that no short circuit occurs between the signal line and the two pads, and the process requirement values of the line width and the space in the industry are the same, the width and the space of the signal line are 9.85/3=3.28mil, while the line width and the space of 3.28mil greatly exceed the conventional process capability of a board manufacturing factory, because the line width and the space of 4mil are a dividing line of the current PCB production process capability, the conventional process can achieve 4mil, and the difficulty process can achieve 3.5 mil; similarly, 3.5mil is also an important process capability dividing line, and a specific process can be made to be less than 3.5mil, but the production difficulty increases when the values of line width and space span one dividing line, the rejection rate of production increases greatly, and the cost and the period increase.
In this case, the pad fan-out via trace width is 3 mils, as shown in fig. 5 (the arrow indicates the position), and only the 3mil line width of these several places will cause the difficulty of manufacturing the whole board card to increase greatly, and will cause the production cycle and cost to increase greatly.
Step 2, calculating the net spacing between the two bonding pads to obtain the wiring width and the spacing of the intermediate signal lines of the two bonding pads;
the invention solves the problem that the line width and the space are too thin due to too small space among a plurality of positions.
In one embodiment, first the design software obtains the center-to-center distance of the two pads is 19.69 mils, and as shown in FIG. 4, the radii of the two pads are removed to obtain the net spacing between the two pads as: 19.69mil-9.84mil =9.85 mil;
therefore, the trace width and the spacing of the signal line between the two pads are further 9.85mil/3=3.28 mil.
Step 3, determining the bonding pads with the routing width and the spacing not meeting the requirements;
and determining the bonding pads which do not meet the requirements according to the width and the distance of the 3.28mil routing obtained in the step 2 and the width and the distance of the 4mil routing obtained in the conventional process as standards, wherein the bonding pads which do not meet the requirements, namely the bonding pads at certain specific positions, are obtained according to the design requirements, such as the bonding pads led out by the leads in the step 5.
Step 4, carrying out improved design on the bonding pad which does not meet the requirements to obtain the bonding pad with the improved design;
after determining the bonding pads which do not meet the requirements, carrying out improved design on the bonding pads which do not meet the requirements;
in one embodiment, the improved design method of the present invention firstly performs the width design of the pad, specifically:
(1) calculating the area S1 of the original design single circular pad:
in the formula, d is the diameter of the originally designed circular bonding pad;
(2) in order to ensure that the width of the fan-out routing is not less than 4 mils, the net spacing between two pads is not less than 4 mils x 3=12 mils, and the center distance between two pads is 19.69 mils, so that the width b of the further improved design pad is required to satisfy b being not more than 19.69 mils-12 mils, namely b being not more than 7.69 mils, and the integer value b =7 mils is taken for convenient calculation.
The pad width of improved design is 7 mils, can guarantee this moment that the width of being qualified for the next round of competitions between two pads is not less than 4 mils, satisfies the interval that the line reaches the pad simultaneously and is not less than 4 mils.
In one embodiment, the present invention designs the modified design pad as a racetrack pad, as shown in fig. 6, where the tension at the perimeter of the oval pad is similar to that of a circular pad, which facilitates uniformity of bonding. In the figure, a is the length of the bonding pad, b is the width of the bonding pad, is the diameter of the semicircle at the two ends and is the width of the middle rectangle, L is the length of the middle rectangle, and L = a-b.
In one embodiment, the length of the racetrack pad is further designed, specifically:
(1) calculating the modified design individual pad area S2:
obtained by transformation of the above formula
Wherein a is the length of the bonding pad, b is the width of the bonding pad, and is the diameter of the semicircle at the two ends, L is the length of the middle rectangle, and L = a-b;
(2) to ensure the consistency and reliability of the bonding between the original design pad and the improved design pad, the area of the improved design pad needs to be equal to the area of the original design pad, that is, S2= S1=76.05mil, the length a of the pad is obtained from b =7 mil:
and 5, replacing the pads which do not meet the requirements with the pads of the improved design, and finishing the improved design.
The invention uses the new design of the integrated circuit bonding pad in the specific position, the bonding pad is of a runway type and has the size of 12.4 × 7mil, as shown in figure 7.
In one embodiment, to verify the reliability of the improved design integrated circuit pads, the invention finally rechecks the improved design pad trace width and pitch:
(1) calculating the net spacing between the two bonding pads of the improved design, wherein the center distance between the two bonding pads is 19.69mil because the bonding pad point position is fixed, and the net spacing between the two bonding pads of the improved design is as follows: 19.69mil-b =19.69mil-7mil =12.69mil, as shown in fig. 8;
(2) the width and the spacing of the two pad routing lines are calculated and improved to be 12.69mil/3=4.23mil, and exceed the width and the spacing of the pad routing lines under the conventional process condition by 4mil, so that the conventional process of a plate making factory can be completely met.
Another embodiment of the present invention further provides an ic pad library, which is designed by the improved design method for ic package pads as shown in fig. 9.
In one embodiment, the library of integrated circuit pad packages includes circular pads of conventional design and racetrack pads of modified design, and the trace width and pitch between two racetrack pads is no less than 4 mils, with the area of a single racetrack pad being equal to the area of a single circular pad.
In one embodiment, the racetrack pad is specified to be 12.4 mils in length and 7 mils in width.
According to the improved design method and the obtained integrated circuit packaging bonding pad with the improved design, the width of the bonding pad is reduced, the distance between the two bonding pads is increased, and the line width and the distance of routing between the bonding pads can meet the conventional process capability requirements of PCB manufacturers; meanwhile, the length of the bonding pad is lengthened, the whole area of the bonding pad is ensured to be consistent with that of the original bonding pad, and the reliability of integrated circuit assembly is ensured. The invention provides a novel pad design solution, aiming at solving the problems of production and manufacturing difficulty increase, overlong period and overhigh cost of small-spacing devices caused by undersized pad spacing.
It will be readily appreciated by those skilled in the art that the above-described preferred embodiments may be freely combined, superimposed, without conflict.
Several illustrative embodiments have been described above, and it is to be understood that various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to form a part of this disclosure, and are intended to be within the spirit and scope of the invention. Although some of the examples presented herein refer to particular combinations of functions or structures, it should be understood that these functions and structures may be combined in other ways to achieve the same or different objectives according to the present invention. In particular, acts, elements and features discussed in connection with one embodiment are not intended to be excluded from a similar or other role in other embodiments. In addition, structures and components herein may be further divided into additional components or combined together to form fewer components for performing the same function. Accordingly, the foregoing description and drawings are by way of example only, and are not intended to be limiting, the scope of the invention being understood and interpreted to cover all such other variations or modifications.
Claims (10)
1. An improved design method for integrated circuit package pads, comprising the steps of:
step 1, designing an integrated circuit packaging bonding pad conventionally;
step 2, calculating the net distance between the two bonding pads to obtain the wiring width and the distance of the signal line between the two bonding pads;
step 3, determining the bonding pads with the routing width and the spacing not meeting the requirements;
step 4, carrying out improved design on the bonding pad which does not meet the requirements to obtain the bonding pad with the improved design;
and 5, replacing the pads which do not meet the requirements with the pads of the improved design, and finishing the improved design.
2. The improved design method for integrated circuit package pads of claim 1, wherein: in step 1, the pads of the integrated circuit package are all circular pads with a diameter of 9.84mil in conventional design.
3. The improved design method for integrated circuit package pads of claim 2, wherein: the step 2 comprises the following steps:
the design software found that the center-to-center distance between the two pads was 19.69 mils, then the net spacing between the two pads was: 19.69mil-9.84mil =9.85 mil;
the trace width and the pitch of the signal line between the two pads are obtained to be 9.85mil/3=3.28 mil.
4. The improved design method for integrated circuit package pads of claim 3, wherein: in step 3, the bonding pads with the routing width and the spacing smaller than 4mil are bonding pads which do not meet the requirements.
5. The improved design method for integrated circuit package pads of claim 4, wherein: the improved design of the step 4 comprises the width design of the bonding pad, and specifically comprises the following steps:
(1) calculating the area S1 of the original design single circular pad:
in the formula, d is the diameter of the originally designed circular bonding pad;
(2) and obtaining the net spacing between the two pads to be not less than 4 mils and 3=12 mils by using the width and the spacing of the traces to be not less than 4 mils, and further obtaining the width b of the improved design pad to meet the requirement that b is not more than 19.69 mils-12 mils, namely that b is not more than 7.69 mils, and taking the integer value b =7 mils.
6. The improved design method for integrated circuit package pads of claim 5, wherein: in step 4, the improved design pad is designed into a runway type pad, and the improved design also comprises the length design of the runway type pad, which specifically comprises the following steps:
(1) calculating the improved design single pad area S2:
obtained by transformation of the above formula
Wherein a is the length of the bonding pad, b is the width of the bonding pad, and is the diameter of the semicircle at the two ends, L is the length of the middle rectangle, and L = a-b;
(2) to improve the area of the design pad to be equal to the area of the original design pad, i.e., S2= S1=76.05mil, the length a of the pad obtained from b =7 mil:
7. the improved design method for integrated circuit package pads of claim 6, wherein: the method also comprises the step of rechecking the width and the distance of the pad routing:
(1) the net spacing between the two pads of the improved design was calculated as: 19.69mil-b =19.69mil-7mil =12.69 mil;
(2) the width and the spacing of the two pad routing lines are calculated and improved to be 12.69mil/3=4.23mil, and the process requirements are met.
8. An integrated circuit pad packaging library, comprising: the improved design method of the integrated circuit packaging pad of any one of claims 1 to 7.
9. The library of integrated circuit pad packages of claim 8, wherein: the integrated circuit pad packaging library comprises circular pads of conventional design and runway type pads of improved design, the area of a single runway type pad is equal to that of a single circular pad, and the width and the distance of routing between two adjacent runway type pads are not less than 4 mils.
10. The library of integrated circuit pad packages of claim 9, wherein: the racetrack pad has a length of 12.4 mils and a width of 7 mils.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1396799A (en) * | 2001-07-11 | 2003-02-12 | 三星电子株式会社 | Printed circuit board with improved pad structure |
| CN102097333A (en) * | 2010-11-01 | 2011-06-15 | 华为终端有限公司 | Method for designing circuit board, circuit board and electronic device |
| CN212660372U (en) * | 2020-07-28 | 2021-03-05 | 深圳市一博电路有限公司 | BGA (ball grid array) bonding pad structure capable of improving processing yield |
| CN112752398A (en) * | 2020-11-24 | 2021-05-04 | 广州朗国电子科技有限公司 | Chip bonding pad structure of PCB |
| CN114364135A (en) * | 2022-01-12 | 2022-04-15 | 清能德创电气技术（北京）有限公司 | Method for constructing PCB packaging model |
-
2022
- 2022-04-15 CN CN202210395131.9A patent/CN114501849A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1396799A (en) * | 2001-07-11 | 2003-02-12 | 三星电子株式会社 | Printed circuit board with improved pad structure |
| CN102097333A (en) * | 2010-11-01 | 2011-06-15 | 华为终端有限公司 | Method for designing circuit board, circuit board and electronic device |
| CN212660372U (en) * | 2020-07-28 | 2021-03-05 | 深圳市一博电路有限公司 | BGA (ball grid array) bonding pad structure capable of improving processing yield |
| CN112752398A (en) * | 2020-11-24 | 2021-05-04 | 广州朗国电子科技有限公司 | Chip bonding pad structure of PCB |
| CN114364135A (en) * | 2022-01-12 | 2022-04-15 | 清能德创电气技术（北京）有限公司 | Method for constructing PCB packaging model |
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