CN114447897A - 功率半导体开关钳位电路 - Google Patents
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Abstract
本公开的各实施例涉及功率半导体开关钳位电路。提供了一种功率半导体电路用于当功率半导体开关断开(即,关断)时钳位跨电路的电压。该电路可以包括第一电涌放电器以及与功率半导体开关并联耦合的第一半导体开关。第一半导体开关与第一电涌放电器串联耦合。第二电涌放电器可以被耦合到第一半导体开关的栅极以控制流过第一半导体开关和第一电涌放电器的电流。
Description
技术领域
本发明总体涉及功率半导体开关设备,更具体地涉及与开关设备并联以当断开设备时耗散能量的电压钳位电路。
背景技术
在功率半导体开关设备领域中,通常利用与半导体设备并联连接的金属氧化物变阻器(MOV)来耗散系统感应能量并且在设备断开时保护功率半导体设备。尽管这是个简单解决方案,但它需要关于设备的电压阻断能力对半导体设备进行大量过度设计。例如,大多数MOV设计要求功率半导体设备的阻断电压的大小为标称系统电压的2倍至2.5倍(例如,1,000V系统可能需要2,500V功率半导体设备)。因此,必须使用的功率半导体设备的成本较高。
因而,期望用于功率半导体开关设备的改进设计。
发明内容
描述了一种用于提高阻断电压和/或降低电路成本的功率半导体电路。该电路可以具有彼此串联并且与功率半导体开关并联的第一电涌放电器和第一半导体开关。第二电涌放电器可以被耦合到第一半导体开关的栅极以被动控制开关的断开和闭合,以便控制流过第一电涌放电器和第一半导体开关的电流。本发明还可以包括下文在书面描述或附图中所描述的任何其他方面及其任何组合。
附图说明
通过结合附图阅读以下描述,可以更全面地理解本发明,其中:
图1A是功率半导体电路的一个实施例的示意图;
图1B是功率半导体电路的另一实施例的示意图;
图2是示出了功率半导体电路的电气特性的图;
图3是示出了功率半导体电路的电气特性的较宽视图的图;
图4是示出了功率半导体电路的漏电流的图;
图5是用于功率半导体电路的无源激活电路的另一实施例的示意图;
图6是用于功率半导体电路的无源激活电路的另一实施例的示意图;
图7是用于功率半导体电路的无源激活电路的另一实施例的示意图;以及
图8是用于功率半导体电路的无源激活电路的另一实施例的示意图。
具体实施方式
本文中的各实施例提供了一种混合电压钳位电路,该混合电压钳位电路可以准许使用阻断电压为1.2倍至1.5倍的标称系统电压的功率半导体开关设备(也称为固态断路器)。结果,与传统设计相比较,通过使用额定值较低的设备,可以降低功率半导体设备的成本(例如,可能降低40%或更多的成本)。混合电压钳位电路优选地被无源激活并且结合一个或多个MOV和一个或多个晶闸管的动作。即,可以在没有晶闸管的任何外部控制信号的情况下使用无源激活电路。相反,晶闸管可以在MOV电压钳位阶段(即,故障电流中断)期间自动接通,并且在故障电流中断以承受系统电压的至少一部分之后关断。当关断/断开事件发生时,混合电压钳位电路可以利用MOV来执行安全断开功率半导体开关设备所需的电压钳位和能量耗散。在关断/开路事件之后,无源激活电路使得晶闸管提高电压钳位电路的标称耐压能力并且降低电压钳位电路的关断状态下的漏电流(例如,与仅使用MOV相比较,有可能降低10倍至100倍的漏电流)。还可以调谐混合电路,以便生成特定钳位电压/标称电压比。优选地,混合电压钳位电路使用具有双向电压阻断能力并且能够处理高电涌电流以便降低电压钳位电路的总成本的低电流晶闸管。混合电压钳位电路可以与额定电流高达5000A的固态断路器兼容。优选地,晶闸管的额定电流小于功率半导体开关10的额定电流的40%,这允许使电路的成本最小。
如图1A和图1B所示,具有混合电压钳位的功率半导体电路可以包括一个或多个功率半导体开关10、一个或多个初级MOV 12、一个或多个晶闸管14、一个或多个电容器16和一个或多个次级MOV 18。应当理解的是,功率半导体开关10被控制为处于闭合状态(接通)或断开状态(关断),其中控制信号22被施加到功率半导体开关10的栅极。如图所示,图1A利用单个晶闸管14,该单个晶闸管14可能更适合于DC应用。相比之下,图1B利用彼此并联耦合的两个晶闸管14,这两个晶闸管14可能更适合于AC应用。如图1A至图1B所示,初级MOV 12可以与功率半导体开关10并联耦合。晶闸管14可以与初级MOV 12串联耦合并且与功率半导体开关10并联。电容器16可以与初级MOV 12并联耦合并且与一个或多个晶闸管14串联耦合。如图1A所示,次级MOV 18可以与初级MOV 12串联耦合。次级MOV 18还可以被耦合到栅极晶闸管14的栅极。因此,电容器16还与晶闸管14串联耦合。在图1B中,附加次级MOV 18可以被耦合到附加晶闸管14的栅极并且被耦合到与初级MOV 12相对的第一晶闸管14的输出。还可以期望将电阻器20与次级MOV 18串联耦合在第一晶闸管14的栅极与初级MOV 12之间以及在第二晶闸管14的栅极与第一晶闸管14之间。
应当理解的是,本文中的电路可以根据需要改变。例如,功率半导体电路(即,开关10和相关电压钳位电路(MOV 12、开关14等))优选地是固态断路器。尽管可以使用各种类型的功率半导体开关10,但是示例包括绝缘栅双极晶体管(IGBT)、双极结型晶体管(BGT)、金属氧化物半导体场效应晶体管(MOSFET)、栅极关断晶闸管(GTO)、MOS控制晶闸管(MCT)、集成门极换流晶闸管(IGCT)、碳化硅(SiC)开关、氮化镓(GaN)开关、或控制电流来为电气设备供电的任何其他类型的半导体开关。初级MOV 12可以是电涌放电器,该电涌放电器包括变阻器。次级MOV 18还可以是电涌放电器,包括变阻器(图1A至图1B、图5和图7)或TVS二极管(图6和图8)。晶闸管14可以是半导体开关,但优选地是具有允许电流从初级MOV 12流过晶闸管14的电涌电流能力的双向电压阻断开关。
图2和图3示出了半导体开关电路的电气特性。图2图示了沿着图的顶部的对电路执行的测试的更长序列,其中图的主要部分更详细地示出了该序列的缩放窗口24。图3以较低缩放级别图示了序列的较宽窗口。所示的电气特性包括通过功率半导体电路的总电流26、通过电压钳位电路(即,初级MOV 12、晶闸管14和电容器16)的电流28、跨初级MOV 12和晶闸管14的电压30、以及跨晶闸管14的电压32。应当理解的是,电路的操作使用将导致与所示的电气特性不同的电气特性。
在关断状态(阻断状态)下,电压30由初级高电流MOV 12和晶闸管14共享。晶闸管14可以承担被施加到电路的电压30的30%至70%并且与单独使用MOV 12相比较,增加电路的标称额定电压。一旦发生关断(电流中断),初级高电流MOV 12将电压30钳位到低于功率半导体开关10的最大阻断电压的值。一旦无源激活电路上的电压32超过预先定义的值(通常高于标称系统电压),这由于晶闸管14的被动激活而发生。例如,在图3至图4中,对于700V的系统电压(即,1.35倍的峰值电压/标称电压比),电压可以被钳位到小于950V。在故障电流中断之后,晶闸管14的电压32升高,这意味着晶闸管14承受系统电压(约200V)的一部分。初级MOV 12承受其余系统电压(500V)。因此,由于被施加到MOV 12的电压较低,所以可以减少MOV 12的漏电流。
图4示出了与本文中的混合电路36相比较,传统MOV电路34的阻断电压(即,发生从低漏电流到高漏电流的转变的电压)的测试结果。如所示出的,混合电路可以阻断较高系统电压(示例中为850V与600V)。在相同电压水平(1uA与400uA)下,混合电路还示出低得多的漏电流。应当指出,电流中断期间的预期钳位电压在两种情况下均相同(约1000V)。
一般而言,应当理解的是,当功率半导体开关10关断时,电流停止流过开关10,而是流向并联电压钳位电路(即,通过MOV 12和电容器16流向晶闸管或在反向AC电流的情况下从开关10的另一侧直接流向晶闸管14)。然而,由于晶闸管14最初是关断的,所以电压电位发生,该电压电位通过电阻器20和次级MOV 18(例如,通过初级MOV 12和次级MOV 18)被施加到晶闸管14的栅极。这导致晶闸管14接通并且允许电流流过晶闸管14。然后,晶闸管14的栅极上的电压电位下降,并且当流过晶闸管14的电流下降到阈值以下时,晶闸管14再次关断以阻止其他电流流动。应当理解的是,在其中晶闸管14的栅极不直接连接到MOV 12、电容器16或开关10的相对侧而是连接在一起的,下文所描述的图7至图8的变型中,由于线与在电压钳位电路中生成的电压(例如,从初级MOV 12到次级MOV 18)的接近度,所以可以在将栅极连接在一起的线中感应出电压。
图5至图8示出了功率半导体电路的附加可能变型。例如,在图5中,图示了可以移除电阻器20并且仅利用次级MOV 18。在图6中,可以使用TVS二极管38来代替次级MOV 18。在图7中,次级MOV18和电阻器20可以由晶闸管14共享,使得次级MOV 18耦合到两个晶闸管的栅极14。在该布置中,次级MOV 18通过第二次级MOV 18的栅极耦合到初级MOV 12。在图8中,示出了与图7类似的但替代地具有TVS二极管38的共享布置。应当指出,与图5至图6类似,如果期望,则可以从图7至图8中移除电阻器20。
如上文所描述的,本文中的电压钳位电路可以在无源激活电路中组合使用主高电流MOV 12和低电流晶闸管14。无源激活电路可以使用廉价的低电流MOV 18或TVS二极管38。与仅具有MOV的固态断路器相比较,电压钳位电路可能能够阻断高得多的标称电压。混合电压钳位电路还可以大大降低功率半导体开关10所需的额定阻断电压,并且对于电路的相同额定电压,大大降低了功率半导体开关的成本。混合电压钳位还可以降低通过断开功率半导体开关10产生的最大系统过电压,这对于对系统过电压敏感的一些用户而言可能很重要,诸如数据中心应用。
虽然已经对本发明的优选实施例进行了描述,但是应当理解的是,本发明不限于此,并且可以在没有背离本文中的本发明的情况下做出修改。虽然本文中所描述的每个实施例可能仅是指某些特征并且不会具体是指关于其他实施例所描述的每个特征,但是应当认识到,除非另有说明,否则本文中所描述的特征是可互换的,即使没有提及特定特征。还应当理解的是,上文所描述的优点不一定是本发明的唯一优点,并且不一定预期所有所描述的优点通过本发明的每个实施例来实现。本发明的范围由所附权利要求限定,并且落入权利要求的含义(无论是字面上的还是等效的)内的所有设备和方法都旨在涵盖在其中。
Claims (21)
1.一种功率半导体电路,包括:
功率半导体开关;
第一电涌放电器,与所述功率半导体开关并联耦合;
第一半导体开关,与所述电涌放电器串联耦合,并且与所述功率半导体开关并联耦合;以及
第二电涌放电器,被耦合到所述第一半导体开关的栅极,并且被耦合到所述第一电涌放电器。
2.根据权利要求1所述的功率半导体电路,其中所述第二电涌放电器与所述第一电涌放电器串联耦合。
3.根据权利要求1所述的功率半导体电路,还包括电容器,所述电容器与所述第一电涌放电器并联耦合,并且与所述第一半导体开关串联耦合。
4.根据权利要求3所述的功率半导体电路,其中所述电容器与所述第二电涌放电器串联耦合。
5.根据权利要求4所述的功率半导体电路,其中所述第二电涌放电器与所述第一电涌放电器串联耦合。
6.根据权利要求1所述的功率半导体电路,还包括第二半导体开关和第三电涌放电器,所述第二半导体开关与所述第一半导体开关并联耦合,所述第三电涌放电器被耦合到所述第二半导体开关的栅极,并且被耦合到与所述第一电涌放电器相对的所述第一半导体开关的输出。
7.根据权利要求1所述的功率半导体电路,还包括第二半导体开关,所述第二半导体开关与所述第一半导体开关并联耦合,所述第二电涌放电器被耦合到所述第二半导体开关的栅极。
8.根据权利要求1所述的功率半导体电路,其中所述第一半导体开关是具有电涌电流能力的双向电压阻断开关,所述双向电压阻断开关允许电流从所述第一电涌放电器流过所述第一半导体开关。
9.根据权利要求8所述的功率半导体电路,其中所述第一半导体开关是晶闸管。
10.根据权利要求1所述的功率半导体电路,还包括电阻器,所述电阻器在所述第一半导体开关的所述栅极与所述第一电涌放电器之间与所述第二电涌放电器串联耦合。
11.根据权利要求1所述的功率半导体电路,其中所述功率半导体开关具有介于标称系统电压的1.2倍与1.7倍之间的阻断电压。
12.根据权利要求1所述的功率半导体电路,其中所述第一半导体开关的额定电流小于所述功率半导体开关的额定电流的40%。
13.根据权利要求1所述的功率半导体电路,其中所述第一电涌放电器为变阻器。
14.根据权利要求13所述的功率半导体电路,其中所述第一电涌放电器为金属氧化物变阻器。
15.根据权利要求1所述的功率半导体电路,其中所述第二电涌放电器为变阻器。
16.根据权利要求14所述的功率半导体电路,其中所述第二电涌放电器为金属氧化物变阻器。
17.根据权利要求1所述的功率半导体电路,其中所述第二电涌放电器为TVS二极管。
18.一种固态断路器,包括根据权利要求1所述的功率半导体电路。
19.根据权利要求1所述的功率半导体电路,其中当所述功率半导体开关关断时,电压通过所述第一电涌放电器和所述第二电涌放电器被施加到所述第一半导体开关的所述栅极,以接通所述第一半导体开关。
20.根据权利要求19所述的功率半导体电路,其中当流过所述第一半导体开关的电流下降到阈值以下时,所述第一半导体开关关断。
21.根据权利要求19所述的功率半导体电路,其中所述电压从所述第一电涌放电器被感应到所述第二电涌放电器。
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US20230170901A1 (en) * | 2021-11-23 | 2023-06-01 | Drexel University | Fault current bypass based solid state circuit breakers and active clamping snubbers for dc circuit breakers |
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