CN114388721B - Silicon-based OLED display substrate - Google Patents
Silicon-based OLED display substrate Download PDFInfo
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- CN114388721B CN114388721B CN202111663956.6A CN202111663956A CN114388721B CN 114388721 B CN114388721 B CN 114388721B CN 202111663956 A CN202111663956 A CN 202111663956A CN 114388721 B CN114388721 B CN 114388721B
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- 239000000758 substrate Substances 0.000 title claims abstract description 107
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 74
- 239000010703 silicon Substances 0.000 title claims abstract description 74
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 73
- 238000002955 isolation Methods 0.000 claims abstract description 46
- 238000001704 evaporation Methods 0.000 claims abstract description 24
- 230000008020 evaporation Effects 0.000 claims abstract description 22
- 125000006850 spacer group Chemical group 0.000 claims description 85
- 238000005520 cutting process Methods 0.000 claims description 6
- 239000002245 particle Substances 0.000 abstract description 47
- 238000000034 method Methods 0.000 abstract description 13
- 238000004140 cleaning Methods 0.000 abstract description 11
- 238000004806 packaging method and process Methods 0.000 abstract description 10
- 230000002159 abnormal effect Effects 0.000 abstract description 5
- 230000009286 beneficial effect Effects 0.000 abstract description 5
- 238000007740 vapor deposition Methods 0.000 description 12
- 238000004519 manufacturing process Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005525 hole transport Effects 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000009828 non-uniform distribution Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/042—Coating on selected surface areas, e.g. using masks using masks
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/12—Organic material
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/24—Vacuum evaporation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
Abstract
The embodiment of the application discloses a silicon-based OLED display substrate. The silicon-based OLED display substrate includes: a wafer substrate including a base and a plurality of dies formed on the base, and a plurality of supporting isolation members; the plurality of supporting isolation parts are positioned between adjacent bare chips on the wafer substrate, the height of the supporting isolation parts is larger than that of the bare chips, and the supporting isolation part strips are used for supporting the universal mask for evaporation. The embodiment solves the technical problems that the existing silicon-based OLED products are seriously affected by particles, the yield is abnormal and the packaging is invalid, effectively isolates the mask plate from the substrate in the evaporation process of the white light OLED device, prevents particles remained on the mask plate after cleaning from adhering to the substrate, reduces the number of particles introduced into the silicon-based OLED products by the mask plate, is beneficial to improving the yield of the silicon-based OLED products and avoids the risk of packaging invalidation.
Description
Technical Field
The embodiment of the application relates to the technical field of display, in particular to a silicon-based OLED display substrate.
Background
With the rise of VR technology, VR products have increasingly stringent requirements on pixel density of display devices, and pixel densities higher than 2000PPI are generally required, whereas it is difficult to manufacture higher pixel density display devices with conventional LCD and OLED technologies.
Currently, most of display devices applied to VR products are silicon-based OLEDs, and one of the implementation manners of colorizing silicon-based OLEDs is to prepare white-light OLED devices and colorize the white-light OLED devices through color filters. The white OLED device generally adopts an evaporation mode to evaporate an organic material onto a substrate to realize light emission.
Different from the preparation process of the mobile phone display screen, the evaporation white OLED device needs to use a universal mask. Due to the existence of the mask, the existing silicon-based OLED product is seriously affected by particles, and the problems of abnormal yield, packaging failure and the like exist.
Disclosure of Invention
The embodiment of the application provides a silicon-based OLED display substrate, which is used for reducing the quantity of particles introduced into a silicon-based OLED product by a mask plate for evaporation, being beneficial to improving the yield of the silicon-based OLED product and avoiding the risk of package failure.
The embodiment of the application provides a silicon-based OLED display substrate, which comprises the following components:
a wafer substrate comprising a base and a plurality of dies formed on the base;
and the support isolation parts are positioned between adjacent bare chips on the wafer substrate, the height of the support isolation parts is larger than that of the bare chips, and the support isolation parts are used for supporting the universal mask for vapor deposition.
According to the technical scheme, the plurality of supporting isolation parts with the height higher than that of the bare chips are arranged between the adjacent bare chips on the wafer substrate so as to support the universal mask for vapor deposition. The arrangement can effectively isolate the mask plate from the substrate in the evaporation process of the white light OLED device, so that particles remained on the mask plate after cleaning are prevented from adhering to the substrate, the number of particles introduced into the silicon-based OLED product by the mask plate is reduced, the yield of the silicon-based OLED product is improved, and the risk of package failure is avoided.
Optionally, the support isolation component includes support isolation bars extending in a row direction, and each row of the die is located between two support isolation bars; or (b)
The support spacer includes support spacers extending in a column direction, with each column of the die being located between two support spacers.
According to the technical scheme, two support isolation strips extending along the row direction are arranged on the upper side and the lower side of each row of bare chips on the wafer substrate, or two support isolation strips extending along the column direction are arranged on the left side and the right side of each column of bare chips so as to support the universal mask plate for vapor deposition. The arrangement can effectively isolate the mask plate from the substrate in the evaporation process of the white light OLED device, so that particles remained on the mask plate after cleaning are prevented from adhering to the substrate, the number of particles introduced into the silicon-based OLED product by the mask plate is reduced, the yield of the silicon-based OLED product is improved, and the risk of package failure is avoided.
Optionally, the support isolation member includes a plurality of discontinuous support isolator portions.
Optionally, the supporting isolator part is in a strip shape, a block shape or a column shape.
Optionally, the support isolator is disposed around at least one of the dies.
Optionally, the support spacers are arranged in a plurality of rows, and one row of the support spacers is located between adjacent rows of the die.
According to the technical scheme, the supporting isolation components comprising the plurality of discontinuous supporting isolation sub-parts with different shapes and various arrangement modes are arranged, so that not only can the mask plate and the substrate be effectively isolated, but also the quantity of particles introduced into the silicon-based OLED product by the mask plate can be further reduced, the particles remained on the mask plate after cleaning are prevented from adhering to the substrate, the yield of the silicon-based OLED product is improved, and the packaging failure risk is avoided.
Optionally, the top end of the supporting isolator portion remote from the wafer substrate includes an upwardly protruding arcuate surface.
According to the technical scheme, the top end of the supporting spacer part, which is far away from the wafer substrate, comprises the arc surface protruding upwards, so that the supporting spacer is far away from the arc surface on one side of the wafer substrate and is in direct contact with the mask, the number of particles adhered by the supporting spacer is further reduced, the yield of the silicon-based OLED product is improved, and the packaging failure risk is avoided.
Optionally, the top end of the supporting isolator is arched or semicircular.
According to the technical scheme, the top ends of the supporting spacer parts are arched or semicircular, so that the supporting spacer is far away from the arc surface on one side of the wafer substrate and is in direct contact with the mask, the number of particles adhered by the supporting spacer is further reduced, and the silicon-based OLED product yield is improved more beneficially, and the packaging failure risk is avoided.
Alternatively, the height of the supporting spacer member ranges from 10 to 50 μm.
According to the technical scheme, on the basis of guaranteeing the effectiveness of isolation between the mask plate and the substrate, the negative influence of evaporation shadows on the silicon-based OLED product is reduced, the yield of the silicon-based OLED product is improved, and the packaging failure risk is avoided.
Optionally, the display substrate further includes two scribe lines disposed between two adjacent dies, and the supporting isolation component is located between the two scribe lines.
According to the technical scheme, the two cutting channels are arranged between the two adjacent bare chips, the supporting isolation part is arranged between the two cutting channels, when the evaporation forms the film layer on the bare chips, the supporting isolation part can support the universal mask plate for evaporation, the display area of the finally formed display panel cannot be occupied, particles remained on the mask plate after cleaning are prevented from being adhered to the bare chips, even if the supporting isolation part contacts with the mask plate and is adhered with the particles, the supporting isolation part can be removed along with the cutting of the wafer substrate between the two cutting channels, and the particles cannot influence the finally formed silicon-based OLED product.
According to the technical scheme, the plurality of supporting isolation parts with the height higher than that of the bare chips are arranged between the adjacent bare chips on the wafer substrate, so that the universal mask for vapor deposition is supported. The arrangement can effectively isolate the mask plate from the substrate in the evaporation process of the white light OLED device, so that particles remained on the mask plate after cleaning are prevented from adhering to the substrate, the number of particles introduced into the silicon-based OLED product by the mask plate is reduced, the yield of the silicon-based OLED product is improved, and the risk of package failure is avoided.
Drawings
FIG. 1 is a schematic illustration of the location of a particle presence zone in the prior art;
FIG. 2 is a side view of a silicon-based OLED display substrate according to an embodiment of the present application;
FIG. 3 is a top view of a silicon-based OLED display substrate according to an embodiment of the present application;
FIG. 4 is a schematic view of a supporting spacer according to an embodiment of the present application;
FIG. 5 is a schematic view of another embodiment of a support spacer;
FIG. 6 is a schematic view of a support spacer according to an embodiment of the present application;
FIG. 7 is a top view of another silicon-based OLED display substrate according to an embodiment of the present application;
FIG. 8 is a top view of yet another silicon-based OLED display substrate provided by an embodiment of the present application;
FIG. 9 is a top view of yet another silicon-based OLED display substrate provided by an embodiment of the present application;
FIG. 10 is a top view of yet another silicon-based OLED display substrate provided by an embodiment of the present application;
fig. 11 is a top view of yet another silicon-based OLED display substrate according to an embodiment of the present application.
Detailed Description
The application is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present application are shown in the drawings.
As mentioned in the background art, the prior silicon-based OLED product is seriously affected by particles, and has the technical problems of abnormal yield, packaging failure and the like, and the inventor finds that the technical problem is caused by careful study, and the reason is that fig. 1 is a schematic diagram of the position of a particle existence region in the prior art, and referring to fig. 1, in the production link of the prior silicon-based OLED, the particles generated by evaporation are relatively high, and after cleaning and repeated vacuumizing, the particles in a cavity are generally few in vacuum, and most of the particles come from a general mask plate and a substrate for evaporation. The particles on the substrate can be basically solved through cleaning, but the particles on the mask plate are continuously increased due to the evaporation process of the organic material, and meanwhile, the existing particles cannot be thoroughly removed through cleaning the mask plate. Thus, after the substrate and the reticle are attached, particles remaining on the reticle adhere to the substrate, i.e. the particle-present region 110.
Because the pixel density of the silicon-based OLED product is high, the size of the pixel is relatively small and is generally smaller than 5 mu m, the tolerance of the silicon-based OLED product to particles is low, and particles above 2 mu m can cause poor products. Therefore, due to the existence of the universal mask for vapor deposition, the existing silicon-based OLED product is seriously influenced by particles, and the problems of abnormal yield, packaging failure and the like exist.
Aiming at the technical problems, the application provides the following solutions:
fig. 2 is a side view of a silicon-based OLED display substrate provided in an embodiment of the present application, referring to fig. 2, the structure of the silicon-based OLED display substrate includes: a wafer substrate 210, the wafer substrate 210 including a base 211 and a plurality of dies 212 formed on the base 211; the plurality of support and isolation components 220 are located between adjacent dies 212 on the wafer substrate 210, and the height of the support and isolation components 220 is larger than that of the dies 212, and the support and isolation components 220 are used for supporting the universal mask for vapor deposition.
The supporting and isolating component 220 is used for supporting the universal mask plate for evaporation in the evaporation process of the white light OLED device. Since the height of the supporting spacer 220 is greater than the height of the die 212, when the substrate is attached to the reticle, only the supporting spacer 220 and the reticle are in contact with each other, other positions of the substrate do not contact the reticle, and only a small portion of the residual particles are carried onto the substrate after the reticle is cleaned and enter the next process stage.
It is known that the height of the supporting and isolating member 220 can be adaptively adjusted according to the particle size and the tolerance of the silicon-based OLED product to vapor deposition shadow during the process, and the width of the supporting and isolating member 220 should be as small as possible, which is not limited in the present application. Assuming that the height of the die 212 on the wafer substrate 210 is a μm, the height of the supporting spacer 220 is optionally in the range of 10 to 50 μm, i.e., the height of the supporting spacer 220 above the die 212 is in the range of (10-a) μm to (50-a) μm. For example, the height of the supporting spacer 220 may be preferably set to 20 μm.
It is understood that the height of the supporting spacer 220 is less than 10 μm, which may make it difficult to achieve effective isolation between the reticle and the substrate; the height of the supporting spacer 220 is higher than 50 μm, which may cause excessive vapor deposition shadow, and easily cause package failure, and affect the yield of the silicon-based OLED product. Therefore, the height of the supporting spacer 220 ranges from 10 to 50 μm, and the negative influence of vapor deposition shadow on the silicon-based OLED product is reduced on the basis of ensuring the effectiveness of the isolation between the mask and the substrate.
Illustratively, the material of the support isolation member 220 may be SiN x 、SiO x 、Al 2 O 3 The support spacer 220 may be formed by PVD or CVD to form a film and photolithography to form a desired pattern.
Specifically, when the material of the supporting spacer 220 is SiO x In this case, the supporting spacer 220 may be formed by forming a film by CVD and etching with yellow light. In addition, the supporting and isolating component 220 can be positioned on the same layer and made of the same material as the PDL layer of the silicon-based OLED display substrate, so that the supporting and isolating component 220 can be manufactured while the PDL layer is manufactured, and the technical effects of simplifying the process flow and reducing the manufacturing cost are achieved.
Specifically, when the material of the supporting spacer 220 is SiN x 、Al 2 O 3 Or TiN, the supporting spacer 220 may be formed by CVD, ALD or PVD, and photolithography to form the desired pattern. In additionThe supporting and isolating component 220 can be positioned on the same layer and made of the same material as the insulating layer of the silicon-based OLED display substrate, so that the supporting and isolating component 220 can be manufactured while the insulating layer is manufactured, the process flow is simplified, and the manufacturing cost is reduced.
Specifically, when the material of the supporting spacer 220 is Al, the supporting spacer 220 may be formed by PVD, and photolithography to form a desired pattern. In addition, the supporting and isolating component 220 can be positioned on the same layer as the metal anode layer of the silicon-based OLED display substrate and made of the same material, so that the supporting and isolating component 220 can be manufactured while the metal anode layer is manufactured, and the effects of simplifying the process flow and reducing the manufacturing cost are achieved.
Taking a typical structure of a silicon-based OLED display substrate as an example, in some embodiments, a specific manufacturing process of the silicon-based OLED display substrate at least includes the following steps:
s1, forming a metal anode layer on a bare chip, and forming a supporting and isolating component to support a universal mask for evaporation at the same time of forming the metal anode layer;
s2, evaporating a white light OLED device material layer by utilizing a universal mask plate for evaporation, for example, evaporating a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer and an electron injection layer sequentially from one side close to the metal anode layer to one side far from the metal anode layer;
s3, manufacturing a transparent cathode;
s4, carrying out film encapsulation on the white light OLED device;
and S5, performing alignment and lamination on the glass cover plate containing the color filter and the bare chip packaged by the film by utilizing UV adhesive, and curing by an ultraviolet irradiation mode.
Compared with the manufacturing flow of the silicon-based OLED display substrate, most of the existing silicon-based OLED products directly utilize a universal mask for evaporation to evaporate a white OLED device on a metal anode layer. In the process of forming the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer and the electron injection layer by using the evaporation of each organic material, particles on the mask gradually accumulate, and the particles on the mask adhere to the substrate, namely the bare chip, due to the fact that the mask is attached to the substrate. After the glass cover plate containing the color filter is aligned and attached to the die after the film is packaged by the UV adhesive, and the UV adhesive which is tightly combined with the die can be adhered to the particles after the die is cured by ultraviolet irradiation, and the adhesion between the particles and the die is not firm, so that the UV adhesive is difficult to effectively attach the glass cover plate containing the color filter and the die after the film is packaged, the packaging failure risk exists, and the yield of the silicon-based OLED product is affected.
Therefore, in this embodiment, the plurality of support isolation members having a height higher than that of the die are disposed between the adjacent die on the wafer substrate, so as to support the universal mask for vapor deposition. The arrangement can effectively isolate the mask plate from the substrate in the evaporation process of the white light OLED device, so that particles remained on the mask plate after cleaning are prevented from adhering to the substrate, the number of particles introduced into the silicon-based OLED product by the mask plate is reduced, the yield of the silicon-based OLED product is improved, and the risk of package failure is avoided.
Optionally, based on the above embodiment, fig. 3 is a top view of a silicon-based OLED display substrate provided in an embodiment of the present application, and referring to fig. 3, a support isolation component in the silicon-based OLED display substrate includes support isolation bars 221 extending along a row direction, where each row of dies 212 is located between two support isolation bars 221.
Wherein, the top end of the supporting spacer 221 away from the wafer substrate may be a plane or an arc surface.
Exemplary, fig. 4 is a schematic structural diagram of a supporting spacer provided in an embodiment of the present application, referring to fig. 4, the supporting spacer 221 is rectangular along a row direction, and the top end of the supporting spacer 221 away from the wafer substrate is a plane; fig. 5 is a schematic structural view of another supporting spacer provided in an embodiment of the present application, referring to fig. 5, the supporting spacer 221 is in a pie-chart shape along the row direction, and the top end of the supporting spacer 221 away from the wafer substrate is a cambered surface; fig. 6 is a schematic structural diagram of another supporting spacer provided in an embodiment of the present application, referring to fig. 6, the supporting spacer 221 is square at a lower portion along a row direction, semicircular at an upper portion, and a cambered surface at a top end of the supporting spacer 221 away from the wafer substrate.
It will be appreciated that the reason why the supporting spacer 221 is disposed away from the top of the wafer substrate as an arc surface in this embodiment is that: when the top of the supporting spacer 221 far from the wafer substrate is a plane, the plane of the supporting spacer 221 far from the wafer substrate side is fully contacted with the mask, the number of particles adhered to the supporting spacer 221 is more, and when the top of the supporting spacer 221 far from the wafer substrate is an arc surface, only a few arc surfaces of the supporting spacer 221 far from the wafer substrate side are directly contacted with the mask, the number of particles adhered to the supporting spacer 221 is less, thereby being beneficial to improving the yield of the silicon-based OLED product and avoiding the risk of package failure.
Alternatively, based on the above embodiment, fig. 7 is a top view of another silicon-based OLED display substrate provided in an embodiment of the present application, and referring to fig. 7, the support isolation component in the silicon-based OLED display substrate includes support isolation bars 221 extending along a column direction, and each column of dies 212 is located between two support isolation bars 221.
The top end of the supporting spacer 221 extending along the column direction away from the wafer substrate may be a plane or an arc surface, and the technical principle and the effect of the supporting spacer 221 extending along the row direction are similar to those of the supporting spacer 221, which will not be described again.
In an embodiment, fig. 8 is a top view of still another silicon-based OLED display substrate provided in an embodiment of the present application, and referring to fig. 8, a supporting isolation component in the silicon-based OLED display substrate includes supporting isolation bars 221 extending along a column direction, each of the bare dies 212 is located between two supporting isolation bars 221, and each of the bare dies 212 is located between two supporting isolation bars 221 along a row direction, which is similar in technical principle and implementation effect and will not be repeated.
Optionally, based on the above embodiment, fig. 9 is a top view of still another silicon-based OLED display substrate provided in an embodiment of the present application, and referring to fig. 9, the support isolation component in the silicon-based OLED display substrate includes a plurality of discontinuous support spacers 222.
Wherein FIG. 9 illustrates a plurality of non-continuous support spacers 222 in a non-uniform distribution, but is not meant to limit the application. It can be appreciated that, in the embodiment of the present application, the arrangement manner of the plurality of discontinuous support spacers 222 may be preferably set to be uniformly distributed, so that the reason for this is that the stress of the mask is relatively uniform under the effect of the plurality of uniformly distributed discontinuous support spacers 222, which is beneficial to prolonging the service life of the mask.
In addition, the length of the supporting spacer 222 may be set according to the practical application requirement of the silicon-based OLED display substrate. It is known that the supporting spacer portions 222 of different lengths correspond to different shapes, and the supporting spacer portions 222 are alternatively in a bar shape, a block shape or a column shape according to the length from long to short.
Optionally, the top end of the supporting spacer portion 222 away from the wafer substrate includes an arc surface protruding upward, and the top end of the supporting spacer portion 222 is arched or semicircular. It can be known that the technical principle and the effect of the arrangement are similar to the top end of the cambered surface of the supporting spacer, when the top end of the supporting spacer portion 222 comprises the cambered surface protruding upwards, only a few cambered surfaces of the side of the supporting spacer portion 222 away from the wafer substrate can be in direct contact with the mask plate, so that the number of particles adhered by the supporting spacer portion 222 is less, the yield of the silicon-based OLED product is improved, and the risk of package failure is avoided.
Optionally, based on the above embodiment, fig. 10 is a top view of still another silicon-based OLED display substrate provided in an embodiment of the present application, and referring to fig. 10, a supporting spacer portion 222 in the silicon-based OLED display substrate is disposed around at least one die 212; the support spacers 222 are arranged in a plurality of rows, with one row of support spacers 222 being located between adjacent rows of die 212.
Optionally, based on the above embodiment, fig. 11 is a top view of still another silicon-based OLED display substrate provided in the embodiment of the present application, and referring to fig. 11, the silicon-based OLED display substrate further includes two scribe lines 230 disposed between two adjacent dies 212, and the supporting isolation member is located between the two scribe lines 230.
The dicing streets 230 are used to provide dicing channels for dicing media such as grinding wheels, micro-water jet lasers, or lasers to separate the plurality of dies 212 on the wafer substrate into individual dies 212.
In particular, the two dicing lanes 230 may be evenly distributed about and/or on both sides of the center line of the adjacent two dies 212. When the dicing medium cuts the wafer substrate along the dicing streets 230, the supporting and isolating member is located between the two dicing streets 230, so that the supporting and isolating member can be removed along with the removal of the wafer substrate between the two dicing streets 230, even if the supporting and isolating member contacts with the mask and is adhered with particles, the particles cannot affect the silicon-based OLED product, which is beneficial to overcoming the technical problems of abnormal yield and package failure of the existing silicon-based OLED product. In other words, there is generally one scribe line 230 between adjacent dies 212, and two scribe lines 230 are disposed between adjacent dies 212 and a supporting spacer is disposed between the two scribe lines, so that on one hand, when a film layer on a die 212 is formed by vapor deposition, the supporting spacer can support a common mask for vapor deposition, and does not occupy a display area of a display panel to be finally formed, and particles remaining on the mask after cleaning are prevented from adhering to the die 212, even if the supporting spacer contacts the mask and adheres to the particles, the particles will not affect a silicon-based OLED product to be finally formed because the supporting spacer is removed along with the removal of a wafer substrate between the two scribe lines 230.
Note that the above is only a preferred embodiment of the present application and the technical principle applied. It will be understood by those skilled in the art that the present application is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the application. Therefore, while the application has been described in connection with the above embodiments, the application is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the application, which is set forth in the following claims.
Claims (9)
1. A silicon-based OLED display substrate, comprising:
a wafer substrate comprising a base and a plurality of dies formed on the base;
the support isolation components are positioned between adjacent bare chips on the wafer substrate, the height of the support isolation components is larger than that of the bare chips, and the support isolation components are used for supporting the universal mask for evaporation;
the display substrate further comprises two cutting channels arranged between two adjacent bare chips, and the supporting isolation component is positioned between the two cutting channels.
2. The display substrate of claim 1, wherein the support spacer members comprise support spacer bars extending in a row direction, each row of the die being located between two support spacer bars; or (b)
The support spacer includes support spacers extending in a column direction, with each column of the die being located between two support spacers.
3. The display substrate of claim 1, wherein the support spacer member comprises a plurality of discontinuous support spacer sub-portions.
4. A display substrate according to claim 3, wherein the supporting spacers are in the form of strips, blocks or columns.
5. A display substrate according to claim 3, wherein the support spacers are disposed around at least one of the dies.
6. A display substrate according to claim 3, wherein the supporting spacers are arranged in a plurality of rows, the supporting spacers of one row being located between the dies of an adjacent row.
7. A display substrate according to claim 3, wherein the top end of the support spacer portion remote from the wafer substrate comprises an upwardly projecting arcuate surface.
8. The display substrate according to claim 6, wherein the top end of the supporting spacer portion has an arch shape or a semicircular shape.
9. The display substrate according to claim 1, wherein the supporting spacer has a height in the range of 10 to 50 μm.
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