JP2013089475A - Light-emitting display device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-emitting display device having high reliability.SOLUTION: A light-emitting display device includes: a substrate 10; a light-emitting region 20 provided on the substrate 10; and a non-light-emitting region 30 provided in an outer edge of the light-emitting region 20 on the substrate 10. In the light-emitting region 20, a plurality of light-emitting pixels 21 are periodically arranged, each pixel 21 having a plurality of kinds of light-emitting subpixels having different light-emitting colors from each other, each subpixel having a first electrode 23, an organic compound layer 24 and a second electrode 25 in this order. In the non-light-emitting region 30, a plurality of non-light-emitting pixels 31 each having a plurality of non-light-emitting subpixels 32 are arranged. The light-emitting subpixels and the non-light-emitting subpixels 32 are partitioned by element separation films 15, respectively. In the non-light-emitting region provided in the outer edge in a row direction of the light-emitting region 20, of the non-light-emitting region 30, spacers 16 for partitioning the non-light-emitting pixels included in the region are provided.

Description

  The present invention relates to a light emitting display device, and more particularly, to a light emitting display device including an organic light emitting element and a method for manufacturing the same.

  An organic light emitting device is an electronic device in which an organic compound layer composed of a single layer or a plurality of thin film layers having a light emitting layer is sandwiched between a pair of electrodes, that is, a first electrode and a second electrode, It is known as an electronic device that can emit light with high brightness by current injection.

  In general, in an organic light-emitting element, when moisture enters an organic compound layer constituting the element, the organic compound layer deteriorates from an intruded portion. Due to the deterioration of the organic compound layer, the luminance of the organic light-emitting device including the organic compound layer is reduced, and problems such as a reduction in life occur. Therefore, in order to prevent this problem, the organic light emitting device is used in a state of being sealed with a material having low water permeability such as a glass plate, a metal plate, or an inorganic film such as SiN so as not to be exposed to the atmosphere. In recent years, it has been required to reduce the thickness of a sealing member, such as a sealing film, for the purpose of reducing the light absorption loss that may occur when the display device is thinned or provided with a sealing member. Yes.

  On the other hand, an active matrix light-emitting display device (organic EL display) in which a plurality of organic light-emitting elements are arranged includes a transistor (Transnastor (Tr)) for each pixel. Here, Tr is connected to a first electrode which is a constituent member of a plurality of organic light emitting elements provided on a substrate via a contact hole provided in an insulating film constituting the substrate, and a set of Tr1 and one first electrode. Are electrically connected to correspond. In addition, an element isolation film that partitions each first electrode and has an opening in a predetermined region is provided around each first electrode, and the opening of the element isolation film corresponds to the position where each pixel is provided. Yes.

  By the way, in the light emitting display device, when forming organic compound layers arranged on the first electrodes included in the respective organic light emitting elements and having different emission colors, openings are opened in specific regions corresponding to the respective emission colors. A vacuum vapor deposition method using a vapor deposition mask provided with is used. Here, the vapor deposition mask used when using the vacuum vapor deposition method is used in a state of being in contact with the surface of the element isolation film when performing vapor deposition.

Here, the element isolation film in contact with the vapor deposition mask has a width corresponding to the interval between the pixels and is disposed so as to surround the periphery of each first electrode, so that the contact area with the vapor deposition mask is large. It is assumed that Then, any of the phenomena shown in the following (A) to (D) may occur.
(A) A deposit attached to the vapor deposition mask contacts the surface of the element isolation film.
(B) A deposit adhered to the vapor deposition mask is pressed onto the element isolation film.
(C) Convex portions are formed on the surface of the vapor deposition mask, and the convex portions are in contact with the surface of the element isolation film.
(D) The convex portion is strongly pressed on the element isolation film.

  When any of the phenomena shown in the above (A) to (D) occurs, the surface of the element isolation film is rubbed by the attached matter or the convex portion, and is damaged such as a scratch. . In particular, if the deposition mask is displaced in the substrate surface direction in a state where the deposition mask is in contact with the element isolation film, the element isolation film is easily damaged and becomes a fatal defect.

  When a damaged portion is generated on the element isolation film, for example, moisture easily enters from the damaged portion. For this reason, there existed a problem that the light emission lifetime of an organic light emitting element became short. Specifically, when an organic compound layer, an electrode layer (upper electrode), and a sealing film are formed on the element isolation film whose surface is damaged, one of the formed organic compound layer, electrode, or sealing film is formed. A coverage defect occurred in the part, and moisture contained in the atmosphere entered from the coverage defect part. In addition, in the process before the deposition mask is brought into contact with the surface of the element isolation film, the deposition mask is in contact with the organic compound layer formed on the surface of the element isolation film, so that the element immediately below the organic compound layer is formed. The separation membrane was sometimes damaged. Also in this case, similarly to the above, the coverage defect was likely to occur from the damaged portion. When the damaged portion described above is deep, the damaged portion can be a fatal scratch that impairs display performance.

  Various attempts have been made to solve such a defect occurrence problem. For example, as disclosed in Patent Document 1, there has been proposed a display device including a spacer protruding in a direction perpendicular to the substrate surface from the element isolation film in the light emitting region. The display device of Patent Document 1 supports a vapor deposition mask by bringing a vapor deposition mask into contact with a spacer provided on the element isolation film, and deposits the vapor deposition mask from the surface of the element isolation film and the organic compound layer deposited on the element isolation film. Can be separated. Further, in Patent Document 1, in order to separate the vapor deposition mask in the light emitting area, about four spacers are arranged per display area at a predetermined installation point that is out of the display area to support the vapor deposition mask. .

JP 2003-257650 A

  By the way, in manufacturing one or a plurality of light-emitting display devices, an organic compound layer constituting the light-emitting display device is formed by a vacuum evaporation method using a vapor deposition mask in which a plurality of openings are periodically formed. . Here, when the deposition mask is placed on the element isolation film, local deformation occurs at the end of the periodically formed openings. The deformed portion comes into contact with the element isolation film. If it does so, a damaged part will generate | occur | produce in the element isolation film and the organic compound layer formed on this element isolation film in the outermost part of the pattern of the organic compound layer formed periodically. For this reason, when forming a 2nd electrode or a sealing film, the problem that the coverage defect generate | occur | produced in the part had arisen. Further, when moisture enters from the damaged portion, the penetrated moisture diffuses into the element isolation film and the organic compound layer. When the infiltrated moisture reaches the organic compound layer in the light emitting region, the luminance of the element is lowered, and a light emitting lifetime decreasing region (= dark area) is generated.

  In particular, when a plurality of light emitting display devices are manufactured from a large element substrate in a multi-cavity format, the above-described problem of poor coverage becomes significant. Here, when a plurality of light-emitting display devices are manufactured by multi-cavity, a plurality of sets of openings are provided so as to correspond to a plurality of light-emitting display device manufacturing regions. Then, a plurality of openings are arranged in the vapor deposition mask so as to correspond to the vapor deposition area per surface of the light emitting display device. At this time, as shown in FIG. 10, local deformation may occur between the crosspiece 53 of the vapor deposition mask 50 and the mask slit 52 at the end.

  A possible cause of this local deformation is the bending of the substrate or mask due to its own weight. That is, when aligning the substrate and the vapor deposition mask, the substrate and the mask are held apart from each other until the alignment is completed. At this time, the substrate and the vapor deposition mask are both bent by their own weight. Note that the deflection of the substrate due to its own weight increases as the substrate becomes larger. On the other hand, since the vapor deposition mask is fixed to a frame provided around the vapor deposition mask, a certain tension is applied. Therefore, if the vapor deposition mask becomes large, the amount of deflection due to its own weight is smaller than that of the substrate. Relatively small. For example, the amount of deflection due to its own weight is several hundreds μm in a substrate equivalent to 360 mm × 460 mm, while the amount of deflection due to its own weight in a vapor deposition mask of the same size is several tens of μm.

  If the bending is different in this way, a difference in curvature occurs between the substrate and the vapor deposition mask. When the vapor deposition mask and the substrate are overlapped in a state where the curvature difference is generated, the element isolation film on the substrate sequentially contacts the mask from the center of the substrate toward the periphery thereof. At this time, when the ideal parallel flat plates are overlapped with each other, a deviation in the surface direction that hardly occurs is likely to occur. When there is a deviation in the surface direction as described above, if the mask is locally deformed as described above, the mask and the element isolation film are strongly contacted and rubbed at the deformed portion of the mask. As a result, the element isolation film is damaged, and the coverage defect described above is generated. For this reason, when aligning the vapor deposition mask and the substrate, the frequency of damage to the surface of the element isolation film or the organic compound layer deposited on the surface of the element isolation film is high in the pixel at the outermost periphery in the light emitting region. It has become.

  Further, as in Patent Document 1, it is not possible to sufficiently prevent contact of the vapor deposition mask with the element substrate due to the deformation of the vapor deposition mask that occurs in the non-light-emitting region, simply by arranging the spacer in the light-emitting region.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide a highly reliable light-emitting display device.

The light-emitting display device of the present invention includes a substrate,
A light emitting region provided on the substrate;
A non-light emitting region provided on an outer edge of the light emitting region on the substrate,
A plurality of light emitting pixels are periodically arranged in the light emitting region,
The light emitting pixel has a plurality of types of light emitting subpixels having different emission colors,
The light emitting subpixel has a first electrode provided on the substrate, a second electrode, and an organic compound layer sandwiched between the first electrode and the second electrode,
A plurality of non-light emitting pixels are arranged in the non-light emitting region,
The non-light-emitting pixel has a plurality of non-light-emitting sub-pixels;
The light emitting subpixel and the non-light emitting subpixel are each partitioned by an element isolation film,
Among the non-light emitting regions, a spacer is provided in a non-light emitting region provided at an outer edge in the row direction of the light emitting region, and one non-light emitting pixel provided at an outer edge in the row direction of the light emitting region is provided by the spacer. It is divided into a plurality of pixels.

  The light-emitting display device of the present invention utilizes a vacuum deposition method using a vapor deposition mask, and is used to manufacture a plurality of light-emitting display devices in a multi-faced form from a large element substrate. In addition, the organic compound layer is not damaged. For this reason, a coverage defect does not occur in the electrode or the sealing film. Therefore, according to the present invention, a highly reliable light-emitting display device can be provided.

It is a plane schematic diagram which shows 1st embodiment in the light emission display apparatus of this invention. It is the elements on larger scale of the light emission display apparatus of FIG. It is a cross-sectional schematic diagram which shows the AA 'cross section of FIG. It is a plane schematic diagram which shows the other specific example of the arrangement | positioning aspect of a spacer. (A) is a plane schematic diagram which shows the positional relationship of the board | substrate and vapor deposition mask in the formation process of an organic compound layer, (b) is the elements on larger scale of the enclosing area | region in (a). It is a plane schematic diagram which shows the positional relationship of the board | substrate and vapor deposition mask in the formation process of an organic compound layer. It is a plane schematic diagram which shows the vapor deposition mask used when producing a some light emission display apparatus from a large format board | substrate. It is the plane schematic diagram which shows the large-sized board | substrate used when producing a several light emission display apparatus, (a) is a schematic diagram of the whole board | substrate, (b) is the enclosed part in (a). FIG. It is a schematic diagram which shows the positional relationship of a board | substrate and a vapor deposition mask when mounting the vapor deposition mask of FIG. 7 on the large format board | substrate of FIG. 8, (a) is a top view, (b) is in (a). It is sectional drawing which shows a BB 'cross section. In the conventional light emission display apparatus, it is a cross-sectional schematic diagram which shows a mode when a vapor deposition mask is mounted on the board | substrate.

  The light emitting display device of the present invention includes a substrate, a light emitting region provided on the substrate, and a non-light emitting region provided on the substrate and at the outer edge of the light emitting region.

  Here, a plurality of light emitting pixels are periodically arranged in the light emitting region, and the light emitting pixels have a plurality of types of light emitting subpixels having different light emission colors. The light-emitting subpixel includes a first electrode provided on the substrate, a second electrode, and an organic compound layer sandwiched between the first electrode and the second electrode.

  On the other hand, a plurality of non-light-emitting pixels are arranged in the non-light-emitting region, and the non-light-emitting pixels have a plurality of non-light-emitting subpixels.

  In the present invention, the plurality of light-emitting subpixels and the plurality of non-light-emitting subpixels are each partitioned by an element isolation film.

  In the present invention, a spacer is provided in a non-light emitting region provided in an outer edge of the light emitting region in the row direction, and a non-light emitting pixel provided in the outer edge of the light emitting region in the row direction is formed by the spacer. It is partitioned into one or a plurality of pixels. That is, the spacer is provided with a certain rule in the non-light emitting region provided at the outer edge in the row direction of the light emitting region. In addition, the arrangement position and operation effect of the spacer will be described later.

  Next, an embodiment of a light emitting display device of the present invention will be described with reference to the drawings. The following description is merely an example of the embodiments of the light emitting display device of the present invention, and the present invention is not limited to these embodiments.

  FIG. 1 is a schematic plan view showing a first embodiment of the light emitting display device of the present invention. Although FIG. 1 shows only a part of the light emitting region and the non-light emitting region provided at the outer edge of the light emitting region in the row direction, the same configuration is repeatedly provided in the row direction in practice. FIG. 2 is a partially enlarged view of the light emitting display device of FIG. 1, more specifically, a partially enlarged view of an encircled portion (reference numeral 2) in FIG. FIG. 3 is a schematic cross-sectional view showing the AA ′ cross-section of FIG. 2.

  The light-emitting display device 1 shown in FIGS. 1 to 3 is provided with a light-emitting region 20 and a non-light-emitting region 30 on a substrate 10.

  First, the light emitting area 20 and the pixels included in the light emitting area will be described. The light emitting area 20 includes light emitting pixels 21 that emit light under the control of an external circuit in order to perform display. The light emitting pixel 21 is, for example, a pixel having three types of subpixels shown in FIG. 2, that is, an R light emitting subpixel 21R, a G light emitting subpixel 21G, and a B light emitting subpixel 21B. However, the number of light emitting subpixels included in the light emitting pixel 21 is not limited to three, and may be two or four, for example.

  In the present invention, examples of the arrangement of the three types of light emitting subpixels (21R, 21G, 21B) included in the light emitting pixel 21 include a stripe arrangement and a mosaic arrangement. However, the present invention is not particularly limited. For example, as shown in FIGS. 1 and 2, in the column direction (X direction), the R light emission subpixel 21R, the G light emission subpixel 21G, and the B light emission subpixel 21B are RGBRGB. The pixels of the same color are arranged in the row direction (Y direction). That is, the arrangement of the three types of light emitting subpixels (21R, 21G, and 21B) shown in FIGS. 1 and 2 is a stripe arrangement.

  Here, organic light-emitting elements included in the three types of light-emitting subpixels (21R, 21G, and 21B) will be described with reference to FIG.

  As shown in FIG. 3, each light emitting subpixel (21R, 21G, 21B) has an organic light emitting element 22 provided on the substrate 10, respectively. Note that the substrate 10 shown in FIG. 3 is provided with a Tr circuit 12 for controlling the organic light emitting element 22 on the base material 11. Thus, when the Tr circuit 12 is built in the substrate 10, the insulating layer 13 and the planarizing film 14 are provided on the base material 11 or the Tr circuit 12. Here, the insulating layer 13 and the planarizing layer 14 serve to insulate between the Tr circuit 12 and the Tr circuit 12 provided in each pair of adjacent light emitting subpixels. The insulating layer 13 and the planarization layer 14 also serve to planarize the substrate 10 by filling the unevenness generated by providing the Tr circuit 12.

  On the other hand, the organic light emitting element 22 includes a first electrode 23, an organic compound layer 24, and a second electrode 25. Here, the organic compound layer 24 constituting the organic light-emitting element 22 is a single layer or a laminate composed of a plurality of layers having at least a light-emitting layer. Examples of the layer other than the light emitting layer that can be included in the organic compound layer 24 include a hole injection layer, a hole transport layer, an electron block layer, a hole block layer, an electron transport layer, and an electron injection layer. Specific examples of the layer structure of the organic compound layer 24 include a (first electrode) hole transport layer, a light emitting layer, and an electron transport layer (second electrode). However, the present invention is not limited to this. Is not to be done.

  On the other hand, the non-light emitting region 30 in FIG. 1 is a region provided on the outer edge of the light emitting region 20, and has non-light emitting pixels 31 that are not used for display. The non-light emitting pixel 31 has three non-light emitting sub-pixels 32 as shown in FIG. The non-light-emitting subpixel 32 has an organic EL element, like the light-emitting subpixel. In the present invention, the number of sub-pixels (non-light-emitting sub-pixels) included in the non-light-emitting pixels 31 is not limited to three.

  Incidentally, in the light emitting display device of the present invention, as shown in FIG. 3, an element isolation film 15 is provided between the first electrode 23 constituting the light emitting subpixel or the non-light emitting subpixel and the adjacent first electrode 23. Is provided. The element isolation film 15 is provided to partition each organic light emitting element 22 for each element. As shown in FIG. 3, a spacer 16 is provided at a specific position on the element isolation film 15. Here, as shown in FIGS. 1 and 2, the position where the spacer 16 is provided is at least between specific non-light emitting pixels 31 included in the non-light emitting region 30 provided at the outer edge of the light emitting region 20 in the row direction. Accordingly, the non-light emitting pixels 31 included in the non-light emitting region 30 provided at the outer edge of the light emitting region 20 in the row direction are partitioned into one or a plurality of pixels by the spacer 16. Here, “partition” is due to the regularity of the arrangement position of each spacer 16 in which a certain number (one or a plurality) of non-light emitting pixels 31 are arranged between the two spacers 16. However, in the present invention, the member that partitions the non-light emitting pixels 31 is not limited to the member that is continuously disposed on the element isolation film 15, but the discontinuous rows shown in FIGS. 1 and 2. One set of spacer groups arranged in one row in the direction (X direction) is included. The position where the spacer 16 is provided is not limited to the non-light emitting region 30 but may be provided in the light emitting region 20 or at the boundary between the light emitting region 20 and the non-light emitting region 30.

  Further, in the light emitting display device of the present invention, as shown in FIG. 3, a sealing film 26 having low water permeability on the organic light emitting element 22 and a sealing film 26 provided on the sealing film 26 due to external factors. An intermediate layer 27 and a protective substrate 28 are provided to prevent scratches. Here, the sealing film 26 has a function of preventing moisture from entering the organic layer from the outside.

  Hereinafter, the method for manufacturing the light emitting display device of the present invention will be described in detail.

  Examples of the substrate 10 which is a constituent member of the light emitting display device of the present invention include a glass substrate, an insulating substrate made of a synthetic resin, a conductive substrate or a semiconductor substrate having an insulating layer such as silicon oxide or silicon nitride formed on the surface. Can be mentioned. The element substrate 10 may be transparent or opaque.

  When the substrate 10 having the Tr circuit 12 is used when manufacturing the light emitting display device of the present invention, it is necessary to prepare a substrate with a Tr circuit in advance as described later.

When producing a substrate with a Tr circuit using, for example, a thin film transistor (TFT) as the substrate 10, first, a buffer layer (not shown) is formed on the entire surface of the glass substrate 11. Here, the buffer layer is provided to prevent impurities that may be generated from the base material 11 from entering the Tr circuit 12 or the like. Here, examples of the material constituting the buffer layer include SiN _x and SiO ₂ .

  Next, the Tr circuit 12 is formed on the buffer layer. At this time, one Tr circuit 12 is provided for each sub-pixel regardless of the light-emitting area 20 and the non-light-emitting area 30. However, the Tr circuit provided in the light emitting region 20 and the Tr circuit provided in the non-light emitting region 30 are different in function as described below.

  That is, the Tr circuit provided in the light emitting region 20 is formed with a Tr circuit for controlling the organic light emitting element 22 in sub-pixel units. The Tr circuit 12 provided in the light emitting region 20 includes a Tr that has a storage capacitor and other functions that are provided for each sub-pixel, although not shown.

  On the other hand, the Tr circuit provided in the non-light emitting region 30 is formed with a driver circuit Tr for supplying a data signal and a gate signal to each sub-pixel.

  When actually manufacturing the Tr circuit 12 made of TFT, the semiconductor layer 12a is first formed in a predetermined region on the buffer layer. Next, a gate insulating layer (not shown) is formed for the purpose of covering the semiconductor layer 12a (including the entire surface of the substrate). Note that the gate insulating layer is a part of the insulating layer 13. Next, the gate electrode 12b is formed over the gate insulating layer. Here, a region corresponding to the region immediately below the gate electrode 12b in the region where the semiconductor layer 12a is provided is a channel region. Next, an interlayer insulating layer (not shown) is formed for the purpose of covering the entire surface of the substrate including the gate electrode 12b. The interlayer insulating layer is a part of the insulating layer 13. Next, a contact hole 12c penetrating the interlayer insulating layer and the gate insulating layer is formed in a predetermined region of the interlayer insulating layer. Next, a source electrode 12d and a drain electrode 12e are formed on both sides of the channel region on the interlayer insulating layer. When the p-ch TFT circuit 12 is manufactured, a group 13 element such as boron is doped when the source electrode 12d and the drain electrode 12e are formed. On the other hand, when an n-ch TFT circuit 12 is manufactured, a Group 15 element such as phosphorus is doped. The source electrode 12d and the drain electrode 12e are formed in the contact hole, and the source electrode 12d is connected to the source region of the semiconductor layer 12a exposed under the contact hole, and the drain electrode 12e is connected to the drain region. The above-described method of forming the Tr circuit 12 is a method of forming a Tr circuit having a top gate structure. However, in the present invention, the structure of the Tr circuit is not limited to the top gate structure, and is well known. A Tr circuit having another structure may be employed.

After forming the Tr circuit 12 as described above, a low water-permeable layer (not shown) may be formed for the purpose of covering the Tr circuit 12. This low water permeability layer is a part of the insulating layer 13 and has a function of preventing moisture from entering the Tr circuit 12. As a constituent material of the low water permeable layer, SiN _x , SiNO _x , SiO _x , TEOS film or the like can be used.

  After the formation of the Tr circuit 12 or the low water permeable layer, a planarization layer 14 for planarizing the unevenness generated by the formation of the Tr circuit 12 is formed. The material of the planarizing layer 14 is not particularly limited as long as the unevenness generated by the formation of the Tr circuit 12 can be planarized. Examples of the constituent material of the planarizing layer 14 include acrylic resin, polyimide resin, norbornene resin, and fluorine resin. Moreover, when forming the planarization layer 14, a well-known thin film formation method and a thin film processing method are employable. For example, after forming a thin film by a coating method or the like, the thin film is processed into a desired pattern by a photolithography method or the like to form the planarization layer 14.

  Next, an electrode layer is formed on the insulating layer 13 or the planarization film 14. Specifically, the external connection terminal 40 and the first electrode 23 are formed.

  The external connection terminal 40 shown in FIG. 1 is formed on the insulating layer 13. Here, the constituent material of the external connection terminal 40 may be a conductive material used when forming the Tr circuit 12, or a conductive material used when forming the first electrode 23 described later. There may be. The external connection terminal 40 may be composed of one layer or a plurality of layers.

  A first electrode 23 is formed on the planarizing layer 14 in a region where at least the light emitting subpixels (21R, 21G, 21B) are provided. The first electrode 23 is electrically connected to the Tr circuit 12 through the contact hole 17. Depending on the function of the Tr circuit 12 formed in the non-light emitting region 30, the first electrode 23 may be formed in the region where the non-light emitting subpixel 32 is provided.

  The first electrode 23 may be a transparent electrode or a reflective electrode. Moreover, you may employ | adopt the laminated electrode formed by laminating | stacking a transparent electrode and a reflective electrode. Here, when the first electrode 23 is a transparent electrode, examples of the constituent material of the first electrode 23 include indium tin oxide and indium zinc oxide. When the first electrode 23 is a reflective electrode, the constituent material of the first electrode 23 is a single metal such as Au, Ag, Al, Pt, Cr, Pd, Se, or Ir, an alloy in which a plurality of these single metals are combined, Examples thereof include metal compounds such as copper iodide. The film thickness of the first electrode 23 is preferably 0.01 μm to 1 μm.

  As already described, the first electrode 23 is provided in the region where the light emitting subpixels (21R, 21G, 21B) are provided in the light emitting region 20. Here, the light emitting sub-pixels (21R, 21G, 21B) are periodically arranged as shown in FIGS. For this reason, the first electrodes 23 are also periodically arranged corresponding to the arrangement of the light emitting sub-pixels as shown in FIGS. Here, as an arrangement mode of the first electrode 23, for example, a stripe arrangement may be mentioned, but the present invention is not limited to this. In place of the stripe arrangement, a delta arrangement, a staggered arrangement, or the like may be adopted.

  When forming the first electrode 23, a known method can be employed. For example, after forming a conductive thin film to be the first electrode 23, the conductive thin film is processed (patterned) using a known thin film processing technique such as photolithography. Thereby, a plurality of first electrodes 23 are formed in a desired pattern shape in a region corresponding to the installation region of each light emitting subpixel. In addition, when forming the 1st electrode 23, you may form the external connection terminal 40 simultaneously.

After forming the first electrode 23, the element isolation film 15 is formed on the periphery of the first electrode 23. The element isolation film 15 is a member having the functions shown in the following (i) and (ii).
(I) Function for partitioning each light emitting subpixel (21R, 21G, 21B) and non-light emitting subpixel 32 in units of subpixels (ii) Function for defining the light emitting area of each light emitting subpixel (21R, 21G, 21B)

Examples of the constituent material of the element isolation film 15 include an inorganic insulating layer made of silicon nitride, silicon oxynitride, silicon oxide, or the like, an acrylic resin, a polyimide resin, a novolac resin, or the like. Preferably, an insulator having a volume resistivity of 1.0 × 10 ¹² Ω · cm or more is used. The film thickness of the element isolation film 15 is preferably 0.1 μm to 3 μm.

  Next, a spacer 16 is formed on the specific element isolation film 15.

  The constituent material of the spacer 16 may be the same material as the element isolation film 15 or a different material. The constituent material of the spacer 16 may be a conductive material. When the spacer 16 is formed of the same material as the element isolation film 15, the spacer 16 may be formed together with the element isolation film 15. As a method for forming the element isolation film 15 and the spacer 16 at the same time using the same material, a forming method using a photolithography process is employed. Here, when the photolithography process is used, it is preferable to employ multistage exposure or gray tone exposure. The film thickness of the spacer 16 is preferably 0.1 μm to 3 μm.

  When patterning the organic compound layer 24 to be described later with a vapor deposition mask, the vapor deposition deposits in a region wider than the mask opening width as the distance between the vapor deposition mask and the substrate 10 (the surface thereof) increases. End up. This may cause, for example, a problem of unintentional film deposition on adjacent pixels. Therefore, in the present invention, it is desirable to set the height of the element isolation film 15 to be low, and to set it relatively lower than the height of the spacer 16, that is, to set the height of the element isolation film 15 higher than that of the spacer 16. Lowering is preferable.

  Here, the arrangement position of the spacer 16 will be specifically described. However, in this invention, the arrangement | positioning aspect of the spacer 16 is not limited to the aspect demonstrated below.

  In the first embodiment of the present invention, as shown in FIGS. 1 and 2, the spacer 16 is provided at the light emitting region 20, the non-light emitting region 30, or the boundary line between the light emitting region 20 and the non-light emitting region 30. Yes.

  In the first embodiment of the present invention, the spacer 16 provided in the light emitting region 20 is specifically the end of the light emitting subpixels (21R, 21G, 21B) arranged in the light emitting region 20. Spacers 16a provided between the light emitting sub-pixels arranged in the row.

  In the first embodiment of the present invention, the spacers 16 provided in the non-light emitting region 30 are specifically the spacers 16b provided between the non-light emitting subpixels 32 arranged in the non-light emitting region 30. Say.

In the first embodiment of the present invention, the spacer 16 provided on the boundary line between the light emitting region 20 and the non-light emitting region 30 specifically includes the light emitting subpixel shown in the following (i) and the following (ii). The spacer 16c provided between the non-light emitting subpixels shown in FIG.
(I) Among the light emitting subpixels arranged in the endmost row among the light emitting subpixels (21R, 21G, 21B) arranged in the light emitting region 20, the light emitting subpixel arranged in the endmost column ( ii) Non-light-emitting subpixels adjacent to the light-emitting subpixels in (i) in the row direction

  In FIG. 1 and FIG. 2, the spacers 16 are provided at a pitch of 1 pixel in the column direction (X direction) in which light emitting subpixels having different emission colors are arranged. On the other hand, in the row direction (Y direction) in which sub-pixels of the same color are arranged, they are provided at a two-pixel pitch. That is, in the first embodiment of the present invention, the arrangement of the spacers is arranged more densely in the column direction than in the row direction. In the light-emitting display device 1 shown in FIGS. 1 and 2, one spacer is used for supporting a plurality of masks between adjacent sub-pixels in the row direction. It is not limited. In the present invention, the pitch of the spacers 16 provided in the row direction (the number of non-light emitting sub-pixels 30 in the row direction partitioned by the spacers 16) is not limited to the two-pixel pitch described above.

  FIG. 4 is a schematic plan view showing another specific example of the arrangement mode of the spacers 16. FIG. 4 is also a modification of FIG.

As an arrangement mode of the spacers 16, for example, as shown in FIGS. 1 and 2, there is a mode that satisfies all the following conditions (a) to (c).
(A) The width of the spacer in the longitudinal direction is equal to the short side of one subpixel. (B) It is arranged between adjacent subpixels in the row direction. (C) In the column direction, one subpixel is defined as one segment. Discontinuously arranged

However, the above conditions (a) to (c) can be changed as appropriate without departing from the scope of the present invention. For example, as shown in FIG. 4A, the following condition (c ′) may be used for the spacer 16b provided in the non-light emitting region 30 instead of the condition (c). When the following condition (c ′) is used instead of the condition (c), the condition (a) is excluded.
(C ′) Continuously arranged over a plurality of subpixels in the column direction

  Further, as shown in FIG. 4A, the spacer 16a provided in the light emitting region 20 may be further expanded without limiting the installation range to the light emitting subpixels arranged in the endmost row. Good. In such a case, the pitch of the spacers 16 provided in the light emitting region and in the row direction may be the same cycle as the pixel pitch (one pixel pitch), or may be longer than the pixel pitch (two pixel pitches). Also good.

  Further, as shown in FIG. 4B, the spacers 16 may be disposed between adjacent subpixels in the column direction, or may be disposed between diagonal pixels.

  On the other hand, when there are a plurality of spacers 16 provided on the boundary between the light emitting region 20, the non-light emitting region 30, or the light emitting region 20 and the non-light emitting region 30, each spacer may have the same shape, density, and arrangement. Alternatively, as shown in FIG. 4B, it may be changed for each spacer.

  By the way, in the light emitting display device of the present invention, at least one pair or more of spacers are arranged in the non-light emitting region 30 provided at the outer edge of the light emitting region 20 in the row direction. The reason for this will be described below with reference to the drawings as appropriate.

  FIG. 5A is a schematic plan view showing the positional relationship between the substrate and the vapor deposition mask in the step of forming the organic compound layer. FIG. 5B is a partially enlarged view of the enclosed area (reference numeral 3) in FIG. FIG. 5 is a diagram showing a process of forming the red organic compound layer 24 (24R) constituting the red light emitting subpixel 21R.

  As shown in FIG. 5, when the red organic compound layer 24R is formed, the R pixel row 32R in the R light emitting subpixel 21R or the non-light emitting pixel 31 arranged in the row direction, the mask opening 51, The vapor deposition mask 50 is placed so as to correspond respectively. The vapor deposition mask 50 includes an opening 51 and a slit portion 52 provided between the opening 51 and the opening 51. Here, the opening 51 and the slit portion 52 are provided in the vapor deposition region 53, and a region outside the vapor deposition region 53, for example, an outer peripheral portion of the vapor deposition mask 50 is a mask crosspiece 54.

  As shown in FIG. 5, when the vapor deposition mask 50 is disposed, the spacer 161 provided in the R pixel row 32 </ b> R can be visually recognized through the opening 51 of the vapor deposition mask 50. On the other hand, since the spacers 162 and 163 provided in the G pixel column 32G and the B pixel column 32B are covered with the slit portion 52 of the mask, they cannot be visually recognized. In other words, the spacers 162 and 163 support the mask 50 when forming the red organic compound layer 24R included in the R light emitting subpixel 21R and the R pixel column 32R. On the other hand, the spacers 161 and 163 support the mask 50 when forming the blue organic compound layer 24B included in other subpixels, for example, the B light emitting subpixel 21B and the B pixel column 32B. As described above, in the present invention, when a plurality of types of organic compound layers are formed, there is a spacer having a function of supporting the mask in any case.

  Further, as shown in FIG. 5, there are a plurality of openings 51 provided in the mask 50, which are periodically provided at positions corresponding to the R light emission sub-pixels 21R or the R pixel rows 32R. Are common. Specifically, the dimension of the opening 51 in the row direction (direction in which the same kind of subpixels are arranged) is the same length as the width of the light emitting region 20 in the row direction (direction in which the same kind of subpixels are arranged). It is. The dimension of the openings 51 in the column direction is a rectangular shape having a length obtained by adding the width of the element isolation film 15 (one) to the short side of the R light emitting subpixel 21R or the pixel column R32R.

  In addition, as the vapor deposition mask 50 used in the light emitting layer forming step (light emitting layer coating step), a known vapor deposition mask can be applied as long as it exhibits the effects of the present invention. Further, the shape of the opening of the vapor deposition mask 50 may be the slit type shown in FIG. 5A, but other than this, the slot type or dot type mask shown in FIG. 6 can be used. . Here, the width in the longitudinal (row) direction of the rectangular opening 51 provided in the slot type vapor deposition mask 50 shown in FIG. 6 corresponds to a plurality of pixels. Further, in the slot type vapor deposition mask 50 shown in FIG. 6, a small slit portion 56 is provided between the openings 51 arranged in the row direction, and this small slit portion 56 is placed on the spacer 16. It will be. As a result, it is possible to prevent the organic compound layer 24 from being formed on some of the spacers 16. When the slot type vapor deposition mask 50 shown in FIG. 6 is used, defects (coverage defects) associated with damage to the organic compound layer 24 on the spacers 16 provided in the light emitting region 20 can be avoided. become.

  The same can be applied to a dot mask in which the size of the opening of the vapor deposition mask is one subpixel.

  Here, when the slit-type vapor deposition mask shown in FIG. 5A is used, it is preferable to arrange the spacers 16 symmetrically in order to support the both ends of both ends (right end, left end). .

  Here, when the separation distance between the substrate 10 and the vapor deposition mask 50 is reduced, the vapor deposition mask 50 comes into contact with the top surfaces of the spacers 162 and 163. At this time, the deposition mask 50 and the surface of the element isolation film 15 are sufficiently separated from each other by the spacers 162 and 163 while maintaining a certain separation distance. Therefore, the spacer 16 has a function of separating the surface of the element isolation film 15 provided on the substrate 10 from the vapor deposition mask 50 disposed opposite to the surface.

  By the way, the present invention is particularly useful when a plurality of light emitting display devices are manufactured on a large substrate.

  FIG. 7 is a schematic plan view showing a vapor deposition mask used when manufacturing a plurality of light emitting display devices from a large-sized substrate. Here, the vapor deposition mask 50 shown in FIG. 7 is formed in 3 rows and 3 columns on a large-sized substrate, that is, after a total of nine light-emitting display devices are formed on a large-sized element substrate, each of the nine light-emitting display devices. It is a vapor deposition mask used when manufacturing by dividing | segmenting. Further, the vapor deposition mask 50 shown in FIG. 7 is provided with a mask opening 51 so as to correspond to the light emitting region of each light emitting display device. In addition, although nine sets of openings 51 are provided in the vapor deposition mask 50, this number corresponds to the number of chamfers of the light emitting display device. On the other hand, the vapor deposition mask 50 shown in FIG. 7 is fixed to the mask frame 56 with a certain tension applied so that the vapor deposition mask 50 itself does not bend.

  In addition, the shape of the opening 51 provided in the vapor deposition mask 50 shown in FIG. 7 may be the slit type shown in FIG. 7, but other than this, a slot type or dot type mask can be used. .

  FIG. 8 is a schematic plan view showing a large-sized substrate used when a plurality of light-emitting display devices are manufactured, (a) is a schematic diagram of the entire substrate, and (b) is a diagram in (a). It is the elements on larger scale which show the surrounding part (code | symbol 4). The substrate 10 of FIG. 8 is a substrate used for manufacturing a light emitting display device arranged in 3 rows and 3 columns as shown in FIG. The light emitting region 20 and the non-light emitting region 30 are respectively disposed between the two. Further, as shown in FIG. 8B, the spacer 16 is disposed so as to partition the non-light emitting region 30 every two non-light emitting pixels (31).

  Here, the process of forming the organic compound layer by separate coating on the large substrate (substrate 10) of FIG. 8 using the vapor deposition mask 50 of FIG. 7 will be described below.

  FIG. 9A is a schematic plan view showing the positional relationship between the substrate and the vapor deposition mask when the vapor deposition mask of FIG. 6 is placed on the large substrate of FIG. FIG. 9A is a diagram showing a positional relationship between the substrate 10 and the vapor deposition mask 50 in the formation process of the blue organic compound layer 24B constituting the B light emitting subpixel 21B.

  As shown in FIG. 9A, in the formation process of the blue organic compound layer 24B, the vapor deposition mask 50 having the openings 51 in the B pixel row 32B included in the B light emitting subpixel 21B or the non-light emitting region 30 is used. The In the step of forming the blue organic compound layer 24B, when the vapor deposition mask 50 is placed on the substrate 10, the spacer 163 provided in the B light emitting subpixel 21B or the B pixel row 32B included in the non-light emitting region 30 is a vapor deposition mask. It can be visually recognized through 50 openings 51. On the other hand, the spacers 161 and 162 respectively provided in the other pixel rows (32R and 32G) are covered with the slit portion 52 or the crosspiece portion 54 of the mask and cannot be visually recognized.

  When the vapor deposition mask 50 is brought close to the substrate 10 and the distance between the two is reduced, the slit portion 52 or the crosspiece 54 of the vapor deposition mask 40 finally comes into contact with the top surfaces of the spacers 161 and 162.

  FIG. 9B is a schematic cross-sectional view showing the BB ′ cross section of FIG. FIG. 10 is a schematic cross-sectional view showing a state in which a vapor deposition mask is placed on a substrate in a conventional light emitting display device. FIG. 10 is a schematic cross-sectional view showing a comparative form of FIG. Specifically, FIG. 10 shows an aspect in which the spacers (161, 162, 163) provided in the non-light emitting region 30 are omitted in the aspect shown in FIG. The organic compound layer 24 shown in FIG. 9B and FIG. 10 is an organic compound layer of another color already formed using mask film formation, and is common to each subpixel. The common layer to be formed is not shown.

  Incidentally, a strong tension is applied to the vapor deposition mask 50 along the longitudinal direction of the opening 51 of the mask. Here, the width of the slit portion 52 of the mask is about twice the short side of the sub-pixel (specifically, about 50 μm to 200 μm). For this reason, in the slit part 52, the distortion and twist of the slit part 52 in the minor axis direction hardly occur. However, the width of the crosspiece 54 of the mask located between the light emitting display devices is about the width of the frame of the light emitting display device (at least about 2 mm or more). For this reason, the distortion shown in FIG. 9B and FIG. 10 occurs in the crosspiece 54 of the mask due to the tension applied to the vapor deposition mask 50.

  Here, as shown in FIG. 9B, when the spacers (161, 162, 163) are provided in the non-light emitting region 30, the vapor deposition mask 50 and the element are formed by the spacers 161, 162 contacting the slit portion 52 or the crosspiece portion 54. The separation membrane 15 (the surface thereof) is sufficiently separated. For this reason, the element isolation film 15 is not scratched. Accordingly, when the sealing film 26 is formed in a later step, no defect portion is generated in the formed sealing film 26, so that display deterioration does not occur.

  On the other hand, as shown in FIG. 10, if the spacers (161, 162, 163) are not provided in the non-light emitting region 30, both end portions on the short axis side of the mask beam portion 54 and slit portions adjacent to the beam portion 54 are provided. The end portion of 52 is in strong contact with the element isolation film 15 (the surface thereof). Then, scratches are imparted to the element isolation film 15 or the organic compound layer 24 provided on the element isolation film 15. As a result, when the sealing film 26 is formed in a later process, the sealing film 26 is also formed at a location where the scratch is generated. If it does so, a defect will generate | occur | produce in the sealing film 26 currently formed in the location where the said crack | wound has generate | occur | produced. This defect becomes a moisture intrusion route and causes display deterioration.

  However, when providing the spacers 16, it is desirable to limit the number thereof to a certain amount. The greater the number of spacers 16 installed, the greater the chance of contact between the spacers 16 and the vapor deposition mask 50 and the greater the risk of damage to the spacers 16 themselves, and the effects of the present invention (preventing the occurrence of display deterioration) are not necessarily achieved. Because there is no.

  As a result of the experiments conducted by the inventors, the damage occurrence rate on the spacer at a level that can induce defects in the sealing film 26 is estimated to be several ppm to several tens of ppm. It can be said that it is desirable to arrange the minimum number of spacers 16 within a range in which the separation state between the element isolation film 15 (the surface thereof) and the vapor deposition mask 40 is not impaired in consideration of the examination result.

  In order to reduce the scratches on the spacers 16 that cause defects in the sealing film 26, it is preferable to increase the arrangement pitch of the spacers 16. For this reason, it is preferable to make the pitch of the spacers 16 as wide as possible within a range in which the separation state between the element isolation film 15 on the substrate 10 and the vapor deposition mask 50 can be guaranteed. This is because by increasing the pitch of the spacers 16, the number of spacers in the light emitting region can be reduced, so that the incidence of scratches that can occur in the light emitting region can be reduced. It is important to form the spacer 16 with an area as narrow as possible as compared with the element isolation film 15 while preventing the vapor deposition mask 50 from contacting the element isolation film 15. Here, it is preferable that the maximum cross-sectional area of the spacer 16 in the substrate vertical direction is smaller than the cross-sectional area of the element isolation film 15 provided at the same position.

  In the present invention, the shape of the spacer 16 includes, for example, a weight-like structure such as a cone or a pyramid, but is not necessarily limited to this shape (structure). As shown in FIG. 1, FIG. 2, etc., it may be a structure that is linear or chain-like in plan view, specifically, a structure such as a prism or a truncated pyramid. Here, when the shape of the spacer 16 is a prism or a truncated pyramid, there may be a case where a recess having a depth of about several hundred nm is locally formed on the deposition mask surface. For this reason, even if it cannot support in the dent part of a vapor deposition mask by using the spacer of the shape of a linear or chain line shape by planar view, a vapor deposition mask can be supported in the vicinity of the dent part. Therefore, it is possible to avoid the risk of failing to locally separate the element isolation film 15 and the vapor deposition mask 50. In addition, such a local dent of the vapor deposition mask often depends on the mask manufacturing process.

  The height of the spacer 16 is sufficient so that the surface of the vapor deposition mask 50 facing the surface of the element isolation film 15 with respect to the edge of the mask crosspiece 54 and the adjacent slit portion 52 distorted by the tension applied to the mask itself is sufficient. There is no particular limitation as long as the distance that can be separated is maintained.

  Specifically, at least a distance greater than the film thickness of the organic compound layer 24 deposited on the element isolation film 15 or the convex size of the surface of the vapor deposition mask 50 facing the element isolation film 15 is required. Generally, the film thickness of the organic compound layer constituting the pixel including the organic light emitting element is in the range of several tens of nm to 300 nm. On the other hand, the convex size of the vapor deposition mask surface used for separately coating the light emitting layer or the like is in the range of Ra = 100 nm to 500 nm. Therefore, in consideration of these, the height of the spacer 16 is preferably 500 nm or more in order to maintain a separation distance of 500 nm or more in the light emitting region 20.

  In the vapor deposition mask used when the light emitting display device of the present invention is manufactured, the portions with the largest twist and distortion are the mask frame portion 54 and the adjacent slit portion that form the opening that becomes the outermost periphery of the slit opening pattern. 52. Here, when forming the pattern of the outermost organic compound layer, the spacer 16 b that supports the vapor deposition mask 50 in the non-light emitting region 30 is relatively higher than the spacer 16 a provided in the light emitting region 20. In addition, it is preferable to increase the density. By doing so, the effect of the present invention appears more remarkably. The above-mentioned “increasing the density” means that the number of the spacers 16 provided per unit area is larger in the spacers 16 b provided in the non-light emitting region 30 than in the spacers 16 a provided in the light emitting region 20. means.

  After forming the spacer 16 on the specific element isolation film 15 as described above, the organic light emitting element 22 is formed for each light emitting subpixel (21R, 21G, 21B). In practice, however, the substrate pretreatment process, which will be described below, is performed before the organic light emitting element is formed.

  Specifically, the substrate 10 is pretreated by first performing a baking process in a vacuum atmosphere and then processing the substrate with oxygen plasma.

  After the pretreatment of the substrate as described above, the constituent members (organic compound layer 24, second electrode 25) of the organic light emitting element 22 other than the first electrode 23 are sequentially formed. Specifically, the substrate 10 on which the first electrode 23 is formed is placed in a vacuum atmosphere, and in a state where the vacuum atmosphere is maintained, for example, a hole transport layer, a light-emitting layer, an electron transport are formed on the first electrode 23. An organic compound layer 24 composed of layers is formed. As a constituent material of the layer constituting the organic compound layer 24, a known compound can be used. The organic compound layer 23 can be formed by a known thin film forming method such as a vacuum deposition method or an ink jet method. In the case of manufacturing a light emitting display device in which a plurality of types of sub-pixels shown in FIGS. 1 and 2 are formed with a specific pattern, the organic compound layer 24 is formed using a vapor deposition method or the like. Then, the organic compound layer 24 is selectively formed using a high-definition mask for a desired light emitting area. In the case where the organic compound layer 24 is formed using an inkjet method or the like, the organic compound layer 24 is selectively formed in a desired light emitting area using a high-precision nozzle (discharger).

  Here, referring to FIG. 5 as appropriate, a process of patterning and forming light emitting layers (not shown) included in the R light emitting subpixel 21R, the G light emitting subpixel 21G, and the B light emitting subpixel 21B by using the vapor deposition method. explain. In addition, the said patterning formation process is a coating process of each light emitting layer (R light emitting layer, G light emitting layer, B light emitting layer) using a vapor deposition mask specifically ,. Hereinafter, the process of forming the R light emitting layer will be described as a specific example.

  After the hole transport layer is formed on the first electrode 23, the substrate 10 is transported to the film formation chamber in which the R light emitting layer is formed. Next, after performing alignment (positioning) between the vapor deposition mask 50 and the substrate 10, the substrate 10 is brought close to the vapor deposition mask 50, and the vapor deposition mask 50 is placed on the substrate 10. At this time, the vapor deposition mask 50 comes into contact with the spacer 16. In practice, the vapor deposition mask 50 comes into contact with the hole transport layer formed on the spacer 16. In this state, an R light emitting layer is formed on the first electrode 23 included in the R light emitting subpixel 21R until a predetermined film thickness is reached. Similarly, a G light emitting layer and a B light emitting layer are also formed. The layers other than the light emitting layer constituting the organic compound layer 24 are formed in a predetermined film formation chamber as a layer common to each subpixel.

  In the present invention, during the period from the alignment step between the substrate 10 and the vapor deposition mask 50 to the completion of the light emitting layer formation step, the vapor deposition mask 50 is provided on the surface of the element isolation film 15 provided on the substrate 10. The state of being separated from each other is maintained. For this reason, the vapor deposition mask 40 does not damage the surface of the element isolation film 15. Further, in the spacer 16 in contact with the vapor deposition mask 50, it is possible to sufficiently suppress the occurrence rate of damage by reducing the number of spacers less than the number of pixels and reducing the contact area with the vapor deposition mask 50. .

  After the organic compound layer 24 is formed, the second electrode 25 (upper electrode) is formed. The second electrode 25 may be a transparent electrode or a reflective electrode. As the constituent material of the second electrode 25, the same material as the constituent material of the first electrode 23 described above can be used. As a method for forming the second electrode 25, a Kochi thin film forming method can be employed. By forming the second electrode 25 in this manner, the organic light emitting element 22 in which the first electrode 23, the organic compound layer 24, and the second electrode 25 are laminated in this order on the substrate 10 is formed. Will be. When a plurality of light emitting display devices 1 are formed from a large substrate, the plurality of light emitting display devices 1 are arranged in a matrix on the large substrate.

  After forming the second electrode 25, a sealing film 26 is formed on the second electrode 25 so as to cover the entire surface of the substrate 10. The constituent material of the sealing film 26 is not particularly limited as long as the material has electrical insulation and airtightness and can prevent deterioration of the organic light emitting element. Specifically, silicon nitride, silicon oxide, silicon nitride oxide, and the like can be given.

  As a method for forming the sealing film 26, a vacuum deposition method, a plasma CVD method, a sputtering method, or the like can be adopted, but the present invention is not limited to these. As the sealing film 26, it is preferable to use a film that has been confirmed as having no intrusion of moisture or the like in a durability test under a high temperature and high humidity condition (for example, a temperature of 60 ° C. and a humidity of 90%). The thickness of the sealing layer 26 is preferably in the range of 0.1 μm to 10 μm. This is because if the sealing layer 26 is too thick, the light absorption loss in the sealing layer 26 increases.

  By the way, since the sealing film 26 plays a role of preventing entry of oxygen and moisture from the outside and preventing deterioration of the element, it is necessary to suppress the occurrence of defects in the sealing film 26 as much as possible. For this reason, it is necessary to manage the particles that may originally exist on the substrate 10 to be used, the particles that can be generated during the process until the formation process of the sealing film 26, and the particles that can be generated during the plasma CVD process. is there. Further, even when the substrate surface has large irregularities, defects may occur in the sealing film 26. Therefore, the shape of the element isolation film 15 and the shape of the through hole (not shown) provided around the first electrode 23 are as follows. It is preferable to avoid a steep angle with respect to the horizontal direction.

  After forming the sealing film 26, the protective substrate 28 is disposed on the sealing film 26 via the intermediate layer 27.

  The intermediate layer 27 is provided for bonding and fixing the sealing film 26 and the protective substrate 28 together. Further, the material, thickness, and manufacturing method of the intermediate layer 27 are not particularly limited as long as the intermediate layer 27 has high transmittance. For example, it can be formed by applying a resin sheet having adhesiveness or an adhesive layer, or a curable resin.

  Here, when the intermediate layer 27 is formed using a resin sheet, the protective substrate 28 is bonded to the substrate on which the sealing film 26 has been formed via the resin sheet under reduced pressure, and then baked. The resin sheet used at this time may have a solid shape covering the entire surface of the large-sized substrate 10, but a resin sheet having a pattern shape in which the resin sheet is punched in the scribe line 60 between the light emitting display devices 1 may be adopted. it can. Here, the punching pattern of the resin sheet may be a part of the scribe line 60. Further, by removing the intermediate layer 27 on the scribe line 60, it is not necessary to cut and separate the intermediate layer 27, and the accuracy of the cutting position is improved. Further, in order to expose the external connection terminal portion 40, a resin sheet punching pattern can be provided also at the position of the scribe line 60 in the protective substrate 28 between the light emitting regions 20.

  On the other hand, when a curable resin is used as the constituent material of the intermediate layer 27, the curable resin is applied onto the sealing film 26, and the protective substrate 28 is placed on top of the curable resin and pushed to a predetermined thickness. Thereafter, the cross-sectional form shown in FIG. 3 is obtained by performing the curing operation.

  The protective substrate 28 is basically made of a material having a predetermined pressing strength. Desirably, the material and thickness are not particularly limited as long as the substrate is highly moisture-proof and has a high transmittance. For example, a substrate such as glass or acrylic, a resin film, or the like can be used.

  The protective substrate 28 can be formed in a solid shape that covers the entire surface of the large-sized substrate 10. On the other hand, it is possible to select a manufacturing method in which the protective substrate 28 is cut to the size of the light emitting display device, and the cut protective substrate 13 is bonded to each light emitting display device. However, the number of protective substrates 28 to be handled increases, and it is necessary to individually align each light emitting display device in order to maintain the bonding accuracy for each light emitting display device. For this reason, productivity may be remarkably impaired.

  Subsequently, the substrate 10 and the protective substrate 28 are cut at the scribe line 60 to expose the external connection terminal portion 40, and then the light-emitting display device 1 is subjected to a flexible wiring substrate (not used) for performing light emission control on a sub-pixel basis. Connected to the figure). Through the above steps, the light emitting display device 1 of the present invention is completed.

  In the light emitting display device manufactured as described above, spacers are arranged at predetermined positions on the substrate. For this reason, even if a large mask deformation occurs in the opening at the extreme end of the vapor deposition mask, the surface of the substrate and the vapor deposition mask are separated from each other. Accordingly, it is possible to reduce the damage of the surface of the element isolation film or the organic compound deposited on the surface of the element isolation film and the occurrence of display defects due to the damage.

[Example 1]
The active matrix light-emitting display device 1 (organic EL display device) shown in FIG. 3 was manufactured by the following method. As shown in FIGS. 1 and 2, the spacer 16 provided in the present embodiment is provided in the non-light emitting region 30 at the outer edge on the row direction side of the light emitting region 20. The included non-light emitting pixels 31 are divided into one pixel or two pixels. The spacers 16 provided in this embodiment are also provided between the sub-pixels in the rows at both ends of the light emitting region 20, as shown in FIGS. The substrate 10 used in this example is the substrate 10 including the TFT circuit 12 shown in FIG.

(1) Light-Emitting Display Device The light-emitting display device 1 (organic EL display device) manufactured in this example has the configuration shown in FIGS. 1 to 3, and the size of the display device is 3 inches diagonal. (X direction 61 mm, Y direction 46 mm). In the light emitting area 20 included in the light emitting display device 1, the number of subpixels is 640 × 480 × RGB (equivalent to VGA) (number of pixels: 640 × 480), and the length of the subpixels (21R, 21G, 21B). The pitch on the side is about 95 μm, and the pitch on the short side is about 32 μm. The height of the spacer 16 is 1.5 μm, the length (X direction) is 5 μm, and the width (Y direction) is 3 μm. On the other hand, the height of the element isolation film 15 is 0.8 μm, which is Is set too low. Since the element isolation film 15 has a length corresponding to the light emitting region in both the column direction (X direction) and the row direction (Y direction), the cross-sectional area of the spacer 16 is sufficiently smaller than the cross-sectional area of the element isolation film 15. . Hereinafter, the manufacturing method of the light emitting display device of the present invention will be described focusing on the method of forming the element isolation film and the spacer.

(2) Method for Forming Element Isolation Film After the first electrode 23 is formed on the substrate 10, a positive photosensitive resist containing polyimide is applied onto the first electrode 23 and the substrate 10 by spin coating. A film was formed. Next, after irradiating the region where the resist is to be removed with exposure light, an element isolation film 15 was formed by performing development and baking processes. The element isolation film 15 serves to expose the first electrode 23 and cover the end portion of the first electrode 23.

(3) Spacer Formation Method After the element isolation film 15 is formed, the above-described resist (a positive photosensitive resist containing polyimide) is formed and processed in the same manner as the element isolation film 15 to obtain a specific A spacer 16 was formed on the element isolation film 15. In the present embodiment, the height of the spacer 16 was 1.5 μm.

(4) Organic Light-Emitting Element Formation Step Next, the substrate 10 on which the element isolation film 15 and the spacer 16 were formed was baked in a vacuum atmosphere, and then the substrate was pretreated with oxygen plasma. Next, a hole transport layer was formed on the entire surface of the light emitting region while maintaining a vacuum atmosphere. At this time, the thickness of the hole transport layer was set to about 80 nm. Next, the substrate is transported to the film formation chamber for forming the R light emitting layer, and after performing the alignment process between the vapor deposition mask 50 having the stripe-shaped opening 51 and the substrate 10 shown in FIG. A film was formed in the region where the light emitting subpixel 21R was provided. When the R light emitting layer was formed, the vapor deposition mask 50 was supported on the spacer 16 shown in FIG. 8 (spacers (161, 162) shown in FIG. 9). Here, as shown in FIG. 9, the vapor deposition mask 50 is supported only on the spacers (161, 162) because of the height of the spacers (161, 162). That is, the length of the vapor deposition mask crosspiece 54 and the slit portion 52 protruding from the top surface of the spacer 16 to the element isolation film 15 side is shorter than the height (1.5 μm) of the spacers 161, 162. Because. Specifically, the maximum is 500 nm. Further, since the thickness of the hole transport layer was 80 nm, the vapor deposition mask 50 did not come into contact with the hole transport layer formed on the element isolation film 15. After forming the R light emitting layer, a G light emitting layer and a B light emitting layer were sequentially formed in another film forming chamber. Next, in another film formation chamber, an electron transport layer was formed on the entire surface of the light emitting region.

  In the period from the alignment process of the substrate 10 and the vapor deposition mask 50 to the completion of the film formation process of each light emitting layer, the state where the surface of the element isolation film 15 and the vapor deposition mask 50 are separated is maintained. Yes. For this reason, the vapor deposition mask 50 did not damage the surface of the element isolation film 15 and the organic compound layer 24 formed on the element isolation film 15. Also, in the spacers 16 that are in contact with the vapor deposition mask 50, the total number of spacers 16 is 2410 to reduce the contact area with the vapor deposition mask 50. Thereby, since the number of the spacers 16 with respect to the defect probability (up to several tens of ppm) on the spacers 16 is small, the occurrence rate of damage can be sufficiently suppressed.

After the organic compound layer 24 was formed, an Ag alloy thin film was formed on the organic compound layer 24 with a film thickness that allows light to pass through to form the second electrode 25. Subsequently, silicon nitride (SiN _x ) was formed on the second electrode 25 to form the sealing layer 26. The film thickness of the sealing layer 26 at this time was 2 μm. The protective substrate 28 was bonded to the sealing layer 26 through the intermediate layer 27. Thus, a light emitting display device having the cross-sectional configuration shown in FIG. 3 was obtained.

  The obtained light emitting display device did not cause a light emitting defect at the corresponding location even after being stored for 1000 hours in an environment of 60 ° C. and 90%. That is, it was possible to prevent the occurrence of a sealing failure that occurred at the opening position at the end of the vapor deposition mask. In addition, 500 light-emitting display devices were formed from a large-sized substrate in the same manner as in this example, and individual light-emitting display devices were evaluated. As a result, ten light emitting display devices in which a light emission failure occurred in the light emitting region were found.

[Example 2]
In Example 1, a light-emitting display device was manufactured by the same method as in Example 1 except that the arrangement position and shape of the spacers 16 were changed as described below.

(A) Spacer Arrangement Position As shown in FIG. 4A, spacers are provided so as to partition the light emitting region 20 and the non-light emitting region 30 into a plurality of pixels.

(B) Shape of Spacer In this example, the spacer 16b formed in the non-light emitting region 30 was formed into a continuous linear shape as shown in FIG. On the other hand, the spacers 16a formed in the display area 20 have a discontinuous short line shape as shown in FIG. The light emitting subpixels provided with the spacers 16a formed in the display area 20 are the light emitting subpixels in the sixth row counting from the left end or the right end. Note that the cross-sectional area of the spacer 16 to be arranged is sufficiently smaller than the cross-sectional area of the element isolation film 15.

  In this embodiment, the heights of the spacers 16a and 16b were 1.5 μm and 2 μm, respectively. The length (column direction) of the spacers 16b formed in the non-light emitting region 30 was 120 μm, and the length (column direction) of the spacers 16a formed in the light emitting region 20 was 10 μm. The width (in the row direction) was 3 μm.

  By the way, in the light emitting display device of the present embodiment, the spacers 16a provided in the light emitting region 20 are intermittently arranged in the column direction, but are arranged at ten equal intervals in the row direction. Yes. On the other hand, the height of the element isolation film 15 is lower (0.8 μm).

  A specific method for forming the element isolation film and the spacer will be described below.

  First, after the first electrode 23 was formed, a positive photosensitive resist containing polyimide was applied to the substrate 10 by a spin coating method. The thickness of the resist film attached at this time was 2 μm. Next, it is divided into (1) a region where the resist is completely removed, (2) a region where the resist is partially removed, and (3) a region where the resist is not removed, and the amount of transmitted light is adjusted according to each region. The exposure light was irradiated using a gray tone mask. Next, an element isolation film 15 and a spacer 16 were formed on the substrate 10 by performing development and baking processes. Here, (1) the region where the resist is completely removed is a region corresponding to the opening of the pixel. Further, (2) the region where the resist is partially removed is a region where the element isolation film 15 or the element isolation film 15 and the spacer 16a are stacked on the substrate 10 in this order. (3) The region where the resist is not removed is a region where the element isolation film 15 and the spacer 16b are stacked in this order.

  As described above, after the formation of the spacers 16a and 16b, a display device having organic light emitting pixels was formed by the same method as in Example 1.

  The obtained light emitting display device did not cause a light emitting defect at the corresponding location even after being stored for 1000 hours in an environment of 60 ° C. and 90%. That is, it was possible to prevent the occurrence of a sealing failure that occurred at the opening position at the end of the vapor deposition mask. Further, 500 light emitting display devices were formed from a large-sized substrate in the same manner as in Example 1, and each light emitting display device was evaluated. As a result, no light emitting display device in which a light emission failure occurred in the light emitting region was found.

[Comparative Example 1]
In Example 1, a light emitting display device was obtained by the same method as Example 1 except that the spacer 16 was provided only in the light emitting region.

  When the light emitting display device of this comparative example was stored at 60 ° C. and 90% environment for 1000 hours, an average of seven luminance reduction regions (dark areas) starting from non-light emitting pixels on both sides in the display region Y direction occurred. It was confirmed that When the portion corresponding to the center of the luminance reduction region was observed with an optical microscope, scratches of 3 μm to 10 μm in size were confirmed in the element isolation film and the organic compound layer. When the portion was subjected to FIB processing and a cross-sectional SEM was observed, the sealing film was not covered with the flaws, and a seam was formed in the sealing film starting from the flaws in the element isolation film and the organic layer. confirmed.

  As described above, in the light-emitting display device of the present invention, at least a pair of spacers are disposed in the non-light-emitting region provided at the outer edge of the light-emitting region, and in addition, a spacer that supports the slit portion is also disposed in the display region. . In manufacturing using a high-definition display device or a large-sized substrate, the contact with the element isolation film due to the distortion of the vapor deposition mask cross section and the adjacent slit section is prevented, and the deformation and distortion of the slit section that occurs locally in the display area. The portion can also be prevented from contacting the element isolation film.

  1: Light-emitting display device, 10: Substrate, 11: Base material, 12: TFT circuit, 13: Insulating layer, 14: Planarization layer, 15: Element isolation film, 16 (16a, 16b, 16c, 161, 162, 163) ): Spacer, 20: light emitting region, 21: light emitting pixel, 21R (21G, 21B): light emitting subpixel, 22: organic light emitting element, 23: first electrode, 24: organic compound layer, 25: second electrode, 26 : Sealing layer, 27: intermediate layer, 28: protective substrate, 30: non-emission region, 31: non-emission pixel, 32: non-emission sub-pixel, 40: external connection terminal, 50: evaporation mask, 51: (evaporation mask) ), 52: slit portion (for the deposition mask), 53: deposition region, 54: the crosspiece (for deposition mask), 55: frame (for the deposition mask), 60: scribe line

Claims (7)

A substrate,
A light emitting region provided on the substrate;
A non-light emitting region provided on an outer edge of the light emitting region on the substrate,
A plurality of light emitting pixels are periodically arranged in the light emitting region,
The light emitting pixel has a plurality of types of light emitting subpixels having different emission colors,
The light emitting subpixel has a first electrode provided on the substrate, a second electrode, and an organic compound layer sandwiched between the first electrode and the second electrode,
A plurality of non-light emitting pixels are arranged in the non-light emitting region,
The non-light-emitting pixel has a plurality of non-light-emitting sub-pixels;
The light emitting subpixel and the non-light emitting subpixel are each partitioned by an element isolation film,
Among the non-light emitting regions, a spacer is provided in a non-light emitting region provided at an outer edge in the row direction of the light emitting region, and one non-light emitting pixel provided at an outer edge in the row direction of the light emitting region is provided by the spacer. A light-emitting display device which is partitioned into a plurality of pixels. The spacer is provided on the element isolation film;
The light-emitting display device according to claim 1, wherein a maximum cross-sectional area of the spacer in the substrate vertical direction is smaller than a cross-sectional area of an element isolation film provided at the same position.   The light emitting display device according to claim 1, wherein a part of the spacer is included in a light emitting region.   4. The light emitting display device according to claim 1, wherein the light emitting subpixel array is a stripe array. 5. A spacer is provided in the light emitting region,
5. The light emitting display device according to claim 1, wherein a spacer provided in the light emitting region is lower in height than a spacer provided in the non-light emitting region. A spacer is provided in the light emitting region,
5. The light-emitting display device according to claim 1, wherein the number of spacers provided in the light-emitting region is less per unit area than the spacer provided in the non-light-emitting region.   The light emitting display device according to claim 1, further comprising a sealing film that covers the second electrode.

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