CN114388467A - 具有预回流焊料的半导体装置组合件 - Google Patents
具有预回流焊料的半导体装置组合件 Download PDFInfo
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- CN114388467A CN114388467A CN202111208716.7A CN202111208716A CN114388467A CN 114388467 A CN114388467 A CN 114388467A CN 202111208716 A CN202111208716 A CN 202111208716A CN 114388467 A CN114388467 A CN 114388467A
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- Prior art keywords
- solder
- die
- semiconductor device
- device assembly
- solder joint
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
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- SLIUAWYAILUBJU-UHFFFAOYSA-N pentacene Chemical compound C1=CC=CC2=CC3=CC4=CC5=CC=CC=C5C=C4C=C3C=C21 SLIUAWYAILUBJU-UHFFFAOYSA-N 0.000 description 1
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Abstract
本申请案的实施例涉及一种具有预回流焊料的半导体装置组合件。一种半导体装置组合件(200)包含:封装衬底(210),其具有包含多个可接合特征(210a)的顶部侧;至少一个集成电路IC裸片(110),其包含具有至少一半导体表面的衬底,所述至少一半导体表面包含经配置以用于实现包含节点的至少一个功能的电路系统(112),所述节点利用接合垫(116)上的金属支柱(117)耦合到所述接合垫。所述金属支柱通过焊料接头(131b)附接到所述可接合特征。所述焊料接头具有小于或等于(≤)所述焊料接头的横截面积的5%的空隙密度。
Description
技术领域
本发明涉及在裸片与封装衬底之间具有焊料连接的倒装芯片装置组合件。
背景技术
已知为集成电路(IC)裸片提供支撑、提供免受环境影响的保护以及使IC裸片能够表面安装到印刷电路板(PCB)并与其互连的各种半导体芯片封装。一种常规封装衬底配置包含具有裸片垫及线接合垫的引线框架。另一种常规封装衬底配置包括有机衬底。
基于引线框架的半导体封装是众所周知的且在电子工业中广泛用于盛纳、安装及互连各种不同的IC裸片类型。常规引线框架通常由扁平结构金属片材模压而成,且包含在封装制造期间通过矩形框架围绕中心区域临时固持在一起成平面布置的多个金属引线,所述矩形框架包括通常称为“坝条”的多个消耗品报告(expendable report)。IC裸片的裸片垫通过附接到框架的“系条”支撑在中心区域中。引线从与框架形成整体的第一端延伸到邻近于裸片垫但与其间隔开的相对第二端。
在引线框架封装布置上的倒装芯片中,IC裸片(在其接合垫上具有焊料凸块,有时在位于接合垫上的铜支柱上具有焊料凸块)倒装(电路侧朝下)在具有线接合垫的引线框架上,其中IC裸片通过焊料凸块的回流接合到裸片垫且电耦合到线接合垫。焊料凸块可使用焊料球滴注技术施加到IC裸片。德州仪器(Texas Instruments)提供HOTROD四方无铅扁平(QFN)封装,这是专门设计用于电力应用的无铅封装。HOTROD QFN具有在封装的所有侧上的焊料焊盘垫,以及用于增强的充电能力的电力母线。
也已知将有机衬底用作半导体应用及制造中的基底材料。不同于例如硅的无机衬底,有机衬底包括有机小分子或聚合物。有机小分子包含多环芳香族化合物,例如并五苯、蒽及红荧烯。封装材料不仅用于机械或环境安全,而且其也提供IC裸片与PCB之间的导电互连。类似于其它封装材料,有机封装材料也促进热分布、信号分布、可制造性及可服务性,以及电力分布。有机封装材料在功能性及尺寸上不同。有机衬底还可包括通常称为堆积衬底的衬底。
已知各种焊料组合物。一种可商购焊料组合物在市场上以SAC305销售,其包括含有96.5%锡、3%银及0.5%铜的无铅合金。SAC305满足日本电子工业开发协会(JEIDA)对无铅焊料的推荐。
发明内容
提供此发明内容以按简化形式引入下文在包含所提供的图式的具体实施方式中进一步描述的所揭示概念的精选。此发明内容并不打算限制所主张标的物的范围。
所揭示方面包含一种半导体装置组合件,其包括:封装衬底,其具有包含多个可接合特征的顶部侧;至少一个IC裸片,其包含具有至少一半导体表面的衬底,所述至少一半导体表面包含经配置以用于实现包含节点的至少一个功能的电路系统,所述节点利用接合垫上的金属支柱耦合到所述接合垫。所述金属支柱通过焊料接头附接到所述可接合特征。通过所揭示组装工艺所能实现的包含第一及第二焊料回流两个步骤,在封装衬底的接合特征上从第一焊料回流工艺提供预回流焊料。在放置IC裸片使得金属支柱被放置到封装衬底的可接合特征上之后,第二回流工艺在封装衬底的可接合特征与IC裸片的金属支柱之间形成焊料接头。所述焊料接头具有小于或等于(≤)其横截面积的5%的空隙密度。
附图说明
现在将参考未必按比例绘制的附图,其中:
图1A到1E是描绘根据实例方面的形成所揭示半导体装置组合件的方法中涉及的一系列步骤的横截面图,所述步骤包含在将IC裸片上的金属支柱安装到封装衬底的可接合特征上之前针对封装衬底的可接合特征的焊料回流步骤。
图2A是根据实例方面的展示为引线上倒装芯片(FCOL)塑料QFN封装的半导体装置组合件的横截面图,所述FCOL塑料QFN封装在IC裸片上的金属支柱与引线框架的引线端子之间具有所揭示焊料接头。
图2B是展示为FCOL塑料QFN封装的半导体装置组合件的横截面图,所述FCOL塑料QFN封装在IC裸片上的金属支柱与引线框架的引线端子之间具有所揭示焊料接头,其中所述QFN封装进一步包括也具有例如金属支柱等接合特征的任选无源装置及任选第二IC裸片,所述接合特征通过焊料接头附接到引线框架的引线端子。
图3A是根据实例方面的具有所揭示焊料接头的半导体装置组合件的横截面图,所述半导体装置组合件包括倒装芯片安装到有机衬底上的可接合特征上的焊料凸块IC裸片。
图3B是根据实例方面的具有所揭示焊料接头组合件的半导体装置组合件的横截面图,所述半导体装置组合件包括:倒装芯片安装到有机衬底上的可接合特征上的焊料凸块IC裸片;以及也具有通过所揭示焊料接头结合到有机衬底的可接合特征的接合特征的任选无源装置及任选第二IC裸片。
具体实施方式
参考图式描述实例方面,其中使用相似参考编号来标示类似或等效元件。动作或事件的所图解说明的排序不应视为限制的,因为一些动作或事件可以不同次序及/或与其它动作或事件同时发生。此外,可不需要一些所图解说明动作或事件来实施根据本发明的方法。
同样,本文中所使用的不具有其它限定的术语“耦合到”或“与…耦合”(及类此术语)打算描述间接或直接电连接。因此,如果第一装置“耦合”到第二装置,那么所述连接可通过其中路径中仅存在寄生现象的直接电连接或者通过经由包含其它装置及连接的介入物项的间接电连接进行。对于间接耦合,介入物项通常不修改信号的信息但可调整其电流电平、电压电平及/或电力电平。
图1A到1E是描绘根据实例方面形成所揭示半导体装置组合件的方法中涉及的一系列步骤的横截面图,所述步骤包含在将IC裸片安装到封装衬底的可接合特征上之前应用于封装衬底的可接合特征的焊料回流步骤。图1A描绘在将通常呈焊料膏形式的焊料131印刷到封装衬底(封装衬底在图1A到1E中未展示,但参见以下各自描述的图2A、2B、3A、3B)的可接合特征121的表面上之后的结果。焊料的印刷可包括使用丝网印刷模版的丝网印刷,或者其它已知焊料印刷技术,例如焊料施涂、焊料球滴注或喷墨印刷。
封装衬底可包括IC裸片可安装在上面的包含引线框架的基本上任何结构,且也可包括其它封装衬底,例如,陶瓷衬底、球栅阵列(BGA)、针栅阵列(PGA)、印刷电路板(PCB)、有机衬底、柔性塑料衬底或基于纸的衬底。可接合特征121可包括:有铅引线框架的铅,或在无铅引线框架的情形下的引线端子,或在例如有机衬底等其它封装衬底类型的情形下的金属垫。
图1B描绘在使焊料131回流于可接合特征121上之后的结果。焊料回流工艺可包括真空回流工艺。实例焊料回流温度范围是230℃到260℃,具有30秒到100秒的液相线以上回流时间(TAL)。经回流焊料现在展示为131a。在经回流焊料131a与可接合特征121之间展示金属间化合物(IMC)区域132。术语IMC由JEDEC固态技术协会定义为“焊料在高温下与另一金属接触时形成的物质”,其中“IMC由来自焊料及另一金属的多种成分构成。”“这种材料具有独特机械及电性质,不同于初始焊料及另一金属化物的那些机械及电特性。”
图1C描绘在使用助焊剂涂敷器板150对IC裸片110的接合垫116上的金属支柱117进行助焊剂浸焊之后的IC裸片110的结果。助焊剂浸焊工艺可包括标准助焊剂浸焊工艺,其中IC裸片110被浸焊到助焊剂涂敷器板150上,其中金属支柱117上展示的助焊剂119是由助焊剂罐供应。IC裸片110包括包含具有电路系统112的至少一半导体表面的衬底,电路系统112经配置以用于实现包含电路系统112的一些节点的至少一个功能,所述节点耦合到包含所展示接合垫116的接合垫,其中金属支柱117有时也称为接合垫116上的柱,例如铜柱。
电路系统112包括可以一种布置形成于衬底中的电路元件(包含晶体管,且通常是二极管、电阻器、电容器等),所述衬底包括例如硅等的块体衬底材料上的外延层,所述电路元件配置在一起以大体上实现至少一个电路功能。实例电路功能包含模拟(例如,放大器或功率转换器)、射频(RF)、数字或非易失性存储器功能。
图1D描绘在将IC裸片110的金属支柱117放置到封装衬底的可接合特征121上之后的结果,其中助焊剂119在金属支柱117的远端上。图1E描绘第二回流工艺在金属支柱117与可接合特征121之间形成焊料接头之后的结果。第二回流工艺激活助焊剂119以帮助从经回流焊料131a且从可接合特征121移除氧化物以提供较佳的电接触。第二回流工艺可利用与上述第一回流步骤相同的回流条件,因为正在处理的仍然是基本上相同的焊料组合物以完成IC裸片110上的金属支柱117半导体与可接合特征121之间的焊料接头。所得焊料接头在图1E中展示为131b。
所揭示方面通过将通常呈例如SAC305焊料膏等的焊料膏的形式的焊料131直接印刷在封装衬底的可接合特征121上来解决倒装芯片封装的问题。所揭示方面提供关于焊料膏的焊料凸块的形状及大小的灵活性,使得可存在两个或更多个不同焊料凸块大小及/或形状,同时确保在将IC裸片110安装到封装衬底上的可接合特征121之前移除焊料膏的挥发性组分,这可显著地减小焊料接头131b中的焊料空隙的浓度。关于焊料接头,形成于焊料接头内部的小空腔习惯上称为‘空隙’,其可对接头的可靠性具有显著的负面影响。当焊料接头中存在显著浓度的空隙时,焊料接头强度减小,且空隙对应力的响应可导致在焊料接头中形成裂痕。所揭示焊料接头通常具有小于或等于(≤)焊料接头的横截面积的5%的空隙密度,例如≤2%的空隙密度。
图2A是根据实例方面的展示为FCOL塑料QFN封装的半导体装置组合件200的横截面图,所述FCOL塑料QFN封装在IC裸片110的接合垫116上的金属支柱117与引线框架210的引线端子210a之间具有所揭示焊料接头131b。模制化合物展示为190。
图2B是根据实例方面的展示为FCOL塑料QFN封装的半导体装置组合件250的横截面图,所述FCOL塑料QFN封装在IC裸片110的接合垫116上的金属支柱117与引线框架210的引线端子210a之间具有所揭示焊料接头131b。QFN封装250进一步包括各自也具有通过焊料接头131b附接到引线框架210的引线端子210a的可接合特征的例如电容器、电阻器或电感器等的任选无源组件(或装置)218以及第二IC裸片219。
图3A是根据实例方面的具有所揭示焊料接头131b的包括焊料凸块倒装IC裸片110的半导体装置组合件300的横截面图,焊料凸块倒装IC裸片110使其接合垫116上的金属支柱117附接到具有通孔311的有机衬底310上的可接合特征312,例如金属垫。有机衬底310展示为具有多个金属层,其中电介质层通常包括相应金属层之间的聚合物材料,而顶部层提供可接合特征312。通孔311穿过有机衬底310的整个厚度,使得有机衬底310能够利用其定位成与IC裸片110的侧相对的展示成布置为BGA的焊料球315安装于PCB(出于简洁目的,未展示)或另一衬底上。半导体装置组合件300还展示为包含底胶341。
图3B是根据实例方面的具有所揭示焊料接头131b的包括焊料凸块倒装IC裸片110的半导体装置组合件350的横截面图,焊料凸块倒装IC裸片110使其接合垫116上的金属支柱117附接到具有通孔311的有机衬底310的可接合特征312。半导体装置组合件350还包含各自也具有通过焊料接头131b结合到有机衬底310的可接合特征312的接合特征(例如铜支柱)的例如电容器、电阻器或电感器等的任选无源218以及第二IC裸片219。
所揭示方面通常提供相对厚的接合线厚度(BLT)。由于所利用的焊料膏的量可在增加模版厚度时增加,因此可以实现较厚BLT。与常规焊料接头相比,上文所描述的所揭示方面通常还提供焊料接头空隙的较低浓度。通常存在焊料接头空隙的较低浓度的原因是,上文所描述的所揭示方法包含执行两个焊料回流步骤,包含用于在将IC裸片安装于封装衬底上之前使封装衬底的可接合特征上的焊料回流的第一焊料回流步骤,这允许在回流期间较容易从焊料膏移除挥发性组分或气体,因为不存在阻碍从焊料膏移除挥发性组分或气体的障碍物(由于顶上没有IC裸片)。针对其中封装衬底包括引线框架的常规焊料工艺,已在回流步骤期间将焊料夹在IC裸片的金属支柱与引线框架之间,这解释了在常规焊料回流工艺期间挥发性组分/气体中的一些为何被陷捕或不容易驱除而导致所得焊料接头中空隙的显著浓度。所揭示焊料接头中空隙的此经减小浓度是所揭示组装方法的优点,尤其在针对两个相应焊料回流使用真空回流炉的情况下。
与常规焊料接头相比,所揭示焊料接头的BLT范围可为较厚的。取决于所要焊料膏体积及模版孔隙大小,具有大约40μm到100μm的厚度、可能甚至更厚的模版可用于产生在约35μm到80μm(或更高)的范围内的BLT厚度。这假设相对于湿BLT的厚度,BLT的厚度的常规减小。因此,使用相对厚的模版及与常规焊料膏体积相比相对大的焊料膏体积,所揭示焊料接头的BLT可为至少55μm,例如介于从55μm到80μm的范围内的BLT。
所揭示方面可整合到各种组装流中以形成各种不同的半导体装置组合件及相关产品。所述组合件可包括单个IC裸片或者多个IC或半导体裸片,例如包括多个经堆叠IC裸片的配置。可使用各种封装衬底。IC或半导体裸片可包含在其中的各种元件及/或在其上的层,包含势垒层,电介质层,装置结构,包含源极区域、漏极区域、位线、基极、射极、集极、导电线、导电通孔的有源元件及无源元件等。此外,IC或半导体裸片可通过包含双极、绝缘栅极双极晶体管(IGBT)、CMOS、BiCMOS及MEMS的各种过程形成。
本发明所涉及的技术领域的所属领域的技术人员将了解,在所主张发明的范围内所揭示方面的许多变化形式是可能的,且可在不背离本发明的范围的情况下对上文所描述方面做出修改。
Claims (20)
1.一种半导体装置组合件,其包括:
封装衬底,其具有包含多个可接合特征的顶部侧;
至少一个集成电路IC裸片,其包括包含至少一半导体表面的衬底,所述至少一半导体表面具有经配置以用于实现包含节点的至少一个功能的电路系统,所述节点利用接合垫上的金属支柱耦合到所述接合垫,所述金属支柱通过焊料接头附接到所述多个可接合特征,
其中所述焊料接头具有小于或等于(≤)所述焊料接头的横截面积的5%的空隙密度。
2.根据权利要求1所述的半导体装置组合件,其中所述封装衬底包括包含多个引线端子的引线框架,所述半导体装置组合件进一步包括为到所述多个引线端子的至少一经暴露底部触点除外的所述IC裸片提供囊封的模制化合物。
3.根据权利要求1所述的半导体装置组合件,其中所述封装衬底包括多层有机衬底。
4.根据权利要求1所述的半导体装置组合件,其中所述金属支柱包括铜柱。
5.根据权利要求1所述的半导体装置组合件,其中所述封装衬底包括引线框架,且其中所述引线框架包括无铅引线框架。
6.根据权利要求1所述的半导体装置组合件,其中所述焊料接头的接合线厚度BLT为至少55μm。
7.根据权利要求6所述的半导体装置组合件,其中所述焊料接头的所述BLT为55μm到80μm。
8.根据权利要求1所述的半导体装置组合件,其进一步包括至少一个无源装置,所述至少一个无源装置选自横向于也通过所述焊料接头附接到所述多个可接合特征的所述IC裸片定位的电阻器、电容器及电感器。
9.根据权利要求1所述的半导体装置组合件,其中所述至少一个IC裸片进一步包括也通过所述焊料接头附接到所述多个可接合特征的第二IC裸片。
10.一种组装方法,其包括:
将焊料膏印刷到封装衬底的多个可接合特征上;
使所述焊料膏回流;
倒装芯片裸片附接至少一个集成电路IC裸片到所述可接合特征,所述至少一个集成电路裸片包括具有经配置以用于实现包含节点的至少一个功能的电路系统的衬底,所述节点利用接合垫上的金属支柱耦合到所述接合垫,及
再次使所述焊料膏回流以在所述金属支柱与所述可接合特征之间形成焊料接头。
11.根据权利要求10所述的方法,其中所述焊料接头具有小于或等于(≤)所述焊料接头的横截面积的5%的空隙密度。
12.根据权利要求10所述的方法,其中所述印刷包括使用丝网印刷模版的丝网印刷。
13.根据权利要求10所述的方法,其进一步包括在所述倒装芯片裸片附接之前进行助焊剂浸焊以在所述金属支柱上方添加助焊剂浸焊部。
14.根据权利要求10所述的方法,其中所述金属支柱包含多个不同形状及多个不同面积中的至少一者。
15.根据权利要求10所述的方法,其中所述再次使所述焊料膏回流及所述使所述焊料膏回流两者均包括真空回流。
16.根据权利要求10所述的方法,其中所述封装衬底包括引线框架,且其中所述引线框架包括无铅引线框架。
17.根据权利要求10所述的方法,其中所述封装衬底包括多层有机衬底。
18.根据权利要求10所述的方法,其中所述焊料接头的接合线厚度BLT为至少55μm。
19.根据权利要求10所述的方法,其中所述倒装芯片裸片附接进一步包括附接至少一个无源装置,所述至少一个无源装置选自横向于所述多个可接合特征定位的电阻器、电容器及电感器。
20.根据权利要求10所述的方法,其中所述倒装芯片裸片附接进一步包括将第二IC裸片附接到所述多个可接合特征。
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