CN114361099A - Deep silicon etching method - Google Patents

Deep silicon etching method Download PDF

Info

Publication number
CN114361099A
CN114361099A CN202111521328.4A CN202111521328A CN114361099A CN 114361099 A CN114361099 A CN 114361099A CN 202111521328 A CN202111521328 A CN 202111521328A CN 114361099 A CN114361099 A CN 114361099A
Authority
CN
China
Prior art keywords
etching
silicon
oxide film
etched
film layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111521328.4A
Other languages
Chinese (zh)
Inventor
马可贞
沈方平
徐晓苗
吴楠
张梦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Xinmagnesium Electronic Technology Co ltd
Original Assignee
Suzhou Xinmagnesium Electronic Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Xinmagnesium Electronic Technology Co ltd filed Critical Suzhou Xinmagnesium Electronic Technology Co ltd
Priority to CN202111521328.4A priority Critical patent/CN114361099A/en
Publication of CN114361099A publication Critical patent/CN114361099A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Drying Of Semiconductors (AREA)

Abstract

The application discloses a deep silicon etching method, which comprises the following steps: carrying out film deposition on silicon to be etched to form an oxide film layer on the silicon to be etched; forming a first photoresist layer on the oxide film layer, and photoetching the first photoresist layer to obtain a photoresist layer with a first preset pattern on the oxide film layer; etching the silicon to be etched to remove the oxide film layer at the first preset pattern to obtain the silicon to be etched with the first preset pattern; forming a second photoresist layer on the silicon to be etched with the first preset pattern, and photoetching the second photoresist layer to obtain a photoresist layer with a second preset pattern on the oxide film layer; treat that the sculpture silicon forms one side of the second pattern of predetermineeing and carry out the sculpture to form first functional area in first predetermined pattern department, and remove first predetermined pattern department in the second predetermined pattern and form the second functional area, this application can realize the sculpture of the different degree of depth through once sculpture, has the advantage that easy even glue and exposure precision are high.

Description

Deep silicon etching method
Technical Field
The application relates to the technical field of semiconductor etching, in particular to a deep silicon etching method.
Background
The silicon cavities or silicon grooves with different step depths are formed by deep silicon etching for many times, and the method is an important process in the micro-nano processing technology. In the prior art, multiple methods of glue homogenizing, photoetching and deep silicon etching are adopted in the process of etching silicon wafers with different depths, but when the depth of the first silicon etching is deeper (such as more than 100 microns), glue homogenizing is generally carried out by adopting a glue spraying process, but when the glue spraying process is used for exposure, the precision is difficult to guarantee, even when a deeper cavity or groove appears on the silicon wafer, the silicon wafer can be extremely fragile, and when the silicon wafer is subjected to photoetching or etching process, fragments and the like are easily generated.
Therefore, an improved deep silicon etching technical scheme is needed to solve the problems that high-step photoresist is difficult to uniformize, exposure accuracy is poor, silicon to be etched is easy to fragment when etched again after being subjected to deep silicon etching once and the like when silicon to be etched is etched at different depths.
Disclosure of Invention
In order to solve the problems in the prior art, the embodiment of the application provides a technical scheme of a deep silicon etching method, so as to solve the problems that high-step glue leveling is difficult, exposure precision is poor, silicon to be etched is easy to fragment when etched again after being subjected to deep silicon etching once and the like when silicon to be etched is subjected to etching at different depths, and the technical scheme is as follows:
the application provides a deep silicon etching method, which comprises the following steps:
s1, performing film deposition on silicon to be etched, and forming an oxide film layer with a preset thickness on the silicon to be etched;
s2, forming a first photoresist layer on the oxide film layer, and photoetching the first photoresist layer to obtain a photoresist layer with a first preset pattern on the oxide film layer;
s3, etching the silicon to be etched to remove the oxide film layer at the first preset pattern to obtain the silicon to be etched with the first preset pattern;
s4, forming a second photoresist layer on the silicon to be etched with the first preset pattern, and photoetching the second photoresist layer to obtain a photoresist layer with a second preset pattern on the oxide film layer, wherein the second preset pattern comprises at least one first preset pattern;
s5, etching one side of the silicon to be etched, where the second preset pattern is formed, so as to form a first functional area at the first preset pattern and a second functional area in the second preset pattern except the first preset pattern, wherein the etching depth of the first functional area is greater than that of the second functional area.
Further, the preset thickness of the oxide film layer is determined based on the target etching depth of the first functional region, the target etching depth of the second functional region, the silicon etching rate and the oxide film layer etching rate.
Further, the ratio of the silicon etching rate to the oxide film layer etching rate is more than or equal to 150: 1.
further, the thickness of the oxide film layer is obtained based on the following calculation formula:
Figure BDA0003407558150000021
wherein x is the thickness of the oxide film layer; h1The etching depth of the first functional region; h2Is the etching depth (H) of the second functional region1>H2);R1Is the silicon etch rate; r2Is the oxide film layer etching rate.
Further, the etching time for etching the second functional region to meet the target etching depth is determined by the preset thickness of the oxide film layer, the target etching depth of the first functional region, the silicon etching rate and the oxide film layer etching rate.
Further, the oxide film layer is a silicon oxide layer.
Further, in step S3, the etching process is performed by wet etching using an ammonium fluoride etchant.
Further, in step S5, the etching method is dry etching.
Further, the etching depth of the first functional area is 0.1um-1000 um; the etching depth of the second functional area is 0.1um-1000 um.
Further, the thickness of the photoresist layer is 1um-20 um.
The application provides a deep silicon etching method, which has the following technical effects:
the method comprises the steps of arranging an oxide film layer with a preset thickness on silicon to be etched, firstly forming a first photoresist layer on the oxide film layer, photoetching the first photoresist layer to obtain a photoresist layer with a first preset pattern on the oxide film layer, secondly etching the silicon to be etched to remove the oxide film layer at the position of the first preset pattern to obtain the silicon to be etched with the first preset pattern, secondly forming a second photoresist layer on the silicon to be etched with the first preset pattern, photoetching the second photoresist layer to obtain the photoresist layer with a second preset pattern on the oxide film layer, wherein the second preset pattern comprises at least one first preset pattern, finally etching one side of the silicon to be etched, which forms the second preset pattern, to form a first functional area at the position of the first preset pattern, and forming a second functional area in the second preset pattern except the position of the first preset pattern, and the etching depth of different functional areas is realized by one-time deep silicon etching by utilizing the different etching rates of the silicon to be etched and the oxide film layer, and the method has the advantages of easiness in glue homogenizing and high exposure precision.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a deep silicon etching method according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a deep silicon etching preparation process provided in an embodiment of the present application;
FIG. 3 is a top view of an etched silicon having a first functional region and a second functional region provided in accordance with an embodiment of the present application;
FIG. 4 is a front view of etched silicon having a first functional region and a second functional region provided in an embodiment of the present application;
FIG. 5 is a side view of an etched silicon having a first functional region and a second functional region provided in accordance with an embodiment of the present application;
wherein the reference numerals correspond to: 1-silicon to be etched; 2-a thin film oxide layer; 301-a first photoresist layer; 302-a second photoresist layer; 4-a first functional area; 5-second functional area.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.
Referring to fig. 1, a schematic flow chart of a deep silicon etching method according to an embodiment of the present application is shown, which includes the following steps:
s1, performing film deposition on the silicon 1 to be etched, and forming an oxide film layer 2 with a preset thickness on the silicon 1 to be etched;
s2, forming a first photoresist layer 301 on the oxide film layer 2, and performing photolithography on the first photoresist layer 301 to obtain a photoresist layer with a first predetermined pattern on the oxide film layer 2;
s3, etching the silicon 1 to be etched to remove the oxide film layer 2 at the first preset pattern, and obtaining the silicon 1 to be etched with the first preset pattern;
s4, forming a second photoresist layer 302 on the silicon 1 to be etched with the first preset pattern, and photoetching the second photoresist layer 302 to obtain a photoresist layer with a second preset pattern on the oxide film layer 2, wherein the second preset pattern comprises at least one first preset pattern;
s5, etching the side of the silicon 1 to be etched, where the second preset pattern is formed, to form a first functional region 4 at the first preset pattern and a second functional region 5 in the second preset pattern except the first preset pattern, wherein the etching depth of the first functional region 4 is greater than that of the second functional region 5.
In the embodiment of the application, before deep silicon etching is carried out, an oxide film layer 2 with a preset thickness is formed on silicon 1 to be etched; secondly, forming a first photoresist layer 301 on the oxide film layer 2, and photoetching the first photoresist layer 301 to obtain a photoresist layer with a first preset pattern on the oxide film layer 2; then, etching the silicon 1 to be etched to remove the oxide film layer 2 at the first preset pattern, so as to obtain the silicon 1 to be etched with the first preset pattern; further, a second photoresist layer is formed on the silicon 1 to be etched with the first preset pattern, and the second photoresist layer 302 is subjected to photoetching to obtain a photoresist layer with a second preset pattern on the oxide film layer 2, wherein the second preset pattern comprises at least one first preset pattern; and finally, etching one side of the silicon 1 to be etched, which forms a second preset pattern, so as to form a first functional region 4 at the first preset pattern, and form a second functional region 5 at the second preset pattern, except the first preset pattern, so that when deep silicon etching is carried out, different etching consumption rates of the silicon 1 to be etched and the oxide film layer 2 are utilized, the etching process of different etching depths is realized through one-time deep silicon etching, and the advantages of easiness in glue homogenizing and high exposure precision are achieved.
Further, in the photolithography, the photoresist layer is exposed and developed by using a mask photolithography mask, a desired preset pattern is formed on the photoresist layer by photolithography, and the mask photolithography masks used in the photolithography are different when performing photolithography twice. Specifically, when the first photoresist layer 301 is subjected to photoetching, the first mask photolithography mask is used, when the second photoresist layer 302 is subjected to photoetching, the second mask photolithography mask is used, wherein the patterns which are photoetched by using the second mask photolithography mask comprise the patterns which are photoetched by the first mask photolithography mask, meanwhile, different etching rates of the silicon 1 to be etched and the oxide film layer 2 are different, the etched silicon with different target etching depths in different functional regions is realized, the different functional regions can have the etching depths with high step differences, and the possibility of fragmentation during deep etching is avoided.
In an optional embodiment, at least two times of film deposition are performed on silicon 1 to be etched, at least two oxide film layers 2 with preset thicknesses are formed on the silicon 1 to be etched, wherein when the at least two times of film deposition are performed, materials selected by the at least two times of film deposition are different, and target etching depths of at least three functional regions are formed according to different etching rates of the oxide film layers 2 made of different materials, so that the target etching depths of the at least three functional regions are realized through one time of deep silicon etching, and meanwhile, the problems that high-step glue homogenizing is difficult, exposure accuracy is poor, the silicon 1 to be etched is prone to fragment when the silicon 1 to be etched is etched again after the one time of deep silicon etching are solved.
Further, film deposition is carried out twice on the silicon 1 to be etched, a first oxide film layer with a first preset thickness is formed on the silicon 1 to be etched, and a second oxide film layer with a second preset thickness is formed on the first oxide film layer. Specifically, firstly, a first photoresist layer is formed on the first oxide film layer, and the first photoresist layer is subjected to photoetching to obtain a photoresist layer with a first preset pattern on the first oxide film layer; secondly, etching the silicon 1 to be etched to remove the first oxide film layer at the first preset pattern, so as to obtain the silicon 1 to be etched with the first preset pattern; thirdly, forming a second photoresist layer on the silicon 1 to be etched with the first preset pattern, and photoetching the second photoresist layer to obtain the photoresist layer with the second preset pattern on the first oxide film layer, wherein the second preset pattern comprises at least one first preset pattern; fourthly, etching the silicon 1 to be etched to remove the second oxide film layer at the second preset pattern to obtain the silicon 1 to be etched with the second preset pattern; fourthly, forming a third photoresist layer on the silicon 1 to be etched with the second preset pattern, photoetching the third photoresist layer to obtain the photoresist layer with the third preset pattern on the second oxide film layer, wherein the third preset pattern comprises at least one first preset pattern and at least one second preset pattern, and fifthly, etching one side of the silicon 1 to be etched, which forms a third preset pattern, so as to form a first functional area at the first preset pattern, forming a second functional region in the second predetermined pattern except the first predetermined pattern, and forming a third functional region in the third predetermined pattern except the second predetermined pattern, and the target etching depths of the three functional areas are realized by one-time deep silicon etching by utilizing the different etching consumption rates of the silicon 1 to be etched, the first oxide film layer and the second oxide film layer, and the method has the advantages of easiness in glue homogenizing and high exposure precision.
The following is a detailed description of the target etching depth for etching two functional regions on the silicon 1 to be etched.
With the deep silicon etching method, the etching depths of different functional regions can be obtained, please refer to fig. 2, fig. 2 is a schematic structural diagram of a deep silicon etching preparation process provided by an embodiment of the present application, and fig. 2 shows a schematic structural diagram of a preparation process corresponding to the deep silicon etching method, so that the whole manufacturing process of the deep silicon etching can be clearly seen.
Specifically, please refer to fig. 3, fig. 4 and fig. 5, wherein fig. 3 is a top view of an etched silicon having a first functional region and a second functional region according to an embodiment of the present application; FIG. 4 is a front view of etched silicon having a first functional region and a second functional region provided in an embodiment of the present application; fig. 5 is a side view of the etched silicon having the first functional region and the second functional region provided in the embodiment of the present application, and it can be clearly seen from fig. 4 that the first functional region 4 and the second functional region 5 are etched silicon having different etching depths, where the etching shapes of the first functional region 4 and the second functional region 5 are different, the first functional region 4 is a silicon cavity, and the second functional region 5 is a silicon trench.
In an alternative embodiment, the predetermined thickness of the oxide film layer 2 is determined based on the target etching depth of the first functional region 4, the target etching depth of the second functional region 5, the silicon etching rate, and the etching rate of the oxide film layer 2.
In an alternative embodiment, the thickness of the oxide film layer 2 is obtained based on the following calculation formula:
Figure BDA0003407558150000091
wherein x is the thickness of the oxide film layer 2; h1The etching depth of the first functional region 4; h2Is the etching depth (H) of the second functional region 51>H2);R1Is the silicon etch rate; r2The etching rate of the oxide film layer 2.
In an alternative embodiment, the etching time for etching the second functional region 5 to meet the target etching depth is determined by the preset thickness of the oxide film layer 2, the target etching depth of the first functional region 4, the silicon etching rate, and the etching rate of the oxide film layer 2.
In an optional embodiment, the oxide film layer 2 is a silicon oxide layer, and it should be noted that the oxide film layer 2 may also be an oxide film layer made of other materials, and the preset thickness of the oxide film layer 2 made of other materials may be determined according to each target etching depth, silicon etching rate and etching rate of other oxide film layers 2 in different functional regions.
In the embodiment of the present application, under the condition that the target etching depth of the first functional region 4, the target etching depth of the second functional region 5, the silicon etching rate, and the etching rate of the oxide film layer 2 are known, the preset thickness of the oxide film layer 2 is determined according to the target etching depth of the first functional region 4, the target etching depth of the second functional region 5, the silicon etching rate, and the etching rate of the oxide film layer 2, and specifically, the thickness of the oxide film layer 2 is obtained based on the following calculation formula:
Figure BDA0003407558150000101
wherein x is the thickness of the oxide film layer 2; h1The etching depth of the first functional region 4; h2Is the etching depth (H) of the second functional region 51>H2);R1Is the silicon etch rate; r2The etching rate of the oxide film layer 2.
In a specific embodiment, if the oxide film layer 2 is a silicon oxide layer, that is, a silicon oxide layer with a preset thickness is formed on the silicon 1 to be etched, the target etching depth of the first functional region 4 is 500um, the target etching depth of the second functional region 5 is 200um, and the ratio of the silicon etching rate to the silicon oxide layer etching rate is 200:1, the thickness of the silicon oxide layer can be obtained through the above calculation formula, where the thickness of the silicon oxide layer is (500-200)/200-1.5 um, that is, a silicon oxide layer with a thickness of 1.5um needs to be formed on the silicon 1 to be etched, so as to obtain etched silicon with an etching depth of the first functional region 4 of 500um and an etching depth of the second functional region 5 of 200 um.
It should be noted that, in the early stage of performing deep silicon etching, the to-be-etched silicon 1 of the first functional region 4 in the second preset pattern is etched from the beginning until the etching is finished because there is no silicon oxide layer, and the to-be-etched silicon 1 of the second functional region 5 in the second preset pattern is etched due to the silicon oxide layer, so that the to-be-etched silicon 1 of the second functional region 5 in the second preset pattern is etched at first by the silicon oxide layer, and when the etching of the silicon oxide layer is almost finished, the to-be-etched silicon 1 on the lower side of the silicon oxide layer is etched again until the etching is finished, so as to achieve etching of the target etching depth of the first functional region 4 and the target etching depth of the second functional region 5.
In an alternative embodiment, the ratio of the silicon etching rate to the etching rate of the thin film oxide layer 2 is 150: 1.
in the embodiment of the present application, the ratio of the silicon etching rate to the etching rate of the oxide film layer 2 is not less than 150: 1, the etching of the high step difference between the first functional area 4 and the second functional area 5 is realized, namely when the thickness of the oxide film layer 2 is small, a deeper etching depth can be obtained, and the problems that the high step difference glue evening is difficult to achieve and the exposure precision is poor during deep etching are solved. Specifically, the ratio of the silicon etching rate to the silicon oxide layer etching rate is 200:1, when the material of the oxide film layer 2 is not uniform, the etching rate is not uniform, which is not listed here.
In an alternative embodiment, in step S3, the etching process is performed by wet etching using an ammonium fluoride etchant.
In this embodiment, the etching processing method in step S3 may also use other etching solutions to perform wet etching, for example, using chemical agents with strong corrosivity, and the like, which is not limited herein.
Further, the etching processing method in step S3 may also be performed by using dry etching, for example, using reactive ion beam etching (RIE) or the like, which is not limited in detail herein.
In an alternative embodiment, in step S5, the etching method is dry etching.
In the embodiment of the present application, the dry etching in step S5 includes physical etching, ion-enhanced etching, and the like, and is not limited herein.
In an optional embodiment, the etching depth of the first functional region 4 is 0.1um to 1000 um; the etching depth of the second functional region 5 is 0.1um-1000 um.
In the embodiment of the application, the etching depth of the first functional region 4 and the etching depth of the second functional region 5 are as high as 1000um, and it can be seen that when the etching depth is required to be 1000um, the etching can be realized by the deep silicon etching method, and the method has the advantages of easiness in glue homogenizing and high exposure precision in the etching process, and has higher application value.
In an alternative embodiment, the photoresist layer has a thickness of 1um to 20 um.
In the embodiment of the application, the etching of the silicon 1 to be etched is realized by forming the photoresist layer on the silicon 1 to be etched, and preferably, the thickness of the photoresist layer is 3um to 5 um.
In an optional embodiment, after step S5, the method for deep silicon etching further includes: and removing the residual photoresist and the residual oxide film on the silicon 1 to be etched to obtain complete etched silicon.
According to the technical scheme of the embodiment of the application, the method has the following technical effects:
the method comprises the steps of arranging an oxide film layer with a preset thickness on silicon to be etched, firstly forming a first photoresist layer on the oxide film layer, photoetching the first photoresist layer to obtain a photoresist layer with a first preset pattern on the oxide film layer, secondly etching the silicon to be etched to remove the oxide film layer at the position of the first preset pattern to obtain the silicon to be etched with the first preset pattern, secondly forming a second photoresist layer on the silicon to be etched with the first preset pattern, photoetching the second photoresist layer to obtain the photoresist layer with a second preset pattern on the oxide film layer, wherein the second preset pattern comprises at least one first preset pattern, finally etching one side of the silicon to be etched, which forms the second preset pattern, to form a first functional area at the position of the first preset pattern, and forming a second functional area in the second preset pattern except the position of the first preset pattern, and the etching depth of different functional areas is realized by one-time deep silicon etching by utilizing the different etching rates of the silicon to be etched and the oxide film layer, and the method has the advantages of easiness in glue homogenizing and high exposure precision.
It should be noted that: the sequence of the embodiments of the present application is only for description, and does not represent the advantages and disadvantages of the embodiments. And specific embodiments thereof have been described above. Other embodiments within the scope of the appended claims, the various embodiments of this specification are described in a progressive manner, and like reference numerals and similar parts may be used to describe various embodiments with reference to other embodiments.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A deep silicon etching method is characterized by comprising the following steps:
s1, performing film deposition on silicon (1) to be etched, and forming an oxide film layer (2) with a preset thickness on the silicon (1) to be etched;
s2, forming a first photoresist layer (301) on the oxide film layer (2), and photoetching the first photoresist layer (301) to obtain a photoresist layer with a first preset pattern on the oxide film layer (2);
s3, etching the silicon (1) to be etched to remove the oxide film layer (2) at the first preset pattern position, and obtaining the silicon (1) to be etched with the first preset pattern;
s4, forming a second photoresist layer (302) on the silicon (1) to be etched with the first preset pattern, and photoetching the second photoresist layer (302) to obtain a photoresist layer with a second preset pattern on the oxide film layer (2), wherein the second preset pattern comprises at least one first preset pattern;
s5, etching one side of the silicon (1) to be etched, which forms the second preset pattern, so as to form a first functional area (4) at the first preset pattern, and form a second functional area (5) in the second preset pattern except the first preset pattern, wherein the etching depth of the first functional area (4) is greater than that of the second functional area (5).
2. The method according to claim 1, wherein the predetermined thickness of the oxide film layer (2) is determined based on a target etching depth of the first functional region (4), a target etching depth of the second functional region (5), a silicon etching rate, and an oxide film layer (2) etching rate.
3. The method according to claim 2, wherein the ratio of the silicon etching rate to the oxide film layer (2) etching rate is greater than or equal to 150: 1.
4. the method according to claim 3, wherein the thickness of the oxide film layer (2) is obtained based on the following calculation formula:
Figure FDA0003407558140000021
wherein x is the thickness of the oxide film layer (2); h1Is the etching depth of the first functional region (4); h2Is the etching depth (H) of the second functional region (5)1>H2);R1The silicon etch rate; r2The etching rate of the oxide film layer (2).
5. The method according to claim 4, wherein the etching time for etching the second functional region (5) to meet a target etching depth is determined by a preset thickness of the oxide film layer (2), a target etching depth of the first functional region (4), the silicon etching rate, and the oxide film layer (2) etching rate.
6. The method according to claim 1, wherein the thin film oxide layer (2) is a silicon oxide layer.
7. The method of claim 1, wherein in step S3, the etching process is performed by wet etching using an ammonium fluoride etchant.
8. The method of claim 1, wherein in step S5, the etching method is dry etching.
9. The method according to claim 1, characterized in that the first functional region (4) has an etch depth of 0.1-1000 um; the etching depth of the second functional region (5) is 0.1um-1000 um.
10. The method of claim 1, wherein the photoresist layer has a thickness of 1um to 20 um.
CN202111521328.4A 2021-12-13 2021-12-13 Deep silicon etching method Pending CN114361099A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111521328.4A CN114361099A (en) 2021-12-13 2021-12-13 Deep silicon etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111521328.4A CN114361099A (en) 2021-12-13 2021-12-13 Deep silicon etching method

Publications (1)

Publication Number Publication Date
CN114361099A true CN114361099A (en) 2022-04-15

Family

ID=81100347

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111521328.4A Pending CN114361099A (en) 2021-12-13 2021-12-13 Deep silicon etching method

Country Status (1)

Country Link
CN (1) CN114361099A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0729175A1 (en) * 1995-02-24 1996-08-28 International Business Machines Corporation Method for producing deep vertical structures in silicon substrates
US6833602B1 (en) * 2002-09-06 2004-12-21 Lattice Semiconductor Corporation Device having electrically isolated low voltage and high voltage regions and process for fabricating the device
JP2006041397A (en) * 2004-07-29 2006-02-09 Renesas Technology Corp Manufacturing method of semiconductor device
JP2009170805A (en) * 2008-01-18 2009-07-30 Fuji Electric Device Technology Co Ltd Method of manufacturing semiconductor device
CN106032268A (en) * 2015-03-20 2016-10-19 中芯国际集成电路制造(上海)有限公司 Method for manufacturing MEMS device
CN106229812A (en) * 2016-08-31 2016-12-14 山东华光光电子股份有限公司 A kind of preparation method of the GaAs base laser with different depth groove

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0729175A1 (en) * 1995-02-24 1996-08-28 International Business Machines Corporation Method for producing deep vertical structures in silicon substrates
US6833602B1 (en) * 2002-09-06 2004-12-21 Lattice Semiconductor Corporation Device having electrically isolated low voltage and high voltage regions and process for fabricating the device
JP2006041397A (en) * 2004-07-29 2006-02-09 Renesas Technology Corp Manufacturing method of semiconductor device
JP2009170805A (en) * 2008-01-18 2009-07-30 Fuji Electric Device Technology Co Ltd Method of manufacturing semiconductor device
CN106032268A (en) * 2015-03-20 2016-10-19 中芯国际集成电路制造(上海)有限公司 Method for manufacturing MEMS device
CN106229812A (en) * 2016-08-31 2016-12-14 山东华光光电子股份有限公司 A kind of preparation method of the GaAs base laser with different depth groove

Similar Documents

Publication Publication Date Title
US7361524B2 (en) Method of manufacturing floating structure
KR100290852B1 (en) method for etching
JP2002217170A (en) Method of forming fine pattern, method of fabricating semiconductor device and semiconductor device
CN110875575B (en) Method for manufacturing narrow ridge structure of semiconductor laser
TW201604993A (en) Etching method of high aspect-ratio structure and manufacturing method of MEMS devices
KR100796509B1 (en) Method of manufacturing semiconductor device
RU2437181C1 (en) Manufacturing method of deep-shaped silicon structures
CN114361099A (en) Deep silicon etching method
US7541255B2 (en) Method for manufacturing semiconductor device
JP6590510B2 (en) Silicon wafer processing method
TWI229377B (en) Method for forming cavities having different aspect ratios
KR101310668B1 (en) Method for multi-stage substrate etching and Terahertz radiation source manufactured by this method
US11211258B2 (en) Method of addressing dissimilar etch rates
JP2010183208A (en) Wet etching method and method for processing tuning fork type piezoelectric element strip
US20040265749A1 (en) Fabrication of 3d rounded forms with an etching technique
JPH03108330A (en) Manufacture of semiconductor
KR101026472B1 (en) Method for forming gate of semiconductor device
KR940001229B1 (en) Manufacturing mthod of semiconductor device
KR100266659B1 (en) Method for fabricating mask of semiconductor device
KR20030071899A (en) Method for manufacturing waveguide groove by using the dry etching
KR100843045B1 (en) Method of manufacturing a overlay vernier in the semiconductor cell
JPH03110563A (en) Pattern forming method
KR20020002573A (en) Method for fabricating fine pattern of semiconductor device
CN115376895A (en) Patterned structure and manufacturing method thereof
JP2002351045A (en) Phase shifting mask and method for producing the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20220415