CN114337249B - Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method - Google Patents
Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method Download PDFInfo
- Publication number
- CN114337249B CN114337249B CN202111388788.4A CN202111388788A CN114337249B CN 114337249 B CN114337249 B CN 114337249B CN 202111388788 A CN202111388788 A CN 202111388788A CN 114337249 B CN114337249 B CN 114337249B
- Authority
- CN
- China
- Prior art keywords
- capacitor
- inductor
- diode
- power switch
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 154
- 238000000034 method Methods 0.000 title claims abstract description 10
- 230000009977 dual effect Effects 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010248 power generation Methods 0.000 abstract description 4
- 238000007599 discharging Methods 0.000 abstract description 3
- 239000000446 fuel Substances 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 21
- 238000011217 control strategy Methods 0.000 description 8
- 230000035882 stress Effects 0.000 description 7
- 238000013461 design Methods 0.000 description 4
- 230000032683 aging Effects 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 3
- 230000014509 gene expression Effects 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- NAWXUBYGYWOOIX-SFHVURJKSA-N (2s)-2-[[4-[2-(2,4-diaminoquinazolin-6-yl)ethyl]benzoyl]amino]-4-methylidenepentanedioic acid Chemical compound C1=CC2=NC(N)=NC(N)=C2C=C1CCC1=CC=C(C(=O)N[C@@H](CC(=C)C(O)=O)C(O)=O)C=C1 NAWXUBYGYWOOIX-SFHVURJKSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004146 energy storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The invention discloses a three-port DC-DC converter based on a quasi-Z source and a switched capacitor and a competition control method, wherein the converter adopts competition control to realize automatic switching of modes, and can be flexibly matched with an upper-layer energy management distribution system, and belongs to the field of power electronic converters. The converter is based on a Boost circuit, combines a switch capacitor unit consisting of a switch tube, a diode and a capacitor with a charge-discharge unit consisting of the switch tube, the diode and an inductor, and changes the connection mode of the capacitor and the inductor in the circuit and the on-off condition of the diode by controlling the on-off of 3 switch tubes, so that the effects of improving voltage gain and charging and discharging of a second input source are achieved. The invention has higher voltage gain, the duty ratio D is within 0 to 0.5, the limit duty ratio can be avoided, and meanwhile, the switch capacitor structure can reduce the voltage stress of the switch device, thereby being applicable to new energy hybrid power generation systems such as fuel cells, photovoltaic cells and the like.
Description
Technical Field
The invention belongs to the field of power electronic converters, and particularly relates to a three-port DC-DC converter based on a quasi-Z source and a switched capacitor and a competition control method.
Background
With the development of economy, the problems of energy shortage and environmental pollution are increasingly serious. At present, the solar energy and wind energy power generation technology in China is mature, commercialization is realized, but large-scale popularization and utilization are difficult to realize due to the defects of uneven distribution, high requirements on climate and the like, and the development is gradually debilitated. The hydrogen energy has the advantages of high efficiency, zero pollution, reproducibility and the like, focuses on the development of various countries in the world, and becomes a hot spot for new energy research and application. The proton exchange membrane fuel cell is a novel power generation device for directly converting hydrogen energy into electric energy, only generates water and heat in the reaction process, has the advantages of high efficiency, no pollution and high reliability, is widely applied to the fields of new energy automobiles, distributed power generation and the like, and has great application prospect, so that the PEMFC hybrid power supply system becomes a research hot spot.
The output voltage variation range of the PEMFC is very large, and only boosting or dropping cannot meet the needs of practical applications, so it is very important to select and design a suitable DC-DC converter. The topology structure of the conventional PEMFC hybrid power supply system is mainly divided into two main types, one type is that a discrete power conversion unit is adopted to realize energy transfer between all ports, and the other type is that an integrated multi-port DC-DC converter is adopted to realize energy transfer between all ports. Multiport DC-DC converters can be classified into non-isolated, partially isolated, and fully isolated. The ports of the full-isolation type and partial-isolation type converters are electrically isolated through a transformer, direct current is inverted into high-frequency alternating current, energy transmission among the ports is realized through magnetic coupling, and the problems that the number of switching devices is large, the size of the converters is large and the control strategy is complex generally exist.
Disclosure of Invention
The invention aims to provide a three-port DC-DC converter based on a quasi-Z source and a switched capacitor.
The technical solution for realizing the purpose of the invention is as follows: a three-port DC-DC converter based on a quasi-Z source and a switch capacitor comprises a first input source V pe, a second input source V b, a first inductor L 1, a second inductor L 2, a third inductor L 3, a shunt diode D 0, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, a first power switch S 1, a second power switch S 2, a third power switch S 3, a first capacitor C 1, a second capacitor C 2, a third capacitor C 3, a fourth capacitor C 4, a fifth capacitor C 5 and a load R; the positive electrode of the first input source V is connected with the positive electrode of the first diode D, the negative electrode of the first input source V is connected with the negative electrode of the second input source V, the negative electrode of the first diode D is connected with the source electrode of the second power switch S, the drain electrode of the second power switch S is connected with the positive electrode of the second input source V, one end of the first inductor L is connected with the source electrode of the second power switch S, the other end of the first inductor L is connected with the second diode D and the positive electrode of the shunt diode D, the negative electrode of the second diode D is connected with one end of the first capacitor C, the negative electrode of the shunt diode D and the positive electrode of the second capacitor C are connected with the other end of the second inductor L, one end of the third inductor L is connected with the drain electrode of the second power switch S, the positive electrode of the third inductor L is connected with the negative electrode of the third power switch S, the positive electrode of the third diode D is connected with the negative electrode of the second input source V, the negative electrode of the third diode S is connected with the negative electrode of the seventh power switch S, the negative electrode of the fourth diode C is connected with the positive electrode of the fourth diode C, the fourth diode C is connected with the negative electrode of the fourth diode C is connected with the fourth diode C, the positive electrode of the third capacitor C 3 and the cathode of the fifth diode D 5 are connected with the anode of the sixth diode D 6, the cathode of the sixth diode D 6 is connected with the positive electrode of the fourth capacitor C 4 and one end of the load R, and the negative electrode of the fifth capacitor C 5 and the other end of the load R are connected with the source electrode of the first power switching tube S 1; the first inductor L 1, the second inductor L 2, the first capacitor C 1, the second capacitor C 2, the second diode D 2, the shunt diode D 0 and the first power switch tube S 1 form a quasi-Z source structure, and then the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, the third capacitor C 3, the fourth capacitor C 4 and the fifth capacitor C 5 form a switched capacitor unit boost, and the third inductor L 3, the third diode D 3, the seventh diode D 7 and the third power switch tube S 3 form a second input source V b charging loop with continuous output current.
Compared with the prior art, the invention has the remarkable advantages that:
(1) The invention changes the connection mode of the inductance and the capacitance and the on-off condition of the diode in the circuit by controlling the on-off of the three switching tubes, thereby achieving the effects of improving the voltage gain and charging and discharging.
(2) The invention realizes the energy flow of two power supplies and one load through the integrated three-port DC-DC converter, reduces the number of used devices and reduces the cost.
(3) The duty ratio of the power switch tube is in the range of 0-0.5, and the limit duty ratio is avoided.
(4) The invention adopts competition control to eliminate the negative influence of artificial experience setting parameters in rule control.
Drawings
Fig. 1 is a circuit diagram of a three-port DC-DC converter based on a quasi-Z source and a switched capacitor in accordance with the present invention.
Fig. 2 (a) and 2 (b) are equivalent circuit diagrams of different modes of a three-port DC-DC converter based on a quasi-Z source and a switched capacitor. Fig. 2 (a) is an equivalent circuit diagram in which the first power switching transistor S 1 is turned on and the other power switching transistors are turned off, and fig. 2 (b) is an equivalent circuit diagram in which all the power switching transistors are turned off.
Fig. 3 (a) -3 (c) are equivalent circuit diagrams of different modes of a three-port DC-DC converter based on a quasi-Z source and a switched capacitor. Fig. 3 (a) is an equivalent circuit diagram in which the first power switching tube S 1 is turned on, the other power switching tubes are turned off, fig. 3 (b) is an equivalent circuit diagram in which the third power switching tube S 3 is turned on, the other power switching tubes are turned off, and fig. 3 (c) is an equivalent circuit diagram in which the first power switching tube S 1 and the third power switching tube S 3 are turned off.
Fig. 4 (a) -4 (c) are equivalent circuit diagrams of different modes of a three-port DC-DC converter based on a quasi-Z source and a switched capacitor. Fig. 4 (a) is an equivalent circuit diagram of the first power switch tube S 1 and the second power switch tube S 2 being turned on, the third power switch tube S 3 being turned off, fig. 4 (b) is an equivalent circuit diagram of the second power switch tube S 2 being turned on, the other power switch tubes being turned off, and fig. 4 (c) is an equivalent circuit diagram of all power switch tubes being turned off.
Fig. 5 (a) -5 (c) are main waveforms of the three-port DC-DC converter based on the quasi-Z source and the switched capacitor in three operation modes. FIG. 5 (a) is a waveform diagram of the single input single output mode;
FIG. 5 (b) is a waveform diagram of a single input dual output mode of operation; fig. 5 (c) is a waveform diagram of the operation in the dual input single output mode.
Fig. 6 is a schematic diagram of a contention control strategy according to the present invention.
Detailed Description
The present invention will be further described with reference to the drawings and the specific embodiments.
As shown in fig. 1, a three-port DC-DC converter based on a quasi-Z source and a switched capacitor includes a first input source V pe, a second input source V b, a first inductor L 1, a second inductor L 2, a third inductor L 3, a shunt diode D 0, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, a first power switch S 1, a second power switch S 2, a third power switch S 3, a first capacitor C 1, a second capacitor C 2, a third capacitor C 3, a fourth capacitor C 4, a fifth capacitor C 5, and a load R; the positive electrode of the first input source V is connected with the positive electrode of the first diode D, the negative electrode of the first input source V is connected with the negative electrode of the second input source V, the negative electrode of the first diode D is connected with the source electrode of the second power switch S, the drain electrode of the second power switch S is connected with the positive electrode of the second input source V, one end of the first inductor L is connected with the source electrode of the second power switch S, the other end of the first inductor L is connected with the second diode D and the positive electrode of the shunt diode D, the negative electrode of the second diode D is connected with one end of the first capacitor C, the negative electrode of the shunt diode D and the positive electrode of the second capacitor C are connected with the other end of the second inductor L, one end of the third inductor L is connected with the drain electrode of the third power switch S, the positive electrode of the third diode D is connected with the negative electrode of the second input source V, the negative electrode of the third diode D is connected with the negative electrode of the seventh power switch S, the negative electrode of the fourth diode D is connected with the negative electrode of the fourth diode C is connected with the positive electrode of the fourth capacitor C, the positive electrode of the third capacitor C 3 and the cathode of the fifth diode D 5 are connected with the anode of the sixth diode D 6, the cathode of the sixth diode D 6 is connected with the positive electrode of the fourth capacitor C 4 and one end of the load R, and the negative electrode of the fifth capacitor C 5 and the other end of the load R are connected with the source electrode of the first power switching tube S 1; the first inductor L 1, the second inductor L 2, the first capacitor C 1, the second capacitor C 2, the second diode D 2, the shunt diode D 0 and the first power switch tube S 1 form a quasi-Z source structure, and then a capacitor unit of the switch is formed by a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a third capacitor C 3, a fourth capacitor C 4 and a fifth capacitor C 5, a second input source V b charging loop with continuous output current is formed by the third inductor L 3, the third diode D 3, the seventh diode D 7 and the third power switch tube S 3, and based on TPC (Three ports converter), a state space model of the converter is respectively built under each working mode, so as to obtain the PEMFC hybrid power supply system controller. In a single-input single-output mode, the first input source V pe or the second input source V b supplies power to the load through the quasi-Z source structure and the switched capacitor unit; in the dual-input single-output mode, the first input source V pe and the second input source V b are used for supplying power in a combined mode, and the load is also supplied with power through the quasi-Z source structure and the switched capacitor boosting unit; in the single-input double-output mode, the first input source V pe supplies power to the load, and meanwhile, the second input source V b is charged through the cascade Buck structure of the quasi-Z source structure, and the reasons of the cascade Buck structure are as follows: in the single-input dual-output mode, an inductance unit is needed to avoid clamping the output voltage when the second input source V b is charged due to the influence of the relationship between the first capacitor C 1, the second capacitor C 2 and the second input source V b; secondly, the Buck structure comprising the inductance unit has the advantage of constant output current while reducing the voltage, and the charging requirement is just met.
The invention can be divided into three working modes of single input single output, double input single output and single input double output according to the number of the input/output ports. Three operation modes will be described in detail, assuming that the voltage across the first input source V pe is V pe, the voltage across the second input source V b is V b, the voltage across the load R is V o, the current of the first inductor L 1 is I L1, the current of the second inductor L 2 is I L2, the current of the third inductor L 3 is I L3, the voltage across the first capacitor C 1 is V C1, the voltage across the second capacitor C 2 is V C2, the voltage across the third capacitor C 3 is V C3, the voltage across the fourth capacitor C 4 is V C4, the voltage across the fifth capacitor is V C5, the duty cycle of the first power switch S 1 is D 1, the duty cycle of the second power switch S 2 is D 2, the duty cycle of the third power switch S 3 is D 3, the capacitor equivalent series resistors R and R 1, and the switching cycle is T s:
Fig. 5 (a) shows a control waveform diagram of a single-input single-output mode, in which the converter has two operation modes, and an equivalent circuit diagram of a stage t 0～t1 is shown in fig. 2 (a), in which the first power switch tube is turned on S 1, the first input source V pe and the second capacitor C 2 charge the first inductor L 1, the first capacitor C 1 charges the second inductor L 2, the fifth capacitor C 5 charges the third capacitor C 3, and the fourth capacitor C 4 supply power to the load R together; the stage t 1～t2 is a second mode, and as shown in fig. 2 (b), the equivalent circuit diagram of the second mode is that the first power switch tube S 1 is turned off, the first input source V pe is combined with the first inductor L 1, the second inductor L 2 and the third capacitor C 3 to jointly charge the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4 and the fifth capacitor C 5, and supply power to the load R.
The following relationship can be listed in this mode:
solving to obtain output voltage as (8)
Solving other direct current quantities as shown in (9)
The voltage stress of the power switch tube and the diode device can be calculated according to the formula (10)
The current stress of the device is shown as (11)
The main waveform diagram of the single-input and double-output modes is shown in fig. 5 (b), and in one switching period, the modes have three working modes. As shown in fig. 3 (a), in the equivalent circuit of stage t 0～t1, in the first mode, the first power switch tube S 1 is turned on, the third power switch tube S 3 is turned off, at this time, the first input source V pe and the second capacitor C 2 charge the first inductor L 1, the first capacitor C 1 charges the second inductor L 2, the fifth capacitor C 5 charges the third capacitor C 3, and simultaneously, the third capacitor C 3 and the fourth capacitor C 4 supply power to the load R together, and the third inductor L 3 charges the second input source V b; as shown in fig. 3 (b), in the equivalent circuit of stage t 1～t2, in the second mode, the first power switch tube S 1 is turned off, and the third power switch tube S 3 is turned on, and at this time, the first input source V pe is combined with the first inductor L 1, the second inductor L 2 and the third capacitor C 3 to jointly charge the third inductor L 3, the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4 and the fifth capacitor C 5, and to supply power to the second input source V b and the load R; as shown in fig. 3 (C), in the equivalent circuit of the t 2～t3 stage, in the third mode, the first power switch tube S 1 and the third power switch tube S 3 are turned off, the first input source V pe is combined with the first inductor L 1, the second inductor L 2 and the third capacitor C 3 to jointly charge the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4 and the fifth capacitor C 5, and supply power to the load R, and the third inductor L 3 charges the second input source V b. This mode satisfies the relational expressions (1) to (11) and the expressions (12) and (13):
the output voltage V o is the same as the expression (8), and the voltage stress and the current stress of the power switch S 3 and the diode D 3、D7 are:
The main waveform diagram of the dual-input single-output mode is shown in fig. 5 (c), and in one switching period, the mode has three working modes. As shown in fig. 4 (a), the equivalent circuit in the stage t 0～t1 is that the first power switch tube S 1 and the second power switch tube S 2 are both turned on, the second input source V b and the second capacitor C 2 charge the first inductor L 1, the first capacitor C 1 charges the second inductor L 2, the fifth capacitor C 5 charges the third capacitor C 3, and the fourth capacitor C 4 together supply power to the load R; as shown in fig. 4 (b), in the equivalent circuit of stage t 1～t2, in the second mode, the first power switch tube S 1 is turned off, the second power switch tube S 2 is turned on, and the second input source V b is combined with the first inductor L 1, the second inductor L 2 and the third capacitor C 3 to jointly charge the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4 and the fifth capacitor C 5 and supply power to the load R; as shown in fig. 4 (C), in the equivalent circuit at stage t 2～t3, in the third mode, the first power switch tube S 1 and the second power switch tube S 2 are turned off, and the first input source V pe is combined with the first inductor L 1, the second inductor L 2 and the third capacitor C 3 to jointly charge the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4 and the fifth capacitor C 5 and supply power to the load R. The relationships that can be listed in this mode are:
The obtained output voltage is shown as (23)
Other direct current amounts in this mode are as follows:
in this mode, the power switch tube and diode voltage stresses are as follows:
The power switch tube and diode current stress is as follows:
After the variable transfer function required to be controlled in each mode is obtained, the controller can be designed, after the completion, the mode switching is realized by adopting the competition control, and the competition control uses the duty ratio signals of the first power switch tube S 1 and the third power switch tube S 3 and the SOC and the load voltage of the second input source V b as judgment bases. Compared with a regular control method, the method has the advantages that the problem that the parameter set by people is inconsistent with the parameter drift caused by battery aging is solved, so that at any time, the converter judges whether the mode needs to be switched according to the maximum output power of the current fuel cell, and the situation that the battery is damaged due to overload and the like caused by the parameter drift after the battery aging is avoided.
According to analysis of three working modes, the invention realizes the charge and discharge of the second input source V b through the integrated three-port DC-DC converter, reduces the number of used devices, lowers the cost, simultaneously has the duty ratio of 0-0.5, can avoid the condition of limiting duty ratio, and improves the reliability. The converter uses competing control, a total of 3 PI controllers, BDCR (Battery discharge current controller) for controlling the second input source discharge current, BCR (Battery charge current controller) for controlling the second input source charge current, and OVR (Output voltage controller) for controlling the output voltage. The inputs of the 3 controllers are respectively a second input source discharge current i b,dis, a second input source charging current i b,cha and a difference value between an output voltage v o and a reference value i b,disref,ib,charef,vo,ref of the second input source discharge current i b,dis, and the outputs of the 3 PI controllers are respectively d b,dis,db,cha and d v, wherein d b,cha,dv is externally added with a difference value between a second input source SOC and a reference value SOC ref as an input signal of competition control, so that a judging condition of mode switching is obtained. The working state of the switching tube S 2 or the switching tube S 3 is determined by d b,dis and d b,cha, d b,dis is the duty ratio d 2,db,cha of the second power switching tube S 2, d 3, is the duty ratio d 2/d3 of the third power switching tube S 3, the output voltage is controlled by the switching tube S 1, and d 1 is d v. The end result is: in a single-input single-output mode, the first power switch tube S 1 works; in the single-input double-output mode, the first power switching tube S 1 and the third power switching tube S 3 work; in the dual-input single-output mode, the first power switching tube S 1 and the second power switching tube S 2 work.
In summary, the competition control method of the three-port DC-DC converter based on the quasi-Z source and the switched capacitor adopts a competition control strategy to realize automatic switching between modes of the converter, and specifically comprises the following steps:
If the current mode is in the single-input single-output mode, the switching to the double-input single-output mode is based on whether the duty ratio of the first power switch tube S 1 reaches an upper limit value, and the switching to the single-input double-output mode is based on whether the state of charge (SOC) of the second input source V b is smaller than a lower limit value;
If the current mode is in the single-input and double-output mode, the basis for switching to the single-input and single-output mode is whether the SOC of the second input source V b reaches the maximum value, and the basis for switching to the double-input and single-output mode is whether the duty ratio of the third power switch tube S 3 reaches the upper limit value;
if the current mode is in the dual-input single-output mode, the basis for switching to the single-input single-output mode is whether the second input source SOC is in a given interval, and the basis for switching to the single-input dual-output mode is whether the SOC of the second input source V b is smaller than the lower limit value.
The competing control eliminates the negative effects of relying on human experience for parameter setting and has greater flexibility than rule-based control strategies. Even if the output characteristics of the battery change, the competition control can normally realize mode switching, so that the reliability of the converter in operation is improved.
The invention adopts a non-isolated three-port DC-DC converter combining a quasi-Z source circuit and a switched capacitor boosting unit and a competition control method thereof. By controlling the on and off of the three switching tubes, the connection mode of the inductance and the capacitance in the circuit and the on-off condition of the diode are changed, so that the effects of improving the voltage gain and charging and discharging are achieved.
The invention designs a three-port DC-DC converter based on a quasi-Z source and a switched capacitor, and designs a competitive control strategy for the converter. Secondly, the energy storage port introduces a Buck structure, so that the problem of output voltage clamping is solved. The inverter duty ratio is 0 to 0.5, and there is no limit duty ratio. The invention combines the on-off state and the topology power flow direction of the power switch tube in each mode, and deduces the performance indexes of the voltage gain of the converter and the voltage/current stress of the switch device in each mode. The invention designs a competition control strategy to enable the converter to automatically switch modes under different load powers. According to the method, the duty ratio of the power switch tube and the second input source SOC are taken as judgment basis, compared with a control strategy based on rules, the competition control eliminates negative influence caused by parameter setting by means of artificial experience, and the competition control strategy based on the duty ratio and the second input source SOC can adapt to the current state of the battery along with the time, so that the competition control can normally realize mode switching even if the battery output characteristics change due to battery aging or external force factors.
Claims (6)
1. The three-port DC-DC converter based on the quasi-Z source and the switch capacitor is characterized by comprising a first input source V pe, a second input source V b, a first inductor L 1, a second inductor L 2, a third inductor L 3, a shunt diode D 0, a first diode D 1, a second diode D 2, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, a seventh diode D 7, a first power switch tube S 1, a second power switch tube S 2, a third power switch tube S 3, a first capacitor C 1, a second capacitor C 2, a third capacitor C 3, a fourth capacitor C 4, a fifth capacitor C 5 and a load R; the positive electrode of the first input source V is connected with the positive electrode of the first diode D, the negative electrode of the first input source V is connected with the negative electrode of the second input source V, the negative electrode of the first diode D is connected with the source electrode of the second power switch S, the drain electrode of the second power switch S is connected with the positive electrode of the second input source V, one end of the first inductor L is connected with the source electrode of the second power switch S, the other end of the first inductor L is connected with the second diode D and the positive electrode of the shunt diode D, the negative electrode of the second diode D is connected with one end of the first capacitor C, the negative electrode of the shunt diode D and the positive electrode of the second capacitor C are connected with the other end of the second inductor L, one end of the third inductor L is connected with the drain electrode of the second power switch S, the positive electrode of the third inductor L is connected with the negative electrode of the third power switch S, the positive electrode of the third diode D is connected with the negative electrode of the second input source V, the negative electrode of the third diode S is connected with the negative electrode of the seventh power switch S, the negative electrode of the fourth diode C is connected with the positive electrode of the fourth diode C, the fourth diode C is connected with the negative electrode of the fourth diode C is connected with the fourth diode C, the positive electrode of the third capacitor C 3 and the cathode of the fifth diode D 5 are connected with the anode of the sixth diode D 6, the cathode of the sixth diode D 6 is connected with the positive electrode of the fourth capacitor C 4 and one end of the load R, and the negative electrode of the fifth capacitor C 5 and the other end of the load R are connected with the source electrode of the first power switching tube S 1; the first inductor L 1, the second inductor L 2, the first capacitor C 1, the second capacitor C 2, the second diode D 2, the shunt diode D 0 and the first power switch tube S 1 form a quasi-Z source structure, a switched capacitor unit formed by the fourth diode D 4, the fifth diode D 5, the sixth diode D 6, the third capacitor C 3, the fourth capacitor C 4 and the fifth capacitor C 5 forms a charging loop of the second input source V b by the third inductor L 3, the third diode D 3, the seventh diode D 7 and the third power switch tube S 3.
2. The three-port DC-DC converter based on the quasi-Z source and the switched capacitor of claim 1, comprising three modes, which are a single-input single-output mode, a single-input double-output mode, and a double-input single-output mode, respectively, in which the first power switching transistor S 1 operates; in the single-input double-output mode, the first power switching tube S 1 and the third power switching tube S 3 work; in the dual-input single-output mode, the first power switching tube S 1 and the second power switching tube S 2 work.
3. The three-port DC-DC converter of claim 2 wherein in a switching cycle, in a single input single output mode, the converter has two modes of operation, in a first mode, the first power switch tube S 1 is turned on, the first input source V pe charges the first inductor L 1 with the second capacitor C 2, the first capacitor C 1 charges the second inductor L 2, the fifth capacitor C 5 charges the third capacitor C 3, and simultaneously supplies power to the load R in combination with the fourth capacitor C 4, in a second mode, the first power switch tube S 1 is turned off, and the first input source V pe in combination with the first inductor L 1, the second inductor L 2, and the third capacitor C 3 charges the first capacitor C 1, the second capacitor C 2, the fourth capacitor C 4, and the fifth capacitor C 5 and supplies power to the load R in combination.
4. The three-port DC-DC converter of claim 2 wherein in one switching cycle, the converter has three modes of operation in a single input and dual output mode, the first power switch S is turned on in the first mode, the third power switch S is turned off, the first input source V and the second capacitor C charge the first inductor L at this time, the first capacitor C charges the second inductor L, the fifth capacitor C charges the third capacitor C and simultaneously supplies power to the load R in combination with the fourth capacitor C, the third inductor L charges the second input source V, the first power switch S is turned off in the second mode, the third power switch S is turned on in combination with the first inductor L, the second inductor L and the third capacitor C, and charges the second input source V and the load R in combination with the first inductor C, the second inductor C and the fifth capacitor C, and the third power switch S and the third inductor C are powered off in combination with the third inductor C, and the third inductor C is powered by the third inductor L, the third inductor C and the third inductor C is charged in combination with the third inductor C.
5. The three-port DC-DC converter according to claim 2, wherein in one switching cycle, the converter has three operation modes in a dual-input single-output mode, in the first mode, the first power switch tube S 1 and the second power switch tube S3938 are connected, the second input source V b and the second capacitor C 2 charge the first inductor L 1, the first capacitor C 1 charges the second inductor L 2, the fifth capacitor C 5 charges the third capacitor C 3, and the fourth capacitor C 4 jointly supplies power to the load R, in the second mode, the first power switch tube S 4 is turned off, the second power switch tube S 4 is connected, the second input source V 4 is jointly the first inductor L2, the second inductor L 4 and the third capacitor C 4 are jointly used as the first capacitor C 4, the second capacitor C 4, the fourth capacitor C 4 and the fifth capacitor C 4 are charged, and the load R is jointly used as the first capacitor C 4, the second capacitor C 4 and the second capacitor C 4 are jointly used as the second inductor C 4, the second capacitor C 4 and the third capacitor C 4 are jointly used as the second inductor C 4 and the third capacitor C 4.
6. A contention control method based on the three-port DC-DC converter according to claim 1, characterized by comprising the following specific steps:
If the current power switch is in the single-input single-output mode, when the duty ratio of the first power switch tube S 1 reaches the upper limit value, switching to the double-input single-output mode; when the state of charge SOC of the second input source V b is smaller than the lower limit value, switching to a single-input double-output mode;
If the current mode is in the single-input double-output mode, switching to the single-input single-output mode when the SOC of the second input source V b reaches the maximum value; when the duty ratio of the third power switch tube S 3 reaches the upper limit value, switching to a double-input single-output mode;
If the current is in the dual-input single-output mode, switching to the single-input single-output mode when the SOC of the second input source V b is in a given interval; when the SOC of the second input source V b is less than the lower limit value, switching to the single-input dual-output mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111388788.4A CN114337249B (en) | 2021-11-22 | 2021-11-22 | Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111388788.4A CN114337249B (en) | 2021-11-22 | 2021-11-22 | Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114337249A CN114337249A (en) | 2022-04-12 |
| CN114337249B true CN114337249B (en) | 2024-04-23 |
Family
ID=81047306
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111388788.4A Active CN114337249B (en) | 2021-11-22 | 2021-11-22 | Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114337249B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106787692A (en) * | 2017-01-16 | 2017-05-31 | 华南理工大学 | A kind of quasi- Z source converters of type switching capacity altogether |
| CN107565811A (en) * | 2017-08-10 | 2018-01-09 | 燕山大学 | High-gain Double-input direct-current converter and modulator approach based on switched capacitor network |
| CN107612332A (en) * | 2017-09-29 | 2018-01-19 | 天津大学 | The three Port Translation device systems applied to independent photovoltaic generating occasion |
| CN112467974A (en) * | 2020-11-18 | 2021-03-09 | 哈尔滨理工大学 | High-gain low-stress DC/DC converter for fuel cell |
| CN112803768A (en) * | 2021-01-18 | 2021-05-14 | 福州大学 | Three-port high-gain direct current converter |
| CN113098271A (en) * | 2021-04-23 | 2021-07-09 | 南京理工大学 | High-gain three-port DC-DC converter based on switch capacitor |
-
2021
- 2021-11-22 CN CN202111388788.4A patent/CN114337249B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106787692A (en) * | 2017-01-16 | 2017-05-31 | 华南理工大学 | A kind of quasi- Z source converters of type switching capacity altogether |
| CN107565811A (en) * | 2017-08-10 | 2018-01-09 | 燕山大学 | High-gain Double-input direct-current converter and modulator approach based on switched capacitor network |
| CN107612332A (en) * | 2017-09-29 | 2018-01-19 | 天津大学 | The three Port Translation device systems applied to independent photovoltaic generating occasion |
| CN112467974A (en) * | 2020-11-18 | 2021-03-09 | 哈尔滨理工大学 | High-gain low-stress DC/DC converter for fuel cell |
| CN112803768A (en) * | 2021-01-18 | 2021-05-14 | 福州大学 | Three-port high-gain direct current converter |
| CN113098271A (en) * | 2021-04-23 | 2021-07-09 | 南京理工大学 | High-gain three-port DC-DC converter based on switch capacitor |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114337249A (en) | 2022-04-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109889047B (en) | Two-stage DC-DC converter suitable for wide input and output voltage range | |
| CN110336459B (en) | Three-port Boost integrated converter for photovoltaic energy storage system and control method | |
| CN113098271B (en) | High-gain three-port DC-DC converter based on switch capacitor | |
| CN110912245B (en) | Three-port integrated photovoltaic energy storage converter | |
| CN210041650U (en) | Non-isolated high-gain three-port converter | |
| CN111431415B (en) | High-boost isolated DC converter with parallel input and series output | |
| CN108512430A (en) | A kind of three Port Translation device of ZVZCS full-bridges and its control method | |
| CN210431234U (en) | Multi-port converter applied to household direct-current micro-grid | |
| CN113965081B (en) | Multi-working-condition high-gain three-port DC-DC converter based on Cuk | |
| CN112968603B (en) | Wide-transformation-ratio transformerless buck-boost converter | |
| CN112803768B (en) | Three-port high-gain direct current converter | |
| CN113992010A (en) | Wide-gain DC-DC converter and control method thereof | |
| CN204465377U (en) | A kind of and series interleaved formula three Port Translation device | |
| CN110829837B (en) | Low-voltage stress ZVS high-gain Boost converter | |
| CN209767386U (en) | Four-port converter with bipolar output | |
| CN115347788B (en) | Non-isolated three-port converter and control method and control circuit thereof | |
| CN102545637B (en) | Buck-boost secondary side regulation three-port direct current converter | |
| CN114337249B (en) | Three-port DC-DC converter based on quasi-Z source and switched capacitor and competition control method | |
| CN215934729U (en) | Novel wide-input-range three-port converter | |
| CN115664169A (en) | Quasi-peak current control method for bidirectional four-switch Buck-Boost | |
| CN112953226B (en) | High-gain converter capable of being used for photovoltaic charging and control method thereof | |
| CN112865536B (en) | High-voltage gain non-isolated three-port converter | |
| CN114221545A (en) | High-voltage gain boosting cuk circuit, control method and control device | |
| CN209948707U (en) | Bidirectional active equalization circuit | |
| Wang et al. | Three ports bidirectional DC converters of the interleaved buck/boost integrated with dual active bridge |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |