CN115664169A - Quasi-peak current control method for bidirectional four-switch Buck-Boost - Google Patents

Quasi-peak current control method for bidirectional four-switch Buck-Boost Download PDF

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CN115664169A
CN115664169A CN202211332218.8A CN202211332218A CN115664169A CN 115664169 A CN115664169 A CN 115664169A CN 202211332218 A CN202211332218 A CN 202211332218A CN 115664169 A CN115664169 A CN 115664169A
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voltage
switching
current
time
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华科
田伟
周卫东
王学申
邵京伟
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State Grid Heilongjiang Electric Power Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers

Abstract

The invention provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost. The method is based on real-time sampling and comparison of input voltage, output voltage and inductive current, zero-voltage switching-on of four switching tubes can be achieved in a full-load range and an input voltage range, and meanwhile, main power inductive current has a low effective value, so that efficiency and power density of the four-switch Buck-Boost converter can be improved, and the method has general reference significance for research of control strategies of other four-switch converters.

Description

Quasi-peak current control method for bidirectional four-switch Buck-Boost
Technical Field
The invention belongs to the technical field of converter control, and particularly relates to a quasi-peak current control method for a bidirectional four-switch Buck-Boost.
Background
With the rapid development of the fields of photovoltaics, electric vehicles, data centers and the like, the demand for a wide voltage input range and high-efficiency DC-DC converter is increasing, and meanwhile, a bidirectional DC-DC converter with excellent performance is also required for charging and discharging in a wider battery voltage range in a photovoltaic system and an electric vehicle system. In these applications, different voltage rails may be required to face different situations, for example, in a photovoltaic energy storage system, the voltage of the battery pack may increase due to continuous energy storage during the day and decrease due to discharge endurance during the night, and the range of the battery voltage is wide. Most of the time, engineers set the charging and discharging voltage range of the storage battery to be lower than the MPPT output bus voltage, so that the buck charging and boost discharging modes can be adopted. However, the conventional 2-switch buck-boost converter has difficulty in realizing full-range soft switching and has limited efficiency.
At present, converters capable of achieving a voltage boosting and reducing function mainly comprise a Buck-Boost converter, a Cuk converter, a Sepic converter and a Zeta converter, but the polarity of output voltage of the traditional Buck-Boost converter and the polarity of input voltage of the Cuk converter are opposite, so that the application occasions are limited; more than one power inductor and capacitor are used in the topology of the Cuk converter, the Sepic converter and the Zeta converter, so that the circuit structure is more complex and is not beneficial to the improvement of power density of a power supply.
Compared with the prior art, the four-switch Buck-Boost converter can realize voltage boosting and reducing by only using one power inductor, has the advantages of same input and output voltage polarities, low voltage stress of a power device and the like, and can realize bidirectional conversion of electric energy. Therefore, the four-switch Buck-Boost converter is widely applied to industrial occasions such as a fuel cell power system, an electric vehicle charger, a photovoltaic direct-current micro-grid and the like. However, the number of four-switch Buck-Boost switching tubes is large, and compared with the control strategy of the traditional converter, the control strategy is complex, and the existing control method mainly has the following problems:
(1) The working mode of the control method depends on the comparison between the input voltage and the output voltage, the seamless switching of the voltage increase and the voltage decrease cannot be realized, and the frequent switching is needed on the occasion that the input voltage is close to the output voltage, so that the stability of the system is reduced.
(2) It is difficult to achieve soft switching at full load, full input voltage range, with the increase in switching frequency, the switching loss increases.
(3) When the quadrilateral current control is adopted, the control parameters depend on the real-time calculation of the controller, the parameter expression is complex, the calculation amount of the controller is large, and the further improvement of the bandwidth of the control system is limited.
Disclosure of Invention
The present invention aims to solve the problems in the prior art. The invention provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost.
The invention is realized by the following technical scheme, and provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost, wherein the switching period of a switching tube of an FSBB (frequency shift base) is divided into four stages according to the on and off states of the switching tube: an energy storage stage D-A, a direct connection stage A-B, an energy release stage B-C and a clamping stage C-D;
the time of node A is determined by the result of comparing the inductive current with the output Verr of the voltage regulator, and when the inductive current exceeds Verr, Q is 3 Conducting Q 4 Turning off the converter, and enabling the converter to enter a direct connection stage A-B from an energy storage stage D-A; the time of the node B is determined by the output Verr of the voltage regulator and a proportionality coefficient k, and the time satisfies the following conditions:
T 1 +T 2 =Verr·k (1)
wherein T is 1 、T 2 Respectively the time of an energy storage stage and the time of a direct connection stage; verr is the output of the voltage regulator; k is a proportionality coefficient, T 1 +T 2 Is Q 1 On-time in one cycle, thereby by controlling Q 1 The conduction time of the point A and the point B realizes indirect control of the point B current, so that an expression of the point A and the point B inductive current can be obtained:
Figure BDA0003913940250000021
according to the formula (2), when k and V are in 、V o L is a timing, I A And I B The size of (A) is only related to Verr; due to I A And I B The peak current of the inductor is respectively in the boosting mode and the voltage reduction mode, so the control mode is called quasi-peak current control.
Further, in the normal working state of the converter, the four switching moments of A, B, C and D should meet ZVS conditions, the time of the C-D section is as short as possible to reduce loss and reactive power exchange, and in the optimal state, the C-D time is close to zero, and at the moment, the converter works in a quasi-critical continuous mode.
Further, the quasi-peak current control method can realize soft switching of all switching tubes in a full load range and a full input voltage range, and a hardware comparator is adopted to generate a trigger signal and is processed by an FPGA in the realization process, wherein the processing specifically comprises the following steps:
the method comprises the steps that an external signal conditioning circuit and an ADC conversion chip are used for sampling inductive current and output voltage, difference is made between a voltage sampling signal and a given signal to generate an error signal, the error signal is output through a voltage loop generated in a PI compensation link, threshold voltage is output to each path of comparator through the DAC conversion chip and is compared with the inductive current signal, the output signal of the comparator is input into an FPGA to serve as a control basis of each switching tube, the FPGA generates a logic circuit according to a program, and control over each switching tube is achieved.
Further, to completely realize zero voltage turn-on of each switching tube, it is necessary to satisfy:
Figure BDA0003913940250000031
wherein C oss Is the output capacitance of the MOSFET, t dead As dead time, V in For input voltage, V out Is the output voltage.
Furthermore, no matter in the boosting state or the voltage reduction state, the current at the point A is constantly equal to Verr, and I is required to meet the requirement for realizing the soft switch at the point A A ≥I zvs In aThe current at point A is rewritten as:
I A =max(Verr,I zvs ) (4)。
further, for point B current, I in buck mode B ≥I A Therefore, when the point A can realize soft switching, the point B can realize soft switching certainly; in boost mode, I B Possibly due to T 1 +T 2 Too long to be lower than I zvs Therefore in the control logic, I L And I zvs Comparison when I L =I zvs While forcibly turning off Q 1 Turn on Q 3 To ensure Q 3 And realizing zero voltage switching-on.
Further, for points C and D, in an ideal state, the circuit operates in a quasi-critical conduction mode, where T is 4 The time is zero to minimize the reverse current of the inductor to improve converter efficiency, when point C and point D become the same point, i.e. Q 2 Off Q 1 Q while conducting 3 Turn off Q 4 Conducting; to realize Q 1 And Q 4 Zero voltage of (1) on, it is required to satisfy C(D) ≤-I zvs (ii) a In the control logic, I L And I zvs Comparison, when I L =-I zvs When the control operation is triggered, the control operation of the point C (D) is triggered.
The invention has the beneficial effects that:
(1) The soft switching can be realized in the full load range, and the efficiency, the switching frequency and the power density of the four-switch Buck-Boost converter can be further improved.
(2) In the control process, input and output voltages do not need to be compared, seamless switching of the buck-boost modes can be achieved, and the stability of the system is improved.
(3) A new control method and a new idea are provided for researchers of the four-switch Buck-Boost converter, and the wide application of the topology in the fields of direct-current micro-grids, electric automobiles, energy storage and the like is promoted.
Drawings
FIG. 1 is a schematic diagram of a four-switch buck-boost power section;
FIG. 2 is a diagram of four-switch buck-boost key waveforms;
FIG. 3 is a waveform of the inductor current in boost state;
FIG. 4 is a waveform of the inductor current in the buck mode;
FIG. 5 is a waveform diagram of inductor current simulation at 60V input;
FIG. 6 is a waveform diagram of inductor current simulation at 40V input;
FIG. 7 is a waveform diagram of the inductor current simulation under light load conditions;
FIG. 8 is a waveform of an inductor current simulation under full load conditions;
FIG. 9 is a diagram of the overall architecture of the control system;
FIG. 10 is a block diagram of the internal logic of the FPGA.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Since the topology of the converter is symmetrical, the control method of the bidirectional converter is described below by taking the modulation method in one direction as an example. The invention provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost converter. The method is based on real-time sampling and comparison of input voltage, output voltage and inductive current, zero voltage switching-on of four switching tubes can be achieved in a full load range and an input voltage range, meanwhile, main power inductive current has a low effective value, efficiency and power density of the four-switch Buck-Boost converter are improved, and the method has general reference significance for research on control strategies of other four-switch converters.
With reference to fig. 1 to 10, the invention provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost, which divides a switching cycle into four stages according to the on and off states of a switching tube of an FSBB: an energy storage stage D-A, a direct connection stage A-B, an energy release stage B-C and a clamping stage C-D; under the normal working state of the converter, the four switching moments of A, B, C and D all meet the ZVS condition, the time of the C-D section is as short as possible to reduce loss and reactive power exchange, and under the optimal state, the C-D time is close to zero, and at the moment, the converter works in a quasi-critical continuous mode.
In the conventional peak current control, the inductor current is compared with the output of the voltage regulator, and the main switching tube is turned off when the inductor current exceeds the output of the voltage regulator, so as to control the peak value of the inductor current, that is, the voltage loop output is given as the peak value of the inductor current. However, this method is not applicable in the FSBB topology, because there are two sets of complementary switching tubes in the FSBB, when the FSBB works in different states of boost or buck, the maximum point of the inductor current will change with the switching of the mode, as shown in fig. 3 and 4, in the boost state, the peak value of the inductor current appears at point a, and in the buck state, the peak value of the inductor current appears at point B, and if only one of the two points is controlled independently, it will be a problem. Therefore, the invention provides a quasi-peak current control method for a bidirectional four-switch Buck-Boost, which utilizes the output of a voltage ring and controls the current of the two points at the same time.
The invention provides quasi-peak current control based on traditional peak current control, i.e. the time of node A is determined by the result of comparing the inductive current with the output Verr of the voltage regulator, when the inductive current exceeds Verr, Q is used 3 Conducting Q 4 Switching off the converter, and enabling the converter to enter a direct connection stage A-B from an energy storage stage D-A; the time of the node B is determined by the output Verr of the voltage regulator and a proportionality coefficient k, and the time satisfies the following conditions:
T 1 +T 2 =Verr·k (1)
wherein T is 1 、T 2 The time of the energy storage stage and the time of the direct connection stage are respectively; verr is the output of the voltage regulator; k is a proportionality coefficient, T 1 +T 2 Is Q 1 On-time in one cycle, thereby by controlling Q 1 The conduction time of the inductor realizes the indirect control of the current at the point B, thereby obtaining the inductors at the point A and the point BThe expression of the current:
Figure BDA0003913940250000051
according to the formula (2), when k and V are in 、V o L is a timing, I A And I B The size of (A) is only related to Verr; due to I A And I B The peak current of the inductor is respectively in the boosting mode and the reducing mode, so the control mode is called quasi-peak current control.
The key waveform of the FSBB converter is shown in FIG. 2, and the current in the inductor is supplied to the output capacitor (C) of the MOSFET in the dead time when the upper and lower tubes of the same bridge arm are switched oss ) Charging and discharging, which requires sufficient energy in the inductor. To completely realize zero voltage switching-on of each switching tube, the following requirements are met:
Figure BDA0003913940250000052
wherein C is oss Is the output capacitance of the MOSFET, t dead For dead time, V in For input voltage, V out Is the output voltage.
No matter in the boosting state or the voltage reduction state, the current at the point A is constantly equal to Verr, and I is required to be met to realize the soft switch at the point A A ≥I zvs Then, the current at point a is rewritten as:
I A =max(Verr,I zvs ) (4)。
for point B current, I in buck mode B ≥I A Therefore, when the point A can realize soft switching, the point B can realize soft switching certainly; in boost mode, I B Possibly because of T 1 +T 2 Too long to be lower than I zvs So in the control logic, I L And I zvs Comparison, when I L =I zvs When it is time, Q is forcibly turned off 1 Turn on Q 3 To ensure Q 3 And realizing zero voltage switching-on.
For points C and D, in theoryIn this state, the circuit operates in the quasi-critical conduction mode, at which time T 4 The time is zero to minimize the reverse current of the inductor to improve converter efficiency, when point C and point D become the same point, i.e. Q 2 Off Q 1 Q while conducting 3 Turn off Q 4 Conducting; to realize Q 1 And Q 4 Zero voltage on, I C(D) ≤-I zvs (ii) a In the control logic, I L And I zvs Comparison, when I L =-I zvs When the control operation is triggered, the control operation of the point C (D) is triggered.
According to the control method provided by the invention, a four-switch Buck-Boost circuit with 40-60V input and 48V output is simulated by using PSIM software. FIGS. 5 and 6 show the FSBB main power inductor current (I) at 60V and 40V inputs, respectively L ) And voltage loop output V err And (5) simulating a waveform. As can be seen from the figure, when I L When Verr is reached, Q 3 Turn on Q 4 And (4) switching off, wherein the inductive current enters an AB section, and quasi-peak current control is realized. In the whole cycle I A And I B Are all greater than I zvs ,I C (I D ) Is less than-I zvs And soft switching of all switching tubes is realized.
FIGS. 7 and 8 show simulated waveforms of the inductor current for light load (10% full-load) and FSBB in full load, respectively, in which the inductor current enters a quasi-intermittent mode in the light load mode, the switching frequency is 1.23MHz at this time, and the switching frequency is 775KHz at this time under the fully loaded condition of 40V input, the switching frequency varies with the input voltage and the load, and the negative current is always kept to just satisfy the soft switching condition and the clamping period time is close to zero in the fully loaded state, thereby ensuring that the inductor current has a lower effective value and improving the converter efficiency.
Simulation proves that the quasi-peak current control method for the four-switch Buck-Boost can realize soft switching of all switching tubes in a full-load range and a full-input voltage range, and the inductive current has a lower effective value, so that the efficiency and the power density of the four-switch Buck-Boost converter are improved.
The quasi-peak current control method of the four-switch Buck-Boost is realized based on the EP4CE10F17C8N FPGA. Fig. 9 is an overall architecture diagram of the control system. FIG. 10 is a block diagram of the internal logic of the FPGA.
The quasi-peak current control method can realize the soft switching of all switching tubes in a full load range and a full input voltage range, a hardware comparator is adopted to generate a trigger signal in the realization process, and the trigger signal is processed by an FPGA, and the processing specifically comprises the following steps:
the method comprises the steps that an external signal conditioning circuit and an ADC conversion chip are used for sampling inductive current and output voltage, difference is made between a voltage sampling signal and a given signal to generate an error signal, the error signal is output through a voltage loop generated in a PI compensation link, threshold voltage is output to each path of comparator through the DAC conversion chip and is compared with the inductive current signal, the output signal of the comparator is input into an FPGA to serve as a control basis of each switching tube, the FPGA generates a logic circuit according to a program, and control over each switching tube is achieved.
The quasi-peak current control method for the bidirectional four-switch Buck-Boost provided by the invention is described in detail, a specific example is applied in the method to explain the principle and the implementation mode of the invention, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (7)

1. The quasi-peak current control method for the bidirectional four-switch Buck-Boost is characterized in that a switching cycle of an FSBB switching tube is divided into four stages according to the switching-on and switching-off states of the FSBB switching tube: an energy storage stage D-A, a direct connection stage A-B, an energy release stage B-C and a clamping stage C-D;
the time of node A is determined by the result of comparing the inductive current with the output Verr of the voltage regulator, and when the inductive current exceeds Verr, Q is 3 Conducting Q 4 Turning off the converter, and enabling the converter to enter a direct connection stage from the energy storage stage D-ASegment A-B; the time of the node B is determined by the output Verr of the voltage regulator and a proportionality coefficient k, and the time satisfies the following conditions:
T 1 +T 2 =Verr·k (1)
wherein T is 1 、T 2 Respectively the time of an energy storage stage and the time of a direct connection stage; verr is the output of the voltage regulator; k is a proportionality coefficient, T 1 +T 2 Is Q 1 On-time in one cycle, thereby by controlling Q 1 The conduction time of the point A and the point B realizes indirect control of the point B current, so that an expression of the point A and the point B inductive current can be obtained:
Figure FDA0003913940240000011
according to the formula (2), when k and V are in 、V o L is a timing, I A And I B The size of (A) is only related to Verr; due to I A And I B The peak current of the inductor is respectively in the boosting mode and the voltage reduction mode, so the control mode is called quasi-peak current control.
2. The method of claim 1, wherein under normal operation of the converter, ZVS condition is satisfied at all four switching moments A, B, C, D, and the C-D period is as short as possible to reduce loss and reactive power exchange, and under optimal operation, the C-D period is close to zero, when the converter operates in quasi-critical continuous mode.
3. The method according to claim 2, wherein the quasi-peak current control method can realize soft switching of all switching tubes in a full load range and a full input voltage range, and a hardware comparator is adopted to generate a trigger signal and is processed by an FPGA in the realization process, and the processing specifically comprises:
the method comprises the steps that an external signal conditioning circuit and an ADC conversion chip are used for sampling inductive current and output voltage, difference is made between a voltage sampling signal and a given signal to generate an error signal, the error signal is output through a voltage loop generated in a PI compensation link, threshold voltage is output to each path of comparator through the DAC conversion chip and is compared with the inductive current signal, the output signal of the comparator is input into an FPGA to serve as a control basis of each switching tube, the FPGA generates a logic circuit according to a program, and control over each switching tube is achieved.
4. The method of claim 3, wherein to fully realize zero voltage turn-on of each switch tube, the following requirements are satisfied:
Figure FDA0003913940240000021
wherein C is oss Is the output capacitance of the MOSFET, t dead For dead time, V in For input voltage, V out Is the output voltage.
5. The method of claim 4, wherein the current at point A is equal to Verr in both the step-up and step-down states, and I is satisfied for achieving soft switching at point A A ≥I zvs Then, the current at point a is rewritten as:
I A =max(Verr,I zvs )(4)。
6. the method of claim 5, wherein for B-point current, I is in buck mode B ≥I A Therefore, when the point A can realize soft switching, the point B can realize soft switching certainly; in boost mode, I B Possibly because of T 1 +T 2 Too long to be lower than I zvs So in the control logic, I L And I zvs Comparison, when I L =I zvs When it is time, Q is forcibly turned off 1 Turn on Q 3 To ensure Q 3 And realizing zero voltage switching-on.
7. The method of claim 6, wherein for points C and D, the ideal shape is definedIn this state, the circuit operates in the quasi-critical conduction mode, at which time T 4 The time is zero to minimize the reverse current of the inductor to improve converter efficiency, when point C and point D become the same point, i.e. Q 2 Turn off Q 1 Q while conducting 3 Off Q 4 Conducting; to realize Q 1 And Q 4 Zero voltage of (1) on, it is required to satisfy C(D) ≤-I zvs (ii) a In the control logic, I L And I zvs Comparison, when I L =-I zvs When the control operation is triggered, the control operation of the point C (D) is triggered.
CN202211332218.8A 2022-10-28 2022-10-28 Quasi-peak current control method for bidirectional four-switch Buck-Boost Pending CN115664169A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116667638A (en) * 2023-05-30 2023-08-29 南京理工大学 Linear-nonlinear peak current control strategy based on ZVS four-switch Buck-Boost circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116667638A (en) * 2023-05-30 2023-08-29 南京理工大学 Linear-nonlinear peak current control strategy based on ZVS four-switch Buck-Boost circuit

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