CN114334944A - 一种封装结构及制作方法 - Google Patents
一种封装结构及制作方法 Download PDFInfo
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- CN114334944A CN114334944A CN202111450285.5A CN202111450285A CN114334944A CN 114334944 A CN114334944 A CN 114334944A CN 202111450285 A CN202111450285 A CN 202111450285A CN 114334944 A CN114334944 A CN 114334944A
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Abstract
本发明提供一种封装结构及制作方法,封装结构包括:第一基板,所述第一基板包括空腔;第一芯片,所述第一芯片埋设于所述空腔中,所述第一芯片包括相背的第一连接表面和第一导热表面;第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接;其中,所述第一基板包括第三连接表面,所述第三连接表面和所述第一连接表面齐平。
Description
技术领域
本发明属于半导体封装技术领域,特别关于一种封装结构及制作方法。
背景技术
基于CoWoS(Chip-on-Wafer-on-Substrate,晶圆基底封装)的2.5D封装技术,是把芯片封装到硅载片(Silicon interposer)上,并使用硅载片上的高密度走线进行互联,进一步与封装载板连接。CoWoS主要针对高性能计算(High Performance Computing,HPC)市场,例如,具备HBM(High-Bandwidth Memory)记忆体的高阶产品。目前,上述硅载片还可以被具有RDL有机转接器(organic interposer with RDL)替代。
另外,基于EMIB(Embedded Multi-Die Interconnect Bridge)嵌入式多芯片互连桥先进封装技术,与硅中介层(Silicon interposer)的2.5D封装类似,通过在封装基板内埋入用来连接裸晶的硅桥(Silicon Bridge),进行局部高密度互连。EMIB技术可以针对独立显卡和高带宽内存芯片之间的封装。
上述先进封装技术应用于高带宽内存的有源器件封装时,1)转接器和硅桥的存在限制了I/O速度并导致更高的功耗;2)2.5D封装技术中TSV工艺造成成本高;RDL重布线受布线密度限制大;硅桥工艺组装工艺复杂;3)在有源器件上通过TSV进行3D封装,封装工艺成本高,且存在散热问题。
此外,芯片往往需要封装在封装基板上才能实现电信号传输,而封装基板和芯片之间的层叠位置关系往往会对芯片的散热产生影响,在确保封装基板和芯片有效连接的前提下,提高芯片的散热效率也是需要克服的问题。
发明内容
本发明的目的在于提供一种封装结构及制作方法,改善封装结构中各芯片的散热效率,提高各芯片和封装基板之间电性连接的可靠程度。
为解决上述问题,本发明技术方案提供了一种封装结构,所述封装结构包括:第一基板,所述第一基板包括空腔;第一芯片,所述第一芯片埋设于所述空腔中,所述第一芯片包括相背的第一连接表面和第一导热表面;第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接;其中,所述第一基板包括第三连接表面,所述第三连接表面和所述第一连接表面齐平。
作为可选的技术方案,所述第一基板包括积层板和堆叠于所述积层板上方的金属箔层压板,所述金属箔层压板包括半固化片和设置于所述半固化片一侧表面上的金属箔层,所述金属箔层的外侧表面设为所述第三连接表面。
作为可选的技术方案,所述半固化片包括树脂,层压所述半固化片以使所述树脂进入所述空腔并固定所述第一芯片。
作为可选的技术方案,所述第二芯片的尺寸大于所述第一芯片的尺寸,所述第二芯片靠近所述第一芯片的一侧包括第二连接表面,所述第二连接表面位于所述第一芯片外的部分表面上设有第一金属凸块;所述金属箔层上设置第二金属凸块;其中,所述第一金属凸块和所述第二金属凸块电性连接。
作为可选的技术方案,在所述第一基板的厚度方向上,所述空腔贯穿所述金属箔层压板和至少部分所述积层板。
本发明还提供一种封装结构的制作方法,所述制作方法包括:
提供具有空腔的第一基板;
提供第一芯片,放置所述第一芯片至所述空腔;
预压所述第一基板和所述第一芯片;
本压所述第一基板和所述第一芯片,所述第一芯片固定于所述空腔中;
键合第二芯片至所述第一芯片的第一连接表面上;以及
连接第一导热件至所述第一芯片的第一导热表面上,连接第二导热件至所述第二芯片的第二导热表面上;
其中,所述第一基板的第三连接表面和所述第一连接表面齐平。
作为可选的技术方案,所述第一基板包括积层板和堆叠于所述积层板上方的金属箔层压板,所述金属箔层压板包括半固化片和设置于所述半固化片一侧表面上的金属箔层,所述金属箔层的表面设为所述第三连接表面。
作为可选的技术方案,提供具有空腔的第一基板的步骤中还包括:提供载板;于所述载板的表面上交替制作导电层和绝缘层,构成所述积层板;于所述积层板上形成第一开孔;提供所述金属箔层压板,所述金属箔层压板具有第二开孔;以及堆叠所述金属箔层压板至所述积层板上,所述第一开孔和所述第二开孔连通;其中,所述第一开孔和所述第二开孔构成所述空腔。
作为可选的技术方案,提供具有空腔的第一基板的步骤中还包括:提供载板;于所述载板的表面上交替制作导电层和绝缘层,构成所述积层板;提供所述金属箔层压板,堆叠所述金属箔层压板至所述积层板上,构成所述第一基板;以及于所述第一基板上形成所述空腔。
作为可选的技术方案,所述制作方法还包括:图案化所述金属箔层形成若干焊盘结构;以及于所述若干焊盘结构上制作第二金属凸起或者锡球。
与现有技术相比,本发明提供一种封装结构及制作方法,封装结构包括预先埋入第一芯片的第一基板,第一芯片的第一连接表面和第一基板的第三连接表面齐平,构成平坦的表面,在平坦的表面上利用图案化工艺制作出大致相似的焊盘结构,再于焊盘结构上制作金属凸起或者锡球,当其作为整体与其他的芯片、封装体等电性连接时,电性连接稳定性能够改善,封装良率也会增加。另外,第一芯片埋设于第一基板中,第一芯片和第二芯片分别利用各自对应的第一导热件和第二导热件形成各自独立的导热通道进行散热,因此,封装结构整体的散热效率较高,且受封装基板的影响较小。
以下结合附图和具体实施例对本发明进行详细描述,但不作为对本发明的限定。
附图说明
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案,下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图是本发明的一些实施方式,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明第一实施例中提供的封装结构的剖面示意图。
图2为图1中封装结构的部分制作过程的剖面示意图。
图3为本发明第二实施例中提供的封装结构省略第一导热件、第二导热件和第二基板后的剖面示意图。
图4为本发明第三实施例中提供的封装结构省略第一导热件、第二导热件和第二基板后的剖面示意图。
图5为本发明第四实施例中提供的封装结构省略第一导热件、第二导热件和第二基板后的剖面示意图。
图6为本发明第四实施例中提供的封装结构省略第一导热件、第二导热件和第二基板后的剖面示意图。
图7为本发明提供的封装结构中制作积层板的制作过程的剖面意图。
图8为本发明提供的封装结构中重复堆叠积层板的制作过程的剖面示意图。
图9为本发明提供的一种在积层板上先堆叠金属箔层压板再制作空腔的制作过程的剖面示意图。
图10为在图9中制得的空腔中埋入第一芯片进行层压的剖面示意图。
图11为本发明提供的另一种在积层板上先制作开孔再和具有开孔的金属箔层压板堆叠形成空腔的制作过程的剖面示意图。
图12为在图11中制得的空腔中埋入第一芯片进行层压的剖面示意图。
图13为本发明提供的封装结构的制作方法的流程图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,下面结合实施例及附图,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅用以解释本发明,并不用于限定本发明。
在本发明的描述中,需要说明的是,术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
本发明的目的之一在于提供一种封装结构,封装结构中包括垂直互联的第一芯片和第二芯片,第一芯片的第一导热表面和第二芯片的第二导热表面相互背离;第一导热表面上设置第一导热件,第二导热表面上设置第二导热件;其中,还包括第一基板,第一基板具有空腔,第一芯片埋设于第一空腔中,且第一芯片具有和第一导热表面相背的第一连接表面,第一连接表面和第一基板的第三连接表面相互齐平。
较佳的,第二芯片面对第一芯片的一侧包括第二连接表面,第二连接表面的位于第一芯片外的部分表面和第一基板的第三连接表面电性连接,例如,第二连接表面的位于第一芯片外的部分表面上设置第一金属凸起;第三连接表面对应设置第二金属凸起,第一金属凸起和第二金属凸起通过锡金键合的方式电性连接。
本实施例中,第一芯片预先埋设于第一基板中,第一连接表面和第三连接表面相互齐平,构成平坦的表面,在平坦的表面上利用图案化工艺制作出大致相似的焊盘结构,再于焊盘结构上制作金属凸起或者锡球,当其作为整体与其他的芯片、封装体等电性连接时,电性连接稳定性能够改善,封装良率也会增加。
另外,第一芯片埋设于第一基板中,第一芯片和第二芯片分别利用各自对应的第一导热件和第二导热件形成各自独立的导热通道进行散热,因此,封装结构整体的散热效率较高,且受封装基板的影响较小。
如图1和图2所示,本发明第一实施例中提供一种封装结构1000,其包括:第一芯片1100和第二芯片1200,第二芯片1200设置于第一芯片1100的上方且和第一芯片1100电性连接;第一芯片1100包括远离第二芯片1200的第一导热表面1101,第二芯片1200包括远离第一芯片1100的第二导热表面1201;第一导热件1300和第二导热件1400,第一导热件1300和第一导热表面1101连接;第二导热件1400和第二导热表面1201连接;以及第一基板1500,第一基板1500包括空腔1530(参照图9);其中,第一芯片1100埋设于空腔1530中,第一基板1500的第三连接表面1501和第一芯片1100的第一连接表面1102齐平。
在一较佳的实施方式中,第一导热件1300例如为导热背板,导热背板和第一导热表面1101之间通过导热胶连接;第二导热件1400例如导热翅片,导热翅片和第二芯片1200的第二导热表面1201之间也通过导热胶连接。其中,导热背板和导热翅片优选为导热金属材料。
结合图1、图2、图7至图9可知,第一基板1500包括积层板1510和堆叠于积层板1510上方的金属箔层压板1520,金属箔层压板1520包括半固化片1521和设置于半固化片1521一侧表面上的金属箔层1522,金属箔层1522的外侧表面设为第三连接表面1501。金属箔层1522的外侧表面是指金属箔层1522露出的表面。
积层板1510是指包括交替层叠的导电层130和绝缘层140的多层结构。本实施例中,堆叠多层积层板1510,并于最上层的积层板1510上方继续堆叠金属箔层压板1520后形成第一基板1500。其中,第一基板1500中,多层堆叠的积层板1510中的每一导电层130通过绝缘层140上的过孔141进行电性连接。
金属箔层压板1520中,金属箔层1522例如是铜箔层。半固化片1521可以是双面覆盖铜箔层,也可以是单面覆盖铜箔层,其中,若为单面覆盖铜箔层,铜箔层必须是设置于半固化片1521的最外侧。
半固化片1521由树脂和增强材料组成,其中,树脂例如是选自酚酸树脂、环氧树脂、三聚氰胺甲醛树脂,聚酯树脂中的一种或者几种的组合;增强材料例如是选自玻璃纤维布、纸基、复合材料其中一种或者几种的组合。本发明提供的封装结构1000中为了便于树脂的渗出,半固化片1521优选为RCC(resin coated copper)板,但不以此为限,也可以采用CCL(Copper Clad Laminate)板。
参照图2、图8至图9可知,第一芯片1100埋入空腔1530中,通过预压工艺,使得半固化片1521中的部分树脂渗透至空腔1530和第一芯片1100之间的缝隙中;再利用本压工艺,固化半固化片1521和缝隙中的树脂,使得第一芯片1100被固定于空腔1530中。其中,预压工艺的层压温度较低,较低的层压温度促使树脂从半固化态转变为液态并从增强材料中渗出流入缝隙;本压工艺的层压温度较高,较高的层压温度可以促使树脂固化,实现第一芯片1100和第一基板1500的固定连接,以及,半固化片1521固化成型。另外,铜箔层1522位于半固化片1521的最外侧有助于在预压、本压工艺中获得平坦的表面。
如图1、图2、图8和图9所示,空腔1530例如是贯穿金属箔层压板1520和积层板1510的贯孔,其中,第一芯片1100的第一导热表面1101自贯孔的一侧露出,后续第一导热件1300直接连接于第一导热表面1101上形成供第一芯片1100散热的导热通道。
需要说明的是,在本发明其他实施方式中,空腔也可以是贯穿金属箔层压板和仅贯穿部分堆叠的积层板的盲孔,此时,第一芯片的第一导热表面和盲孔的底部连接,此时,第一导热件可以是设置在盲孔的底部的外侧,即,第一导热件直接连接于盲孔的底部,而间接连接于第一导热表面。其中,第一导热件和形成于盲孔的底部的导热金属(cooper coin)通过导热胶连接。
如图2和图9所示,本发明上述封装结构1000中,利用层压工艺,使得第一基板1500中最上层的金属箔层压板1520中的半固化片1521中的树脂渗透至空腔1530和第一芯片1100之间的缝隙中,实现第一芯片1100预先埋入第一基板1500的空腔1530中。此时,第一基板1500的第三连接表面1501和第一芯片1100的第一连接表面1102相互齐平。
继续参照图2,在埋入第一芯片1100的第一基板1500上,进行图案化制程和/或再布线制程,可以在第一基板1500的第三连接表面1501以及第一芯片1100的第一连接表面1102分别形成焊盘结构,并在对应的焊盘结构上制作第一金属凸起(或者锡球)1103、第三金属凸起(或者锡球)1502。
接着,键合第二芯片1200至第一芯片1100和第一基板1500上,第二芯片1200通过第二金属凸起(或者锡球)1203电性连接第一金属凸起(或者锡球)1103和第三金属凸起(或者锡球)1502。
本实施例中,第二芯片1200的尺寸大于第一芯片1100的尺寸,因此,第二芯片1200至少一侧突出于第一芯片1100的边缘,即,第二连接表面1202的至少部分区域和第一基板1500的部分第三连接表面1501相对,因此,第二芯片1200得以与第一基板1500电性连接。
由于第一金属凸起(或者锡球)1103、第三金属凸起(或者锡球)1502分别形成在相互齐平的第一连接表面1102和第三连接表面1501上,因此,第一金属凸起(或者锡球)1103和第三金属凸起(或者锡球)1502也分别具有相似高度的不存在明显的高度差,当第二芯片1200键合到第一基板1500和第一芯片1100上时,第二金属凸起(或者锡球)1203与第一金属凸起(或者锡球)1103和第三金属凸起(或者锡球)1502之间的接触更好,因此,电性连接更稳定,键合良率更高。
另外,封装结构1000中还包括转接器1700,转接器1700键合于第一芯片1100和第一基板1500上方。相似的,形成于相互的齐平的第一连接表面1102和第三连接表面1501上的第一金属凸起(或者锡球)1103和第三金属凸起(或者锡球)1502分别具有相似高度的不存在明显的高度差,当转接器1700键合到第一基板1500和第一芯片1100上时,转接器1700上的第四金属凸起(或者锡球)1701与第一金属凸起(或者锡球)1103和第三金属凸起(或者锡球)1502之间的接触更好,因此,电性连接更稳定,键合良率更高。
换言之,第一芯片1100埋入第一基板1500中,相互齐平的第一连接表面1102和第三连接表面1501,对后续需要同时与第一基板和第一芯片进行键合连接的其他芯片和/或封装体的键合良率的提升有明显益处。
本实施例中,转接器1700用于朝向第一芯片1100供电,以及读取第一芯片1100输出的部分电信号传递至第一基板1500,再通过第一基板1500输出。
继续参照图1和图2,封装结构1000中还包括第二基板1600,第二基板1600例如为PCB电路板,PCB电路板包括连接垫,连接垫与第一基板1500背侧的第五金属凸起(或者锡球)1503电性连接,使得第二基板1600和第一基板1500之间电性连接。
如图1和图2所示,第一导热件1300包括导热背板和自导热背板上伸出的延伸部;对应于延伸部,第二基板1600上开设有缺口1601,延伸部插入缺口1601中并与第一基板1500的空腔1530中露出的第一导热表面1101连接。
另外,导热背板位于第二基板1600的下方,导热背板与第二基板1600结合,还可将热量通过第二基板1600内的高导热系数的材料导出,即,第一导热件1300的部分热量还可以通过第二基板1600进行导出,进一步的提升散热效率。
本发明提供的上述封装结构1000中,垂直互联的第一芯片1100和第二芯片1200各自相背离的导热表面上均形成了导热通道,因此,可显著提高封装结构1000的散热效率。
如图3所示,本发明第二实施例中还提供一种封装结构2000,其与封装结构1000的区别在于,封装结构2000中不包括转接器。
另外,为了简化视图,图3中所示的封装结构2000省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
通过层压工艺,第一芯片2100预先埋入第一基板2500的空腔中,第一芯片2100的第一连接表面2102和第一基板2500的第三连接表面2501相互齐平。第一芯片2100的第一导热表面2101连接第一导热件;第二芯片2200的第二导热表面2201连接第二导热件。
键合第二芯片2200至埋入第一芯片2100的第一基板2500上方,其中,第二芯片2200的尺寸大于第一芯片2100的尺寸,第二芯片2200的单侧突出于第一芯片2100的边缘。第二芯片2200的部分第二连接表面2202面对第一基板2500的部分第三连接表面2501,第二连接表面2202上的第二金属凸起(或者锡球)2203和第三连接表面2501上的第三金属凸起(或者锡球)2502电性连接。第二金属凸起(或者锡球)2203和第三金属凸起(或者锡球)2502电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片2200电性连接于其下方的第一芯片2100和第一基板2500,例如,第一芯片2100为HBM,第二芯片2200为CPU。其中,可以通过CPU朝向HBM供电,也可以藉由在第一基板2500上再布线,通过再布线的第一基板2500向HBM供电。
如图4所示,本发明第三实施例中还提供一种封装结构3000,其与封装结构1000的区别在于,封装结构3000中不包括转接器,且,第二芯片3200的两侧分别突出于第一芯片3100的边缘,且与第一基板3500电性连接。
另外,为了简化视图,图4中所示的封装结构3000省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
通过层压工艺,第一芯片3100预先埋入第一基板3500的空腔中,第一芯片3100的第一连接表面3102和第一基板3500的第三连接表面3501相互齐平。第一芯片3100的第一导热表面3101连接第一导热件;第二芯片3200的第二导热表面3201连接第二导热件。
键合第二芯片3200至埋入第一芯片3100的第一基板3500上方,其中,第二芯片3200的尺寸大于第一芯片3100的尺寸,第二芯片3200的两侧均突出于第一芯片3100的边缘。第二芯片3200的部分第二连接表面3202面对第一基板3500的部分第三连接表面3501,第二连接表面3202上的第二金属凸起(或者锡球)3203和第三连接表面3501上的第三金属凸起(或者锡球)3502电性连接。第二金属凸起(或者锡球)3203和第三金属凸起(或者锡球)3502电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片3200电性连接于其下方的第一芯片3100和第一基板3500,例如,第一芯片3100为HBM,第二芯片3200为CPU。
如图5所示,本发明第四实施例中还提供一种封装结构4000,其与封装结构1000的区别在于,1)封装结构4000中不包括转接器;2)第二芯片4200包括再布线层4001和塑封层4002;再布线层4001的两侧分别突出于第一芯片4100的边缘,且与第一基板4500电性连接。
另外,为了简化视图,图5中所示的封装结构4000省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
本实施例中,第二芯片4200包括围绕其的塑封层4002,第二芯片4200的有源层自塑封层4002中露出并与塑封层4002大致齐平,再布线层4001形成塑封层4002的一侧且与有源层电性连接,重构为第二芯片组件。
通过层压工艺,第一芯片4100预先埋入第一基板4500的空腔中,第一芯片4100的第一连接表面4102和第一基板4500的第三连接表面4501相互齐平。
键合包括塑封层4002和再布线层4001的第二芯片4200至埋入第一芯片4100的第一基板4500上方,其中,再布线层4001两侧均突出于第一芯片2100的边缘。再布线层4001面对第一基板4500的部分表面上设置有第二金属凸起(或者锡球)4203,第二金属凸起(或者锡球)4203和第三连接表面4501上的第三金属凸起(或者锡球)4502电性连接。第二金属凸起(或者锡球)4203和第三金属凸起(或者锡球)4502电性连接的方式包括但不限于锡金键合。
本实施例中,第二芯片4200通过重布线层4001电性连接于其下方的第一芯片4100和第一基板4500,例如,第一芯片4100为HBM,第二芯片4200为CPU。
另外,塑封层4002中可填充高导热系数的材料,以使塑封层4002作为第二芯片4200的第二导热表面4201上的第二导热件使用。另外,第一芯片4100的第一导热表面4101连接第一导热件。
如图6所示,本发明第四实施例中还提供一种封装结构5000,其与封装结构1000的区别在于,1)封装结构5000中不包括转接器;2)位于第二芯片5200的第二导热表面5201上的连接结构5001与第一基板5500连接。
另外,为了简化视图,图6中所示的封装结构5000省略了第一导热件、第二导热件以及第二基板的绘示,省略的第一导热件、第二导热件以及第二基板可参照图1,不另赘述。
通过层压工艺,第一芯片5100预先埋入第一基板5500的空腔中,第一芯片5100的第一连接表面5102和第一基板5500的第三连接表面5501相互齐平。第一芯片5100的第一导热表面5101连接第一导热件。
键合第二芯片5200至埋入第一芯片5100的第一基板5500上方,其中,第二芯片5200的尺寸大于第一芯片5100的尺寸,第二芯片5200的两侧均突出于第一芯片5100的边缘。第二芯片5200的部分第二连接表面5202面对第一基板5500的部分第三连接表面5501,第二连接表面5202上的第二金属凸起(或者锡球)5203和第三连接表面5501上的第三金属凸起(或者锡球)5502电性连接。第二金属凸起(或者锡球)5203和第三金属凸起(或者锡球)5502电性连接的方式包括但不限于锡金键合。
第二导热表面5201上设置整体式散热结构5001(Intergrated Heat Spreader,IHS),其剖面为倒U型,整体式散热结构5001和第二芯片5200的第二导热表面5201之间通过导热材料连接。
如图13所示,本发明的目的之二在于提供一种封装结构的制作方法200,其包括:
提供具有空腔的第一基板;
提供第一芯片,放置第一芯片至空腔;
预压第一基板和第一芯片;
本压第一基板和第一芯片,第一芯片固定于空腔中;
键合第二芯片至第一芯片的第一连接表面上;以及
连接第一导热件至第一芯片的第一导热表面上和连接第二导热件至第二芯片的第二导热表面上;
其中,第一基板的第三连接表面和所述第一芯片的第一连接表面齐平。
在一较佳的实施方式中,第一基板包括积层板和堆叠于积层板上方的金属箔层压板,金属箔层压板包括半固化片和设置于半固化片一侧表面上的金属箔层,金属箔层的表面设为第三连接表面。
在一较佳的实施方式中,提供具有空腔的第一基板的步骤中还包括:提供载板;于载板的表面上交替制作导电层和绝缘层,构成积层板;于积层板上形成第一开孔;提供金属箔层压板,金属箔层压板具有第二开孔;以及堆叠金属箔层压板至积层板上,第一开孔和第二开孔连通;其中,第一开孔和第二开孔构成空腔。
在一较佳的实施方式中,提供具有空腔的第一基板的步骤中还包括:提供载板;于载板的表面上交替制作导电层和绝缘层,构成积层板;提供金属箔层压板,堆叠金属箔层压板至积层板上,构成第一基板;以及于第一基板上形成所述空腔。
在一较佳的实施方式中,还包括:图案化金属箔层形成若干焊盘结构;以及于若干焊盘结构上制作第二金属凸起或者锡球。
结合图1、图2、图7和图9,以封装结构1000为例详细说明上述制作方法200中的制作过程。
如图7所示,提供载板100,于载板100的一侧表面上形成导电层110;于导电层110上形成光刻胶层120;图案化光刻胶层120,形成曝光区121;移除曝光区121的光刻胶获得开口122;蒸镀加厚导电层130至开口122中;移除光刻胶层120;图案化导电层110获得导电图案111和加厚导电层130相互层叠;形成绝缘层140覆盖导电图案111和加厚导电层130。
其中,绝缘层140和加厚导电层130构成积层板1510。
如图8所示,重复制作导电层130和绝缘层140形成多层相互堆叠的积层板1510,其中,绝缘层140具有过孔141,多层相互堆叠的积层板1510中的导电层130分别利用过孔141实现电性连接。过孔141例如是通过蚀刻图案化工艺制作。
本实施例中,形成绝缘层140的方式例如是涂布介电材料,固化介电材料后形成,但不以此为限。在本发明其他实施方式中,绝缘层可以采用半固化片,将半固化片直接贴附固定在导电层上。
如图9所示,提供金属箔层压板1520,堆叠金属箔层压板1520至多层积层板1510上方构成第一基板1500,其中,金属箔层压板1520的金属箔层1522位于第一基板1500的最外侧。
通过蚀刻或者切割等方式,在第一基板1500未设置导电层130的区域制作空腔1530。
本实施例中,空腔1530贯穿金属箔层压板1520和多层积层板1510的贯孔。
如图10所示,放置第一芯片1100至空腔1530中,预压,半固化片1521中的树脂朝向第一芯片1100和空腔1530之间的缝隙处渗出;本压,固化半固化片1521和渗出的树脂,第三连接表面1503和第一连接表面1102相互齐平。
如图11所示,本发明还提供一种在第一基板1500’上制作空腔1530’的方式。
首先,载板100上完成多层积层板1510堆叠后,通过切割、蚀刻等方式在多层积层板1510未设置导电层130的区域形成第一开孔1511;接着,提供具有预制的第二开孔1523的金属箔层压板1520’,第二开孔1523自上而下贯穿金属箔层1522’和半固化片1521’;堆叠金属箔层压板1520’至多层积层板1510上方构成第一基板1500’,其中,第一开孔1511和第二开孔1523相互对齐且贯通构成空腔1530’。
本实施例中,第一开孔1511贯穿堆叠的多层积层板1510。需知的是,在本发明其他实施例中,第一开孔也可以是贯穿多层积层板中部分积层板。
如图11和图12所示,放置第一芯片1100至空腔1530’中,预压,半固化片1521’中的树脂朝向第一芯片1100和空腔1530’之间的缝隙处渗出;本压,固化半固化片1521’和渗出的树脂,金属箔层1522’的第三连接表面1501’和第一连接表面1102相互齐平。
继续参照图11和图2,层压制程完成后,可在金属箔层1522上进行图案化制程形成若干焊盘,并在焊盘上制作第三金属凸起1502(例如:带锡帽的金属块)或者锡球;以及在第一芯片1100上通过再布线等制作第一金属凸起1103(例如:带锡帽的金属块)或者锡球等。
另外,第一芯片1100埋入第一基板1500的空腔1530之后,可利用解键合工艺,移除载板100。
可以理解的是,在本发明其他实施例中,图7中图12中,可以同时在载板的两侧分别制作第一基板,并将第一芯片买入至第一基板的空腔中,分离载板后,可获得两个相同的埋入第一芯片的第一基板。
以埋入第一芯片1100的第一基板1500作为封装基板;于封装基板上方键合第二芯片1200、可选的转接器1700至第一芯片1100和第一基板1500上方,其中,第二芯片1200和可选的转接器1700均同时电性连接第一芯片1100和第一基板1500。
另外,还包括:键合第二基板1600至第一基板1500一侧,第二基板1600上缺口1601和空腔1530对齐,第一导热表面1101暴露于缺口1601中;将第一导热件1300的延伸部插入缺口1601中并与第一导热表面1101连接;以及,在第二芯片1200的第二导热表面1201上连接第二导热件1400。
本发明提供一种封装结构及制作方法,封装结构包括预先埋入第一芯片的第一基板,第一芯片的第一连接表面和第一基板的第三连接表面齐平,构成平坦的表面,在平坦的表面上利用图案化工艺制作出大致相似的焊盘结构,再于焊盘结构上制作金属凸起或者锡球,当其作为整体与其他的芯片、封装体等电性连接时,电性连接稳定性能够改善,封装良率也会增加。另外,第一芯片埋设于第一基板中,第一芯片和第二芯片分别利用各自对应的第一导热件和第二导热件形成各自独立的导热通道进行散热,因此,封装结构整体的散热效率较高,且受封装基板的影响较小。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。此外,上面所描述的本发明不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。必需指出的是,本发明还可有其他多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。
Claims (10)
1.一种封装结构,其特征在于,所述封装结构包括:
第一基板,所述第一基板包括空腔;
第一芯片,所述第一芯片埋设于所述空腔中,所述第一芯片包括相背的第一连接表面和第一导热表面;
第二芯片,所述第二芯片设置于所述第一连接表面的一侧,且与所述第一芯片电性连接,所述第二芯片远离所述第一芯片的一侧包括第二导热表面;以及
第一导热件和第二导热件,所述第一导热件和所述第一导热表面连接,所述第二导热件和所述第二导热表面连接;
其中,所述第一基板包括第三连接表面,所述第三连接表面和所述第一连接表面齐平。
2.根据权利要求1所述的封装结构,其特征在于,所述第一基板包括积层板和堆叠于所述积层板上方的金属箔层压板,所述金属箔层压板包括半固化片和设置于所述半固化片一侧表面上的金属箔层,所述金属箔层的外侧表面设为所述第三连接表面。
3.根据权利要求2所述的封装结构,其特征在于,所述半固化片包括树脂,层压所述半固化片以使所述树脂进入所述空腔并固定所述第一芯片。
4.根据权利要求2所述的封装结构,其特征在于,所述第二芯片的尺寸大于所述第一芯片的尺寸,所述第二芯片靠近所述第一芯片的一侧包括第二连接表面,所述第二连接表面位于所述第一芯片外的部分表面上设有第一金属凸块;所述金属箔层上设置第二金属凸块;其中,所述第一金属凸块和所述第二金属凸块电性连接。
5.根据权利要求2所述的封装结构,其特征在于,在所述第一基板的厚度方向上,所述空腔贯穿所述金属箔层压板和至少部分所述积层板。
6.一种封装结构的制作方法,其特征在于,所述制作方法包括:
提供具有空腔的第一基板;
提供第一芯片,放置所述第一芯片至所述空腔;
预压所述第一基板和所述第一芯片;
本压所述第一基板和所述第一芯片,所述第一芯片固定于所述空腔中;
键合第二芯片至所述第一芯片的第一连接表面上;以及
连接第一导热件至所述第一芯片的第一导热表面上,连接第二导热件至所述第二芯片的第二导热表面上;
其中,所述第一基板的第三连接表面和所述第一连接表面齐平。
7.根据权利要求6所述的制作方法,其特征在于,所述第一基板包括积层板和堆叠于所述积层板上方的金属箔层压板,所述金属箔层压板包括半固化片和设置于所述半固化片一侧表面上的金属箔层,所述金属箔层的表面设为所述第三连接表面。
8.根据权利要求7所述的制作方法,其特征在于,提供具有空腔的第一基板的步骤中还包括:
提供载板;
于所述载板的表面上交替制作导电层和绝缘层,构成所述积层板;
于所述积层板上形成第一开孔;
提供所述金属箔层压板,所述金属箔层压板具有第二开孔;以及
堆叠所述金属箔层压板至所述积层板上,所述第一开孔和所述第二开孔连通;
其中,所述第一开孔和所述第二开孔构成所述空腔。
9.根据权利要求7所述的制作方法,其特征在于,提供具有空腔的第一基板的步骤中还包括:
提供载板;
于所述载板的表面上交替制作导电层和绝缘层,构成所述积层板;
提供所述金属箔层压板,堆叠所述金属箔层压板至所述积层板上,构成所述第一基板;以及
于所述第一基板上形成所述空腔。
10.根据权利要求7所述的制作方法,其特征在于,所述制作方法还包括:
图案化所述金属箔层形成若干焊盘结构;以及
于所述若干焊盘结构上制作第二金属凸起或者锡球。
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