CN114333729B - Liquid crystal display module, display control circuit and method thereof, and liquid crystal display device - Google Patents
Liquid crystal display module, display control circuit and method thereof, and liquid crystal display device Download PDFInfo
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Abstract
The embodiment of the invention discloses a liquid crystal display module, a display control circuit and a method thereof, and a liquid crystal display device, wherein the display control circuit comprises a time sequence control module, a boosting module, a grid driving module and a source driving module, and the time sequence control module is respectively and electrically connected with the grid driving module and the source driving module; the time sequence control module comprises a data comparison unit and a scanning enabling control unit; the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, and the output end of the scanning enabling control unit is electrically connected with the grid driving module; the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, and the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit. The display control circuit provided by the embodiment of the invention can achieve the purpose of reducing the power consumption of the liquid crystal display module.
Description
Technical Field
The embodiment of the invention relates to a liquid crystal display technology, in particular to a liquid crystal display module, a display control circuit and method thereof and a liquid crystal display device.
Background
A TFT-LCD (Thin Film Transistor Liquid Crystal Display) is one of the major varieties of flat panel displays currently, and is widely used in large-sized Display panels of mobile terminals such as mobile phones and flat panel televisions.
The main driving principle of the TFT-LCD is as follows: the system main Board transmits an R/G/B signal, a control signal and power to a Printed Circuit Board (PCB) through wires, data are processed by a Timing Controller (TCON) on the PCB and then transmitted to a gate driving Circuit and a source driving Circuit through the PCB, so that the gate driving Circuit outputs a gate driving signal to each gate line in sequence, the TFTs are opened line by line, and then the source driving Circuit charges pixels of a whole line to respective required voltage to display different gray scales.
In the existing liquid crystal display device, in the using process, the displayed pictures are not all dynamically changed, and partial static pictures exist, and no matter whether the static pictures exist, in the prior art, each row of TFTs are opened line by line through a gate driving circuit, so that a source driving circuit charges and discharges the TFTs line by line, and when the static pictures exist, unnecessary power consumption waste is caused by the control mode, and the development trend of low power consumption in the market is not met.
Disclosure of Invention
The embodiment of the invention provides a liquid crystal display module, a display control circuit and method thereof and a liquid crystal display device, which are used for reducing the power consumption of the liquid crystal display module.
In a first aspect, an embodiment of the present invention provides a display control circuit of a liquid crystal display module, including a timing control module, a gate driving module and a source driving module, where the timing control module is electrically connected to the gate driving module and the source driving module respectively;
the time sequence control module comprises a data comparison unit and a scanning enabling control unit; the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, and the output end of the scanning enabling control unit is electrically connected with the grid driving module;
the display control circuit further comprises a boosting module, the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, and the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit;
the data comparison unit is used for sequentially comparing whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row are the same, controlling a scanning enabling control unit to output a scanning non-enabling signal; if the ith row of display data is different, controlling a scanning enabling control unit to output a scanning enabling signal;
the boost module is used for outputting a first power supply signal of a first power supply signal end under the control of the scanning non-enable signal; or, the first power signal is used for boosting the first power signal of the first power signal end to the conducting voltage of the pixel switch under the control of the scanning enabling signal;
the grid driving module is used for controlling the pixel switches of the corresponding rows to be closed in a frame to be displayed under the control of the scanning non-enable signal; or, the scanning circuit is used for controlling the conducting voltage to be output to the pixel switch of the corresponding row under the control of the scanning enabling signal, so that the pixel switch is opened in the frame to be displayed;
wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers.
Optionally, the boost module includes an inductor, a diode, a first resistor, a second resistor, a comparator, a reference voltage generating unit, a switch control unit, a clock generating unit, and a field effect transistor;
the first end of the inductor is electrically connected with the input end of the boosting module, the second end of the inductor is electrically connected with the anode of the diode and the first pole of the field effect transistor respectively, the second pole of the field effect transistor is grounded, and the cathode of the diode is electrically connected with the output end of the boosting module; the first end of the first resistor is electrically connected with the output end of the boosting module, the second end of the first resistor is electrically connected with the first end of the second resistor, and the second end of the second resistor is grounded; the negative input end of the comparator is electrically connected with the first end of the second resistor, the positive input end of the comparator is electrically connected with the reference voltage generating unit, and the output end of the comparator is electrically connected with the switch control unit; the switch control unit is also electrically connected with the control end of the boosting module, the clock generation unit and the grid electrode of the field effect transistor respectively;
the switch control unit is used for controlling the on-off state of the field effect transistor according to the control signal of the control end of the boosting module, the output signal of the output end of the comparator and the clock signal of the clock generation unit so as to control the output signal of the boosting module.
Optionally, the boost module further includes a first capacitor, a third resistor, a second capacitor, a third capacitor, and a fourth capacitor;
a first polar plate of the first capacitor is electrically connected with the first end of the inductor, and a second polar plate of the first capacitor is grounded; the first end of the third resistor is electrically connected with the anode of the diode, the second end of the third resistor is electrically connected with the first polar plate of the second capacitor, and the second polar plate of the second capacitor is grounded; the first polar plate of the third capacitor and the first polar plate of the fourth capacitor are both electrically connected with the cathode of the diode, and the second polar plate of the third capacitor and the second polar plate of the fourth capacitor are both grounded.
Optionally, the timing control module further includes a data receiving unit, a data buffering unit, and a data output unit;
the data receiving unit is electrically connected with the data comparison unit and is used for sequentially receiving the display data of each display frame and sequentially sending the display data of each display frame to the data comparison unit;
the data buffer unit is electrically connected between the data comparison unit and the data output unit and is used for receiving and storing the display data of each display frame sent by the data comparison unit and sequentially outputting the display data of each display frame to the data output unit;
the data output unit is electrically connected with the source electrode driving module and used for sending display data of a frame to be displayed to the source electrode driving module so as to write the display data corresponding to the pixel row with the pixel switch in an open state into the pixel row.
Optionally, the timing control module further includes a timing output unit electrically connected to the gate driving module, and the timing output unit is configured to provide a scanning driving timing for the gate driving module.
Optionally, the display control circuit further includes a backlight driving module, and the timing control module further includes a backlight control unit electrically connected to the backlight driving module.
In a second aspect, an embodiment of the present invention further provides a display control method for a liquid crystal display module, which is implemented by using the display control circuit provided in the first aspect, and the display control method includes:
the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row are the same, controlling a scanning enabling control unit to output a scanning non-enabling signal; if the ith row of display data is different, controlling a scanning enabling control unit to output a scanning enabling signal;
the boost module outputs a first power supply signal of a first power supply signal end under the control of a scanning non-enable signal; or the boosting module boosts the first power signal of the first power signal end to the conducting voltage of the pixel switch under the control of the scanning enabling signal;
the grid driving module controls the pixel switches of the corresponding row to be closed in a frame to be displayed under the control of the scanning non-enable signal; or the gate driving module controls the conduction voltage to be output to the pixel switches of the corresponding row under the control of the scanning enabling signal so as to open the pixel switches in the frame to be displayed;
wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers.
Optionally, the timing control module further includes a data receiving unit, a data buffering unit, and a data output unit; the data receiving unit is electrically connected with the data comparison unit, the data buffer unit is electrically connected between the data comparison unit and the data output unit, and the data output unit is electrically connected with the source electrode driving module;
before the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame, the display control method further includes:
the data receiving unit sequentially receives the display data of each display frame and sequentially sends the display data of each display frame to the data comparison unit;
after the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame, the display control method further comprises the following steps:
the data buffer unit receives and stores the display data of each display frame sent by the data comparison unit, and sequentially outputs the display data of each display frame to the data output unit;
the data output unit sends the display data of the frame to be displayed to the source electrode driving module so as to enable the display data corresponding to the pixel row with the pixel switch in the open state to be written into the pixel row.
In a third aspect, an embodiment of the present invention further provides a liquid crystal display module, including a liquid crystal display panel and the display control circuit provided in the first aspect;
the liquid crystal display panel comprises pixel switches arranged in an array along the row direction and the column direction, the control ends of the pixel switches positioned on the same row are electrically connected with the gate driving module through the same gate line, and the first ends of the pixel switches positioned on the same column are electrically connected with the source driving module through the same data line.
In a fourth aspect, an embodiment of the present invention further provides a liquid crystal display device, including the liquid crystal display module provided in the third aspect.
The embodiment of the invention has the advantages that the time sequence control module comprises a data comparison unit, the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit by arranging the boosting module, the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, the data comparison unit can control the output signal of the scanning enabling control unit according to the comparison result of the display data of a frame to be displayed and a previous display frame, and further the working states of the boosting module and the grid driving module are controlled by the output signal of the scanning enabling control unit; for the pixel rows with unchanged display data, the boosting module can not boost under the control of the scanning non-enabling signal, and the gate driving module can control the pixel switches to be turned off under the control of the scanning non-enabling control signal and does not scan the pixel rows, so that the source driving module can only write (charge) the display data into the pixel rows in the scanning state, and the pixel rows which are not scanned are not charged, and the boosting module does not need to provide the conducting voltage of the pixel switches to the gate driving module all the time, thereby reducing the power consumption.
Drawings
Fig. 1 is a schematic structural diagram of a display control circuit according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a comparison of display data provided by an embodiment of the present invention;
FIG. 3 is a driving timing diagram of a display control circuit according to the first embodiment of the present invention corresponding to FIG. 2;
FIG. 4 is a schematic diagram of a specific structure of the boost module of FIG. 1;
fig. 5 is a schematic flowchart of a display control method according to a second embodiment of the present invention;
fig. 6 is a schematic flowchart of a display control method according to a third embodiment of the present invention;
fig. 7 is a flowchart illustrating a display control method according to a fourth embodiment of the present invention;
fig. 8 is a schematic structural diagram of a liquid crystal display module according to a fifth embodiment of the present invention;
fig. 9 is a schematic structural diagram of a liquid crystal display device according to a sixth embodiment of the present invention.
Reference numerals:
1-a display control circuit; 11-a timing control module; 111-a data receiving unit; 112-a data comparison unit; 113-a scan enable control unit; 114-a data output unit; 115-a timing output unit; 116-a data buffer unit; 117-backlight control unit; 118-a communication unit; 12-a source drive module; 13-a gate drive module; 14-a boost module; 141-a comparator; 142-a reference voltage generating unit; 143-a switch control unit; 144-a clock generation unit; 145-field effect transistor; 146-a switch unit; 15-backlight driving module; 16-a storage module;
2-a liquid crystal display panel; 21-pixel switches; 22-a gate line; 23-a data line;
3-a backlight module;
10-a liquid crystal display module;
100-liquid crystal display device.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
The embodiment of the invention provides a display control circuit of a liquid crystal display module, which comprises a time sequence control module, a grid driving module and a source driving module, wherein the time sequence control module is respectively and electrically connected with the grid driving module and the source driving module; the time sequence control module comprises a data comparison unit and a scanning enabling control unit; the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, and the output end of the scanning enabling control unit is electrically connected with the grid driving module; the display control circuit further comprises a boosting module, the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, and the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit; the data comparison unit is used for sequentially comparing whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row are the same, controlling a scanning enabling control unit to output a scanning non-enabling signal; if the ith row of display data is different, controlling a scanning enabling control unit to output a scanning enabling signal; the boost module is used for outputting a first power supply signal of a first power supply signal end under the control of the scanning non-enable signal; or, the first power signal is used for boosting the first power signal of the first power signal end to the conducting voltage of the pixel switch under the control of the scanning enabling signal; the grid driving module is used for controlling the pixel switches of the corresponding rows to be closed in a frame to be displayed under the control of the scanning non-enable signal; or, the scanning circuit is used for controlling the conduction voltage to be output to the pixel switches of the corresponding row under the control of the scanning enabling signal, so that the pixel switches are opened in the frame to be displayed; wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers.
By adopting the technical scheme, the data comparison unit can control the output signal of the scanning enabling control unit according to the comparison result of the display data of the frame to be displayed and the previous display frame, and further can control the working states of the boosting module and the grid driving module through the scanning enabling control unit; for the pixel rows with unchanged display data, the boosting module can not boost under the control of the scanning non-enabling signal, and meanwhile, the grid driving module can control the pixel switches to be closed under the control of the scanning non-enabling signal and does not scan the pixel rows, so that the source driving module can only write (charge) the display data into the pixel rows in a scanning state, and does not charge the pixel rows which are not scanned, and the boosting module does not need to provide the conducting voltage of the pixel switches to the grid driving module all the time, thereby reducing the power consumption.
The above is the core idea of the present application, and based on the embodiments in the present application, a person skilled in the art can obtain all other embodiments without making creative efforts, which belong to the protection scope of the present application. The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
Example one
Fig. 1 is a schematic structural diagram of a display control circuit according to a first embodiment of the present invention, and as shown in fig. 1, the display control circuit 1 of a liquid crystal display module according to the first embodiment of the present invention includes a timing control module (TCON) 11, a Gate drive module (Gate IC) 13, a Source drive module (Source IC) 12, and a boost module 14, where the timing control module 11 is electrically connected to the Gate drive module 13 and the Source drive module 12, respectively; the timing control module 11 includes a data comparing unit 112 and a scan enable control unit 113; the output end of the data comparison unit 112 is electrically connected to the control end of the scan enable control unit 113, the output end of the scan enable control unit 113 is electrically connected to the gate driving module 13, the input end in of the voltage boosting module 14 is electrically connected to the first power signal terminal Vin, the output end out of the voltage boosting module 14 is electrically connected to the gate driving module 13, and the control end EN of the voltage boosting module 14 is electrically connected to the output end of the scan enable control unit 113. The arrows in the figure indicate the direction of signal transmission.
Specifically, when the display is in operation, for example, when a segment of video is displayed (the video is formed by continuously displaying multiple frames, and one frame corresponds to one frame of display data), the data comparing unit 112 may sequentially receive the display data of each display frame, and more specifically, the display data of one display frame includes n rows of display data, where n represents the number of pixels (the number of rows of pixels) in the liquid crystal display module along the column direction, in other words, how many rows of pixels the liquid crystal display module includes, and how many rows of display data the one display frame includes.
It should be noted that the display data may be provided by the system motherboard, and include image information to be displayed, and the display data may be subjected to format conversion in the timing control module 11.
Further, the data comparing unit 112 is configured to, after receiving the display data, sequentially compare whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row is the same, controlling the scan enable control unit 113 to output a scan disable signal; if the ith row of display data is different, controlling the scan enable control unit 113 to output a scan enable signal; wherein i is more than or equal to 1 and less than or equal to n, i and n are integers, and the pixel row refers to a row of pixels.
The scan enable control unit 113 is configured to output an enable control signal (generally referred to as an OE signal) for scanning on/off of a pixel row to the gate driving module 13 to control whether the gate driving module 13 outputs a gate driving signal to the pixel row, and when the scan enable control unit 113 outputs a scan enable signal, the gate driving module 13 outputs a gate driving signal to a corresponding gate line 22 to scan the pixel row. In addition, as shown in fig. 1, the timing control module 11 further includes a timing output unit 115, the timing output unit 115 is electrically connected to the gate driving module 13, and the timing output unit 115 is configured to provide a scanning driving timing for the gate driving module 13, that is, a clock signal (commonly referred to as a CPV signal in the art) for controlling the pixel rows to be sequentially turned on. Generally, when the full-screen frame is refreshed, the timing output unit 115 and the scan enable control unit 113 can control the gate driving module 13 to sequentially output gate driving signals to the gate lines corresponding to the pixels in each row, so as to control the pixel switches (i.e., TFTs) in each row to be sequentially turned on, so that the pixels in each row are sequentially scanned, and the display data corresponding to the pixels in each row is written into the corresponding pixels to charge the corresponding pixels. The gate driving signal refers to a signal for driving the pixel switch to be turned on, and is usually provided by a power module in the prior art. Specifically, the power module may provide two power signals, namely VGH and VGL (VGH and VGL are standard amplitude voltages of gate driving), to the gate driving module, taking the pixel switch TFT as an NMOS, the gate driving module 13 may drive the row of pixel switches to be turned on by outputting VGH to the gates of the pixel switches in a row of pixels, so as to scan the row of pixels, and the gate driving module may close the row of pixel switches by outputting VGL to the gates of the pixel switches in a row of pixels, so as not to scan the row of pixels.
In this embodiment, the scan enable control unit 113 is electrically connected to the data comparison unit 112, so that the data comparison unit 112 controls the output signal of the scan enable control unit 113 according to the comparison result of the display data of the corresponding pixel row in the frame to be displayed and the previous display frame, and further controls the output signal of the gate driving module 13. Specifically, for the pixel rows (forming a still image) with the same display data, the scan enable control unit 113 is controlled to output a scan disable signal, so that the gate driving module 13 controls the pixel rows to be in a non-scanning state in the frame to be displayed, that is, the TFTs are turned off, and thus, the display data of the pixel rows are not repeatedly updated and the display image is kept still; for the pixel rows with different display data (forming a dynamic picture), the scan enable control unit 113 is controlled to output a scan enable signal, so that the gate driving module 13 controls the portion of the pixel rows to be in a scan state in the frame to be displayed, i.e. the TFTs are turned on, so that when the portion of the pixel rows are scanned, the display data is written to the corresponding pixels through the source driving module 12, and the display picture is refreshed. According to the technical scheme of the embodiment of the invention, the scanning state of each pixel row can be controlled according to the actual situation of the display picture, and when the display data corresponding to the pixel rows do not change, the pixel rows are not scanned, so that unnecessary power consumption can be avoided.
Further, the present embodiment may provide the gate driving module 13 with a VGH signal for driving the pixel switch TFT to be turned on through the boosting module 14. Specifically, in this embodiment, the control terminal EN of the boost module 14 is electrically connected to the output terminal of the scan enable control unit 113, the input terminal in of the boost module 14 is electrically connected to the first power signal terminal Vin, and the output terminal out of the boost module 14 is electrically connected to the gate driving module 13, so that the operating state of the boost module 14 is controlled by the output signal of the scan enable control unit 113, and the boost module 14 can provide a VGH signal for the gate driving module 13 when necessary.
Specifically, when the scan enable control unit 113 outputs the scan enable signal, the voltage boost module 14 may boost the first power signal (Vin is lower than the VGH voltage) at the first power signal terminal Vin to the conducting voltage (such as VGH) of the pixel switch under the control of the scan enable signal, so that the gate driving module 13 may output the conducting voltage to the pixel switches of the corresponding row under the control of the scan enable signal, so as to open the pixel switches in the frame to be displayed, so that the portion of the pixel rows may be in the scan state in the frame to be displayed, and update the dynamic picture is implemented; when the scan enable control unit 113 outputs the scan disable signal, the voltage boost module 14 may output the first power signal at the first power signal terminal Vin under the control of the scan disable signal, that is, the first power signal is not boosted, the output voltage of the voltage boost module is lower, at this time, the gate driving module 13 controls the pixel switches of the corresponding row to be turned off under the control of the scan disable signal, so that the portion of the pixel rows is in the non-scan state in the frame to be displayed, and the frame is kept still. Therefore, in the embodiment of the present invention, the scan enable control unit 113 can control the voltage boost module 14 to provide the VGH signal to the gate driving module 13 only when the pixel row corresponding to the dynamic picture is scanned, and for the pixel row corresponding to the static picture, the VGH signal is not required to be provided, so that the power consumption can be further reduced, and unnecessary power consumption waste is avoided.
It can be understood that the comparison of the display data starts from the second display frame, when the frame to be displayed is the second display frame, the display data of the second display frame is compared with the display data of the first display frame, and the output signal of the scan enable control unit 113 is controlled according to the comparison result, when the frame to be displayed is the third display frame, the display data of the third display frame is compared with the display data of the second display frame, and so on; for the first display frame displayed initially, the display data does not need to be compared, or the comparison result indicates that the display data of each row changes, and the gate driving module 13 needs to be controlled to scan the pixels of each row line by line.
For example, fig. 2 is a schematic diagram illustrating comparison of display Data according to an embodiment of the present invention, in fig. 2, "N Frame 1 Line Data" represents display Data corresponding to the 1 st Line pixel of the nth Frame, "N +1 Frame 1 Line Data" represents display Data corresponding to the 1 st Line pixel of the N +1 th Frame, and so on, and fig. 2 exemplarily shows display Data corresponding to four lines of pixels. Wherein the nth frame represents a previous frame and the (N + 1) th frame represents a frame to be displayed. As can be seen from fig. 2, the comparison result of the display data of the frame to be displayed and the previous display frame is: in the N +1 th display frame, the display data of the 2 nd row and the display data of the 3 rd row are unchanged from the display data of the corresponding row in the previous display frame, and the display data of the 1 st row and the display data of the 4 th row are both changed from the display data of the corresponding row in the previous display frame.
Adaptively, fig. 3 is a driving timing diagram of the display control circuit according to the first embodiment of the present invention corresponding to fig. 2, in fig. 3, "CPV" represents a clock signal for controlling the pixel rows to be sequentially turned on, and is provided by the timing output unit 115, "STV" represents a row driving start signal for triggering the gate driving module 13 to turn on the scanning of the pixels in row 1; "OE" represents a scan enable control signal, provided by the scan enable control unit 113, with a high level being a scan enable signal and a low level being a scan disable signal, and "Vout" represents an output signal of the output terminal of the boost module 14; the "G1", "G2", and "G3" are scanning signals output by the gate driving module 13 to the gate lines corresponding to the pixels in the row 1, the pixels in the row 2, and the pixels in the row 3, respectively, and are used to control the TFTs in the row to be turned on or off (high level is on, and low level is off).
With reference to fig. 2 and fig. 3, in the driving sequence of the N +1 frame, since the display data of the 1 st row in the N +1 frame is changed compared with the N frame, the OE signal corresponding to the pixels of the 1 st row is a scan enable signal (high level), so that the output end of the voltage boost module 14 outputs a high level signal (e.g., VGH), the scan signal (G1) output by the gate driving module 13 to the pixels of the 1 st row is the high level signal VGH provided by the voltage boost module 14, and the TFTs of the row can be controlled to be turned on, so that the display data of the 1 st row is written into the pixels of the 1 st row through the source driving module 12; because the display data in the 2 nd row and the display data in the 3 rd row in the N +1 th frame are unchanged compared with the nth frame, the OE signals corresponding to the two rows are scan disable signals (low level), so that the output end of the voltage boost module 14 outputs a low level signal (Vin), thereby saving power consumption, meanwhile, the scan signals (G2 and G3) output by the gate driving module 13 to the pixels in the 2 nd row and the pixels in the 3 rd row are VGL provided by the power module, and the two rows of TFTs can be controlled to be turned off, so that the display data in the 2 nd row and the display data in the 3 rd row cannot be written into the pixels in the 2 nd row and the pixels in the 3 rd row, and so on, and no further description is given herein.
The embodiment of the invention has the advantages that the time sequence control module comprises a data comparison unit, the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit by arranging the boosting module, the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, the data comparison unit can control the output signal of the scanning enabling control unit according to the comparison result of the display data of a frame to be displayed and a previous display frame, and further the working states of the boosting module and the grid driving module are controlled by the output signal of the scanning enabling control unit; for the pixel rows with unchanged display data, the boosting module can not boost under the control of the scanning non-enabling signal, and the gate driving module can control the pixel switches to be turned off under the control of the scanning non-enabling control signal and does not scan the pixel rows, so that the source driving module can only write (charge) the display data into the pixel rows in the scanning state, and the pixel rows which are not scanned are not charged, and the boosting module does not need to provide the conducting voltage of the pixel switches to the gate driving module all the time, thereby reducing the power consumption.
On this basis, referring to fig. 1, the optional timing control module 11 further includes a data receiving unit 111, a data buffering unit 116, and a data output unit 114; the data receiving unit 111 is electrically connected with the data comparing unit 112, and the data receiving unit 111 is used for sequentially receiving the display data of each display frame and sequentially sending the display data of each display frame to the data comparing unit 112; the data buffer unit 116 is electrically connected between the data comparing unit 112 and the data output unit 114, and the data buffer unit 116 is configured to receive and store the display data of each display frame sent by the data comparing unit 112, and sequentially output the display data of each display frame to the data output unit 114; the data output unit 114 is electrically connected to the source driving module 12, and the data output unit 114 is configured to send display data of a frame to be displayed to the source driving module 12, so that the display data corresponding to a pixel row with a pixel switch in an on state is written into the pixel row.
Because the data comparison unit 112 needs to compare the display data, the data processing amount is large, and the data receiving unit 111 is configured to receive the display data of each display frame, so that the display data can be temporarily stored to match the processing speed of the data comparison unit 112, thereby ensuring stable operation of the timing control module 11. By arranging the data buffer unit 116, the working speeds of the front-stage circuit and the rear-stage circuit can be matched, the functions of coordination and buffering are achieved, and the synchronization of data transmission is realized. Specifically, the data buffer unit 116 may store display data of a previous display frame, after the data comparison unit 112 receives the display data of a frame to be displayed, the data buffer unit 116 may be called to compare the display data of the previous display frame, and after the comparison is completed, the display data of the frame to be displayed is stored in the data buffer unit 116 and is output to the source driving module 12 through the data output unit 114, and when the gate driving module 13 controls a pixel switch in a certain pixel row to be turned on, the source driving module 12 may write the display data corresponding to the pixel row into the pixel row.
As shown in fig. 1, the selectable display control circuit 1 further includes a backlight driving module 15, the timing control module 11 further includes a backlight control unit 117, the backlight control unit 117 is electrically connected to the backlight driving module 15, and the backlight control unit 117 is configured to send a Pulse Width Modulation (PWM) signal to the backlight driving module 15 to drive the light source device to emit light.
As shown in fig. 1, the selectable display control circuit 1 further includes a storage module 16, the timing control module 11 further includes a communication unit 118, the storage module 16 is configured to store a program code, and the timing control module 11 calls the program code through the communication unit 118 to process and convert signals, such as data signals, clock signals, and control signals, input by the system motherboard, so that subsequent driving circuits, such as the gate driving module 13 and the source driving module 12, can recognize the signals. Illustratively, the communication module may be IIC/SPI, and the storage module 16 may be EEProm/Flash.
Further, fig. 4 is a schematic diagram of a specific structure of the boost module in fig. 1, and as shown in fig. 4, the optional boost module 14 includes an inductor L, a diode D, a first resistor R1, a second resistor R2, a comparator 141, a reference voltage generating unit 142, a switch control unit 143, a clock generating unit 144, and a field effect transistor 145; a first end of the inductor L is electrically connected with the input end of the boost module 14, a second end of the inductor L is electrically connected with an anode of the diode D and a first pole of the field effect transistor 145, respectively, a second pole of the field effect transistor 145 is grounded, and a cathode of the diode D is electrically connected with the output end of the boost module 14; a first end of the first resistor R1 is electrically connected to the output end of the boost module 14, a second end of the first resistor R1 is electrically connected to a first end of the second resistor R2, and a second end of the second resistor R2 is grounded; a negative input end of the comparator 141 is electrically connected with a first end of the second resistor R2, a positive input end of the comparator 141 is electrically connected with the reference voltage generating unit 142, and an output end of the comparator 141 is electrically connected with the switch control unit 143; the switch control unit 143 is further electrically connected to the control terminal EN of the boost module 14, the clock generation unit 144, and the gate of the field effect transistor 145, respectively; the switch control unit 143 is configured to control an on-off state of the field effect transistor 145 according to a control signal of the control terminal EN of the boost module 14, an output signal of the output terminal of the comparator 141, and a clock signal of the clock generation unit 144, so as to control an output signal of the boost module 14.
The control signal (i.e., the output signal OE of the scan enable control unit 113) of the control terminal EN of the boost module 14 has a higher priority for controlling the on/off states of the field effect transistor 145 than the output signal of the output terminal of the comparator 141 and the clock signal of the clock generation unit 144. Specifically, when the output signal of the scan enable control unit 113 is a scan disable signal, the switch control unit 143 controls the field effect transistor 145 to be kept on, at this time, the boost module 14 does not work, and the output signal Vout is at a low level; when the output signal of the scan enable control unit 113 is a scan enable signal, the switch control unit 143 controls the field effect transistor 145 to alternately turn on and off based on the clock signal of the clock generation unit 144, boosts the first power signal Vin, and acquires the divided voltage of the second resistor R2 through the comparator 141, compares the divided voltage with the reference voltage provided by the reference voltage generation unit 142, determines whether the output signal Vout of the boost module 14 reaches a set voltage (e.g., VGH), and if not, controls the field effect transistor 145 to keep the alternately turned on and off state, and boosts the first power signal until the output signal of the boost module 14 reaches VGH.
Further, as shown in fig. 4, the selectable voltage boosting module 14 further includes a switch unit 146 electrically connected between the control terminal EN of the voltage boosting module 14 and the switch control unit 143, so as to control the switching state of the switch unit 146 and further control the operating state of the field effect transistor 145 by the output signal of the scan enable control unit 113. Specifically, when the scan enable control unit 113 outputs the scan disable signal, the switch unit 146 is controlled to be turned off, and the switch control unit 143 may control the field effect transistor 145 to be kept on according to the turn-off signal of the switch unit, so as to enable the boost module 14 not to operate; when the scan enable control unit 113 outputs the scan enable signal, the switch unit 146 is controlled to be turned on, and the switch control unit 143 may control the field effect transistor 145 to be alternately turned on and off according to the turn-on signal of the switch unit, so as to boost the first power signal until the set voltage VGH is reached.
With continued reference to fig. 4, the optional boost module 14 further includes a first capacitor C1, a third resistor R3, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4; a first polar plate of the first capacitor C1 is electrically connected with a first end of the inductor L, and a second polar plate of the first capacitor C1 is grounded; a first end of the third resistor R3 is electrically connected with the positive electrode of the diode D, a second end of the third resistor R3 is electrically connected with a first polar plate of the second capacitor C2, and a second polar plate of the second capacitor C2 is grounded; the first polar plate of the third capacitor C3 and the first polar plate of the fourth capacitor C4 are both electrically connected with the cathode of the diode D, and the second polar plate of the third capacitor C3 and the second polar plate of the fourth capacitor C4 are both grounded. The first capacitor C1, the third resistor R3, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are arranged to play a role in stabilizing voltage and filtering, and the stability of signals is guaranteed.
Example two
Based on the same inventive concept, the embodiment of the invention also provides a display control method of the liquid crystal display module, which is realized by adopting the display control circuit 1 provided by any one of the embodiments. Fig. 5 is a schematic flowchart of a display control method according to a second embodiment of the present invention, and referring to fig. 5, the display control method includes the following steps:
s201, the data comparison unit compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame in sequence.
S202, if the display data of the ith row are the same, the data comparison module controls the scanning enabling control unit to output a scanning non-enabling signal.
S203, the boost module outputs a first power signal of a first power signal end under the control of the scanning non-enable signal.
And S204, the gate driving module controls the pixel switches of the corresponding row to be closed in the frame to be displayed under the control of the scanning non-enable signal.
And S205, if the display data of the ith row are different, the data comparison module controls the scanning enabling control unit to output a scanning enabling signal.
S206, the boosting module boosts the first power supply signal of the first power supply signal end to the conducting voltage of the pixel switch under the control of the scanning enabling signal.
And S207, the grid driving module controls the conducting voltage to be output to the pixel switches of the corresponding row under the control of the scanning enabling signal so as to open the pixel switches in the frame to be displayed.
Wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers.
Specifically, referring to fig. 1, after the data comparison unit 112 performs comparison of the display data, for the pixels with the same display data, the scan enable control unit 113 is controlled to output a scan disable signal, so that the gate driving module 13 controls the portion of the pixel rows to be in a non-scan state in the frame to be displayed, that is, the pixel switches TFT are turned off, so that the display data of the portion of the pixel rows are not repeatedly updated, the display frame is kept still, and the voltage boosting module 14 outputs the first power signal of the first power signal terminal Vin; for the pixel rows with different display data, the scan enable control unit 113 is controlled to output the scan enable signal, so that the voltage boosting module 14 boosts the first power signal at the first power signal end to the conducting voltage of the pixel switch, and the gate driving module 13 outputs the conducting voltage to the pixel switch of the corresponding row, so as to control the portion of the pixel rows to be in the scan state in the frame to be displayed.
According to the display control method provided by the embodiment of the invention, the data comparison unit controls the output signal of the scanning enabling control unit according to the comparison result of the display data of the frame to be displayed and the previous display frame, and further the scanning enabling control unit can control the working states of the boosting module and the grid driving module; for the pixel rows with unchanged display data, the boosting module can not boost under the control of the scanning non-enabling signal, and meanwhile, the grid driving module can control the pixel switches to be closed under the control of the scanning non-enabling signal and does not scan the pixel rows, so that the source driving module can only write (charge) the display data into the pixel rows in a scanning state, and does not charge the pixel rows which are not scanned, and the boosting module does not need to provide the conducting voltage of the pixel switches to the grid driving module all the time, thereby reducing the power consumption.
EXAMPLE III
Fig. 6 is a schematic flow chart of a display control method according to a third embodiment of the present invention, where the display method further supplements the transmission process of the display data to the source driver module. Referring to fig. 1, the timing control module 11 further includes a data receiving unit 111, a data buffering unit 116, and a data output unit 114; the data receiving unit 111 is electrically connected with the data comparing unit 112; the data buffer unit 116 is electrically connected between the data comparing unit 112 and the data output unit 114; the data output unit 114 is electrically connected to the source driving module 12. Accordingly, as shown in fig. 6, in the present embodiment, the display control method may include the following steps:
s301, the data receiving unit receives the display data of each display frame in sequence and sends the display data of each display frame to the data comparison unit in sequence.
S302, the data comparison unit compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame in sequence.
And S303, if the display data of the ith row are the same, the data comparison unit controls the scanning enabling control unit to output a scanning non-enabling signal.
S304, the boost module outputs a first power signal of a first power signal end under the control of the scanning non-enable signal.
S305, the gate driving module controls the pixel switches of the corresponding row to be closed in the frame to be displayed under the control of the scanning non-enable signal.
S306, if the display data of the ith row are different, the data comparison unit controls the scanning enabling control unit to output a scanning enabling signal.
S307, the voltage boosting module boosts the first power signal of the first power signal end to the conducting voltage of the pixel switch under the control of the scan enable signal.
And S308, the grid driving module controls the conduction voltage to be output to the pixel switches of the corresponding row under the control of the scanning enabling signal, so that the pixel switches are opened in the frame to be displayed.
S309, the data buffer unit receives and stores the display data of each display frame sent by the data comparison unit, and sequentially outputs the display data of each display frame to the data output unit.
S310, the data output unit sends the display data of the frame to be displayed to the source electrode driving module so that the display data corresponding to the pixel row with the pixel switch in the opening state is written into the pixel row.
Example four
Fig. 7 is a detailed flowchart of a display control method according to a fourth embodiment of the present invention, and with reference to fig. 1, fig. 2, fig. 3, and fig. 7, the display control method according to the fourth embodiment of the present invention includes the following steps: the nth frame (N is greater than or equal to 1) of display data is input to the data receiving unit 111, and is transmitted and stored in the data buffering unit 116 after passing through the data comparison unit 112, for the first frame of display data, the data comparison unit 112 does not compare the display data, the scan enable control unit 113 controls the gate driving module 13 to scan the pixels of each row line by line, so that the display data of each row line is written into the corresponding pixel row one by one, subsequently, the (N + 1) th frame of display data is input to the data receiving unit 111 and is sent to the data comparison unit 112, the data comparison unit 112 can use the display data of the nth frame stored in the data buffering unit 116, and compare whether the display data of the (N + 1) th frame and the display data of the nth frame are the same by line, and for the pixel row with the same display data, the scan enable control unit 113 outputs an OE signal of low level "L", in addition, after the data comparison unit 112 finishes the comparison of the display data, the display data to be displayed in the (N + 1) th frame is stored in the data buffer unit 116, so that the display data in the (N + 1) th frame is transmitted to the source electrode driving module 12 through the data output unit 114, and when the pixel row is scanned, the display data corresponding to the pixel row is written into the corresponding pixel to charge the pixel. According to the display control scheme provided by the embodiment of the invention, the power consumption can be reduced because the pixel rows corresponding to the static picture area are not scanned and data writing is not carried out, and the power consumption of the device can be further reduced by controlling the power supply signal VGH to be synchronously output along with the enable signal of OE.
EXAMPLE five
Based on the same invention concept, the embodiment of the invention also provides a liquid crystal display module. Fig. 8 is a schematic structural diagram of a liquid crystal display module according to a fifth embodiment of the present invention, and as shown in fig. 8, the liquid crystal display module 10 includes a liquid crystal display panel 2 and display control circuits (11, 12, and 13) according to any of the embodiments; the liquid crystal display panel 2 includes pixel switches 21 (i.e., TFTs) arranged in an array along a row direction and a column direction, wherein control terminals of the pixel switches 21 in the same row are electrically connected to the gate driving module 13 through the same gate line 22, first terminals of the pixel switches 21 in the same column are electrically connected to the source driving module 12 through the same data line 23, and second terminals of the pixel switches 21 are electrically connected to a corresponding pixel electrode. When the liquid crystal display is used for displaying, the pixel switch 21 is turned on, display data are written into the corresponding pixel electrode through the pixel switch, the pixel electrode is charged, the voltage difference between the pixel electrode and the common electrode can be adjusted, the deflection angle of the liquid crystal is further adjusted, the light output amount of the pixel is controlled, and the picture is displayed.
In addition, referring to fig. 8, the liquid crystal display module 10 further includes a backlight module 3, the backlight module 3 includes a backlight driving module 15, and the backlight driving module 15 is electrically connected to the timing control module 11.
Since the liquid crystal display module 10 provided in the embodiment of the present invention includes the display control circuit 1 provided in any embodiment of the present invention, the advantage of low power consumption is provided, and specific principles can be referred to the description of the above embodiments, which are not described herein again.
EXAMPLE six
Based on the same inventive concept, an embodiment of the present invention further provides a liquid crystal display device, and fig. 9 is a schematic structural diagram of a liquid crystal display device according to a sixth embodiment of the present invention, and the liquid crystal display device 100 includes the liquid crystal display module 10, so that the liquid crystal display device also has the advantage of low power consumption. The liquid crystal display device 100 provided by the embodiment of the invention may be a mobile phone shown in fig. 9, and may also be any electronic product with a display function, including but not limited to the following categories: the touch screen display system comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited in this respect.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (9)
1. A display control circuit of a liquid crystal display module comprises a time sequence control module, a grid driving module and a source driving module, wherein the time sequence control module is electrically connected with the grid driving module and the source driving module respectively; it is characterized in that the preparation method is characterized in that,
the time sequence control module comprises a data comparison unit and a scanning enabling control unit; the output end of the data comparison unit is electrically connected with the control end of the scanning enabling control unit, and the output end of the scanning enabling control unit is electrically connected with the grid driving module;
the display control circuit further comprises a boosting module, wherein the input end of the boosting module is electrically connected with the first power signal end, the output end of the boosting module is electrically connected with the grid driving module, and the control end of the boosting module is electrically connected with the output end of the scanning enabling control unit;
the data comparison unit is used for sequentially comparing whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row are the same, controlling the scanning enabling control unit to output a scanning non-enabling signal; if the ith row of display data is different, controlling the scanning enabling control unit to output a scanning enabling signal;
the boost module is used for outputting a first power supply signal of the first power supply signal end under the control of the scanning non-enable signal; or, the scanning circuit is used for boosting a first power supply signal of the first power supply signal end to the conducting voltage of a pixel switch under the control of the scanning enabling signal;
the grid driving module is used for controlling the pixel switches of the corresponding row to be closed in the frame to be displayed under the control of the scanning non-enabling signal; or, the pixel switch is used for controlling the on-state voltage to be output to the corresponding row under the control of the scan enable signal, so that the pixel switch is turned on in the frame to be displayed;
wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers;
the boosting module comprises an inductor, a diode, a first resistor, a second resistor, a comparator, a reference voltage generating unit, a switch control unit, a clock generating unit and a field effect transistor;
the first end of the inductor is electrically connected with the input end of the boosting module, the second end of the inductor is electrically connected with the anode of the diode and the first pole of the field effect transistor respectively, the second pole of the field effect transistor is grounded, and the cathode of the diode is electrically connected with the output end of the boosting module; the first end of the first resistor is electrically connected with the output end of the boost module, the second end of the first resistor is electrically connected with the first end of the second resistor, and the second end of the second resistor is grounded; the negative input end of the comparator is electrically connected with the first end of the second resistor, the positive input end of the comparator is electrically connected with the reference voltage generating unit, and the output end of the comparator is electrically connected with the switch control unit; the switch control unit is also electrically connected with the control end of the boosting module, the clock generation unit and the grid electrode of the field effect transistor respectively;
the switch control unit is used for controlling the on-off state of the field effect transistor according to a control signal of the control end of the boosting module, an output signal of the output end of the comparator and a clock signal of the clock generation unit so as to control the output signal of the boosting module.
2. The display control circuit of claim 1, wherein the boost module further comprises a first capacitor, a third resistor, a second capacitor, a third capacitor, and a fourth capacitor;
a first polar plate of the first capacitor is electrically connected with the first end of the inductor, and a second polar plate of the first capacitor is grounded; the first end of the third resistor is electrically connected with the anode of the diode, the second end of the third resistor is electrically connected with the first polar plate of the second capacitor, and the second polar plate of the second capacitor is grounded; the first pole plate of the third capacitor and the first pole plate of the fourth capacitor are both electrically connected with the cathode of the diode, and the second pole plate of the third capacitor and the second pole plate of the fourth capacitor are both grounded.
3. The display control circuit according to claim 1, wherein the timing control module further comprises a data receiving unit, a data buffering unit, and a data outputting unit;
the data receiving unit is electrically connected with the data comparison unit and is used for sequentially receiving the display data of each display frame and sequentially sending the display data of each display frame to the data comparison unit;
the data buffer unit is electrically connected between the data comparison unit and the data output unit, and is used for receiving and storing the display data of each display frame sent by the data comparison unit and sequentially outputting the display data of each display frame to the data output unit;
the data output unit is electrically connected with the source electrode driving module and used for sending the display data of the frame to be displayed to the source electrode driving module so as to write the display data corresponding to the pixel row with the pixel switch in the open state into the pixel row.
4. The display control circuit of claim 1, wherein the timing control module further comprises a timing output unit electrically connected to the gate driving module, the timing output unit being configured to provide a scan driving timing for the gate driving module.
5. The display control circuit of claim 1, further comprising a backlight driving module, wherein the timing control module further comprises a backlight control unit, and wherein the backlight control unit is electrically connected to the backlight driving module.
6. A display control method of a liquid crystal display module is realized by the display control circuit of any one of claims 1 to 5, and is characterized by comprising the following steps:
the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame; if the display data of the ith row are the same, controlling a scanning enabling control unit to output a scanning non-enabling signal; if the ith row of display data is different, controlling a scanning enabling control unit to output a scanning enabling signal;
the boost module outputs a first power supply signal of the first power supply signal end under the control of the scanning non-enabling signal; or the boosting module boosts the first power signal of the first power signal end to the conducting voltage of the pixel switch under the control of the scanning enabling signal;
the grid driving module controls the pixel switches of the corresponding row to be closed in the frame to be displayed under the control of the scanning non-enabling signal; or the gate driving module controls the conducting voltage to be output to the pixel switch of the corresponding row under the control of the scanning enabling signal, so that the pixel switch is opened in the frame to be displayed;
wherein i is more than or equal to 1 and less than or equal to n, n represents the number of pixel points in the liquid crystal display module along the column direction, and i and n are integers.
7. The display control method according to claim 6, wherein the timing control module further comprises a data receiving unit, a data buffering unit, and a data output unit; the data receiving unit is electrically connected with the data comparison unit, the data buffer unit is electrically connected between the data comparison unit and the data output unit, and the data output unit is electrically connected with the source electrode driving module;
before the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame, the display control method further includes:
the data receiving unit is used for sequentially receiving the display data of each display frame and sequentially sending the display data of each display frame to the data comparison unit;
after the data comparison unit sequentially compares whether the display data of each line in the frame to be displayed is the same as the display data of the corresponding line in the previous display frame, the display control method further includes:
the data buffer unit receives and stores the display data of each display frame sent by the data comparison unit, and sequentially outputs the display data of each display frame to the data output unit;
and the data output unit sends the display data of the frame to be displayed to the source electrode driving module so as to write the display data corresponding to the pixel row with the pixel switch in an open state into the pixel row.
8. A liquid crystal display module, comprising a liquid crystal display panel and the display control circuit of any one of claims 1-5;
the liquid crystal display panel comprises pixel switches arranged in an array mode in the row direction and the column direction, the control ends of the pixel switches located in the same row are electrically connected with the grid electrode driving module through the same grid line, and the first ends of the pixel switches located in the same column are electrically connected with the source electrode driving module through the same data line.
9. A liquid crystal display device comprising the liquid crystal display module according to claim 8.
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| JPH07230076A (en) * | 1994-02-17 | 1995-08-29 | Matsushita Electric Ind Co Ltd | Matrix type liquid crystal display method |
| JP3476241B2 (en) * | 1994-02-25 | 2003-12-10 | 株式会社半導体エネルギー研究所 | Display method of active matrix type display device |
| TWI349259B (en) * | 2006-05-23 | 2011-09-21 | Au Optronics Corp | A panel module and power saving method thereof |
| CN101154884A (en) * | 2006-09-29 | 2008-04-02 | 台湾类比科技股份有限公司 | Current mode width pulse modulation booster circuit and its feedback signal sensing method |
| CN102214450B (en) * | 2011-06-02 | 2013-01-09 | 深圳市华星光电技术有限公司 | Liquid crystal display and driving method thereof |
| CN102508374A (en) * | 2011-11-25 | 2012-06-20 | 深圳市华星光电技术有限公司 | Liquid crystal display and driving method thereof |
| WO2013075369A1 (en) * | 2011-11-25 | 2013-05-30 | 深圳市华星光电技术有限公司 | Liquid crystal display and driving method thereof |
| CN103093729B (en) * | 2013-02-28 | 2015-07-29 | 深圳市华星光电技术有限公司 | There is the backlight drive circuit of two BOOST booster circuit |
| CN105096873B (en) * | 2015-08-12 | 2017-07-11 | 京东方科技集团股份有限公司 | A kind of method for displaying image and liquid crystal display |
| CN205336113U (en) * | 2015-12-28 | 2016-06-22 | 昆山龙腾光电有限公司 | Voltage conversion circuit of liquid crystal display module test usefulness |
| CN108037630A (en) * | 2017-11-22 | 2018-05-15 | 上海天马微电子有限公司 | Display panel and display device |
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| TWI696338B (en) * | 2019-09-05 | 2020-06-11 | 大陸商北京集創北方科技股份有限公司 | Boost power converter capable of quickly responding to input voltage changes and electronic equipment using the same |
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