CN114323396B - MEMS capacitive six-axis force sensor chip and preparation process thereof - Google Patents

MEMS capacitive six-axis force sensor chip and preparation process thereof Download PDF

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CN114323396B
CN114323396B CN202111595513.8A CN202111595513A CN114323396B CN 114323396 B CN114323396 B CN 114323396B CN 202111595513 A CN202111595513 A CN 202111595513A CN 114323396 B CN114323396 B CN 114323396B
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device layer
glass
resistance silicon
rigid body
low
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CN114323396A (en
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赵立波
谭仁杰
韩香广
高文迪
李敏
陈瑶
董林玺
杨萍
王小章
王久洪
蒋庄德
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Xian Jiaotong University
Hangzhou Dianzi University
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Xian Jiaotong University
Hangzhou Dianzi University
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Abstract

A MEMS capacitive six-axis force sensor chip and a preparation process thereof are disclosed, wherein the chip comprises a high-resistance silicon device layer, a low-resistance silicon device layer and a glass device layer which are arranged from top to bottom, and a sandwich structure is formed by silicon-silicon bonding and silicon-glass bonding; the high-resistance silicon device layer comprises a first central rigid body and a load transmission structure; the low-resistance silicon device layer comprises a second central rigid body, the periphery of the second central rigid body and the electrode form a comb capacitor, and the second central rigid body is bonded with the first central rigid body into a whole on one hand and serves as a common electrode of a movable polar plate of the comb capacitor on the other hand; the glass device layer comprises a glass substrate, and metal layer structures such as a flat capacitor plate, an external bonding pad, an internal bonding pad and a metal lead on the glass substrate; the preparation process comprises a processing process of a silicon device layer, a processing process of a glass device layer, a silicon-glass bonding process and scribing; the invention realizes the decoupling output of six-axis force or moment and has the advantages of large measuring range, high sensitivity, small crosstalk error, miniaturization and the like.

Description

MEMS capacitive six-axis force sensor chip and preparation process thereof
Technical Field
The invention belongs to the technical field of MEMS sensors and micro-nano manufacturing, and particularly relates to an MEMS capacitive six-axis force sensor chip and a preparation process thereof.
Background
The MEMS sensor has the characteristics of miniaturization, integration, intellectualization and the like, is widely applied to the fields of aerospace, industrial robots, biomedical treatment and the like, and is a basis for realizing interconnection of everything. The micro-nano manufacturing technology is developed on the basis of the traditional IC process, processes such as photoetching, etching, deposition and the like are carried out on a silicon-based material, the mass production of micro structures can be realized, the cost is low, and the micro-nano manufacturing technology is widely applied to the manufacturing of micro sensors, micro-nano robots and micro structures.
The existing six-axis force sensor is mainly applied to the wrist and the shoulder of a robot and some large displacement platforms, the size and the measuring range are large, and the research on the miniaturized six-axis force sensor applied to the high-precision field such as the finger tip of an intelligent robot, minimally invasive surgery and a miniature robot is less.
The MEMS six-axis force sensor based on the micro-nano processing technology can well meet the miniaturization requirement and can be mainly divided into a piezoresistive type, a piezoelectric type, a capacitive type, a resonant type and the like according to the working principle. The piezoresistive sensor has a complex processing technology and is greatly influenced by temperature; the piezoelectric sensor has higher working frequency, is suitable for measuring dynamic force and is difficult to detect static force; the capacitive sensor has the advantages of simple structure and processing technology, small influence of temperature and the like; the resonant sensor mainly detects force sense through the change of the resonant frequency of a sensitive mechanical structure, and the structure and the working principle are complex.
The existing MEMS capacitive six-axis force sensor based on the micro-nano processing technology is mainly used for detecting milli-Newton or even micro-Newton level force by adopting a sensor with a comb tooth capacitance structure, and the sensor with a parallel plate capacitance structure is low in sensitivity and difficult to really inhibit crosstalk error between six-axis force, so that decoupling of the six-axis force cannot be completely realized.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide an MEMS capacitive six-axis force sensor chip and a preparation process thereof, and through the design of a load transfer structure, the detection of Newton force and moment can be realized; signals are detected through summation and difference of the plate capacitors and the comb capacitors, and high sensitivity is achieved; by combining the proposed decoupling formula, the crosstalk error between six-axis forces can be truly eliminated; in addition, based on the MEMS manufacturing technology, the sensor chip has the advantages of miniaturization, mass production, low cost and the like.
In order to achieve the purpose, the invention adopts the technical scheme that:
an MEMS capacitive six-axis force sensor chip comprises a high-resistance silicon device layer 1, a low-resistance silicon device layer 2 and a glass device layer 3 which are arranged from top to bottom, and a sandwich structure is formed by silicon-silicon bonding and silicon-glass bonding;
the high-resistance silicon device layer 1 comprises a first central rigid body 12, the outer side of the first central rigid body 12 is connected with a peripheral frame through a V-shaped beam 11 in an annular array, and a cylindrical cavity 13 is arranged inside the first central rigid body 12;
the low-resistance silicon device layer 2 comprises a second central rigid body 23, comb capacitors 22 are formed by the periphery of the second central rigid body 23 and the electrodes 21, and four corners of the second central rigid body 23 are connected with the electrodes 21 through Z-shaped beams 25;
the electrodes 21 comprise fixed plate electrodes of eight comb capacitors and four movable plate electrodes which are mutually connected with the second central rigid body 23; the comb capacitors 22 are eight in number, the eight comb capacitors 22 are arranged in an axisymmetric or centrosymmetric manner, each comb capacitor 22 is composed of a movable electrode plate 222 and a fixed electrode plate 221, the fixed electrode plates 221 are correspondingly connected with electrodes around the sensor chip, the movable electrode plates 222 are connected with the second central rigid body 23, the height of the fixed electrode plates 221 is larger than that of the movable electrode plates 222, and the comb capacitors 22 can convert the displacement or rotation angle of the second central rigid body 23 into the change of the capacitance value; the second central rigid body 23 is bonded with the first central rigid body 12 of the high-resistance silicon device layer 1 into a whole on one hand, and is used as a common electrode of a comb capacitance movable polar plate on the other hand;
the glass device layer 3 comprises a glass substrate, an inner glass cavity 31 and an outer glass cavity 31 are arranged on the glass substrate, the inner glass cavity 31 is provided with a plate capacitor plate 32, the outer glass cavity 31 is provided with an outer bonding pad 35, an inner bonding pad 33 is arranged on the glass substrate between the inner glass cavity 31 and the outer glass cavity 31, and a metal lead 34 is connected between the inner bonding pad 33 and the outer bonding pad 35;
the plate capacitor plates 32 are four square metal plates, are arranged on the surface of the glass cavity 31 in central symmetry, and form four parallel plate capacitors with the second central rigid body 23 of the low-resistance silicon device layer 2; the internal bonding pads 33 comprise eight internal bonding pads which are contacted with the comb teeth fixed electrode plate electrodes and four internal bonding pads which are contacted with the comb teeth movable electrode plate electrodes, and each internal bonding pad 33 is electrically interconnected and communicated with the electrode 21 corresponding to the low-resistance silicon device layer 2.
The array number in the V-shaped beam 11 of the annular array is N, a single V-shaped beam 11 is formed by connecting two straight beams with the lengths of L1 and L2 and the widths of W at an angle theta, one end of the V-shaped beam 11 is fixed on a first central rigid body 12, the other end of the V-shaped beam 11 is fixedly supported on a peripheral frame, a force or a moment to be measured is converted into a translational displacement or a rotation angle of the first central rigid body 12, the rigidity value of the V-shaped beam is changed through the optimized design of size parameters of N, L1, L2, W and theta, and the detection range of a sensor chip is adjusted to meet the design requirements.
The Z-shaped beam 25 is formed by connecting three sections of straight beams at a certain angle, and has the characteristic of low rigidity.
The depth of the glass cavity 31 is the distance between the designed parallel plate capacitors, and the depth is accurately controlled by a wet etching process.
The external bonding pad 35 is a square structure, and the external bonding pad 35 is connected with a bonding pad on an external PCB by using a gold wire bonding technology, namely, the sensor chip is connected into an external circuit.
A preparation process of an MEMS capacitive six-axis force sensor chip comprises a silicon device layer processing process, a glass device layer processing process, a silicon-glass bonding process and scribing;
the processing technology of the silicon device layer comprises the following specific steps:
step 1.1: preparing a high-resistance silicon wafer, namely preparing a monocrystalline silicon wafer with the resistivity of 10000 omega cm;
step 1.2: preparing an alignment mark and a scribing mark, photoetching one surface of a high-resistance silicon wafer, carrying out dry etching on the high-resistance silicon wafer by using the developed photoresist as a mask to obtain a first alignment mark and a scribing mark, and defining the surface as the front surface of the high-resistance silicon wafer;
step 1.3: preparing a back cavity structure, photoetching the back of the high-resistance silicon wafer, and carrying out dry etching on the high-resistance silicon wafer by using the developed photoresist as a mask to obtain the cavity structure for providing a motion space for the load transfer structure;
step 1.4: siO 2 2 Preparing a layer, growing a layer of SiO on the back of the high-resistance silicon wafer by thermal oxidation 2 As a barrier layer for subsequent deep etching;
step 1.5: preparing a low-resistance silicon wafer, and preparing a monocrystalline silicon wafer with the resistivity of 0.002-0.004 ohm cm;
step 1.6: preparing a front alignment mark and a front cavity of a low comb tooth area, photoetching one surface of a low-resistance silicon wafer, defining the surface as the front surface of the low-resistance silicon wafer, and carrying out dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask to obtain a front cavity structure of a position area where the front alignment mark and the low comb tooth are located;
step 1.7: silicon-silicon bonding, namely aligning through the alignment marks prepared in the step 1.2 and the step 1.6, and bonding the high-resistance silicon wafer and the low-resistance silicon wafer into a whole to obtain a silicon device layer whole wafer;
step 1.8: thinning and polishing, namely thinning the low-resistance silicon wafer of the whole wafer of the silicon device layer to the designed thickness and polishing;
step 1.9: preparing a back alignment mark and a back cavity of a low comb tooth area, photoetching the surface of a low-resistance silicon wafer of the whole wafer of a silicon device layer, and performing dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask to obtain a back cavity structure of the position area where the back alignment mark and the low comb tooth are located;
step 1.10: preparing a comb tooth layer structure, photoetching the back of a low-resistance silicon wafer, carrying out deep reactive ion etching on the low-resistance silicon wafer by using the developed photoresist as a mask, etching through the low-resistance silicon wafer to complete the preparation of unequal-height comb tooth capacitors, and preparing the SiO with the step 1.4 2 Preventing over-etching of the high-resistance silicon wafer;
the processing technology of the glass device layer comprises the following specific steps:
step 2.1: preparing a glass sheet, and selecting a BF33 glass wafer;
step 2.2: preparing an alignment mark and a glass cavity, preparing a metal mask on one surface of a glass sheet, and performing wet etching on the glass sheet by using the metal mask to obtain a second alignment mark and a glass cavity structure;
step 2.3: photoetching, namely spin-coating photoresist on the surface of a glass sheet with a cavity structure, and then exposing and developing to obtain a mask pattern for manufacturing a metal layer;
step 2.4: depositing a metal material, and depositing the metal material on the surfaces of the photoresist and the glass sheet after the development in the step 2.3;
step 2.5: stripping the metal layer, namely removing the photoresist on the surface of the glass, and simultaneously stripping the metal material attached to the photoresist to obtain the metal layer structures of the plate capacitor plate 32, the internal bonding pad 33, the metal lead 34 and the external bonding pad 35, so as to finish the preparation of the glass device layer structure;
after the silicon device layer wafer and the glass device layer wafer are both prepared, the alignment marks in the steps 1.9 and 2.2 are utilized for alignment, and the silicon device layer wafer and the glass device layer wafer are bonded into a whole;
after the silicon-glass bonding is completed, photoetching is performed on the surface of the high-resistance silicon wafer of the whole wafer, the developed photoresist is used as a mask, deep reactive ion etching is performed on the high-resistance silicon wafer, the preparation of the load transmission structures of the V-shaped beam 11, the first central rigid body 12 and the cylindrical cavity 13 and the preparation of the whole sensor chip are completed, and the SiO prepared in the step 1.4 is used for preparing the sensor chip 2 Preventing the over-etching of the comb tooth structure prepared on the low-resistance silicon wafer;
and (3) scribing the bonded whole wafer by using the scribing mark prepared in the step (1.2) as an alignment mark to obtain a plurality of separated MEMS capacitive six-axis force sensor chips.
The sensor chip converts the force or torque to be measured into the displacement or the corner of the first central rigid body 12 through the V-shaped beam 11 of the high-resistance silicon device layer 1, further converts the displacement or the corner of the second central rigid body 23 of the low-resistance silicon device layer 2, detects the displacement mode of the second central rigid body 23 under the action of the force or the torque to be measured through the comb capacitors 22 of the low-resistance silicon device layer 2 and the parallel plate capacitors formed by the second central rigid body 23 and the plate capacitor plates 32 of the glass device layer 3, finally realizes the decoupling calculation of a working equation through a capacitor conditioning circuit, and outputs the force or the torque to be measured in six directions;
the decoupling equations (1) to (6) are as follows:
Figure BDA0003430389480000061
Figure BDA0003430389480000062
Figure BDA0003430389480000063
Figure BDA0003430389480000064
Figure BDA0003430389480000065
Figure BDA0003430389480000066
in the formula: c 1 ~C 8 The capacitance value of the capacitance with eight comb teeth on the low-resistance silicon device layer 2, C 9 ~C 12 The capacitance values of the four plate capacitors are obtained; the eight comb capacitors are arranged in mirror symmetry and central symmetry around the second central rigid body 23, and the four plate capacitors are arranged in central symmetry around the central point of the glass device layer 3.
The invention has the beneficial effects that: the invention adopts MEMS technology to realize the preparation of the microchip with the structures of load transfer beam, comb capacitor, plate capacitor and the like; the detection of Newton magnitude force and moment can be realized by reasonably designing the bearing structure of the annular array V-shaped beam; the signal is detected by summing and differentiating the plurality of comb capacitors and the plate capacitors, so that the sensitivity is high; through reasonable decoupling structure design and combination of the proposed decoupling formula, the problems of cross-axis sensitivity and crosstalk error during six-axis force detection can be well inhibited, and decoupling of six-axis force is realized; the chip is prepared by a micro-nano processing technology, and has the advantages of miniaturization, batch production, low cost and the like.
Drawings
Fig. 1 is a schematic cross-sectional structure and a schematic perspective structure of a sensor chip according to the present invention.
FIG. 2 (a) is a schematic perspective view of a high-resistivity silicon device layer; FIG. 2 (b) is a schematic plan view of the load transfer structure; fig. 2 (c) is a schematic plan view of the cavity space.
FIG. 3 (a) is a schematic perspective view of a low resistivity silicon device layer; FIG. 3 (b) is a schematic perspective view of a single comb capacitor; fig. 3 (c) is a schematic cross-sectional structure diagram of a single comb capacitor.
FIG. 4 (a) is a schematic plan view of a glass device layer; fig. 4 (b) is a schematic cross-sectional structure of the glass device layer.
FIG. 5 (a) is a process flow diagram for silicon device layer processing; FIG. 5 (b) is a process flow diagram for glass device layer processing; FIG. 5 (c) is a process flow diagram for silicon-glass bonding and load transfer structure fabrication.
Fig. 6 is a schematic diagram of a wafer dicing process.
Fig. 7 is a schematic diagram of the operation of the sensor chip.
FIG. 8 (a) shows a force F x A schematic plan view of the deformation of the chip structure under the action of the force; FIG. 8 (b) shows the moment M z A schematic plan view of the deformation of the chip structure under the action of the force; FIG. 8 (c) force F z A schematic cross-sectional view of the chip structure deformation under the action; FIG. 8 (d) shows the moment M y The cross-sectional view of the chip structure deformation under the action of the force.
Detailed Description
The present invention will be described in detail below with reference to the following examples and accompanying drawings.
Referring to fig. 1, the MEMS capacitive hexa-axial force sensor chip includes a high-resistance silicon device layer 1, a low-resistance silicon device layer 2, and a glass device layer 3, which are arranged from top to bottom, and forms a sandwich structure through silicon-silicon bonding and silicon-glass bonding.
Referring to fig. 2 (a), 2 (b) and 2 (c), the high resistance silicon device layer 1 includes a first central rigid body 12, the outer side of the first central rigid body 12 is connected with a peripheral frame through a V-shaped beam 11 in an annular array, a cylindrical cavity 13 is disposed inside the first central rigid body 12, the peripheral frame, the V-shaped beam 11 and the first central rigid body 12 enclose a cavity space 14, and a bonding region 15 is disposed at the bottom of the peripheral frame and the bottom of the first central rigid body 12;
the array number in the V-shaped beam 11 of the annular array is N, a single V-shaped beam 11 is formed by connecting two straight beams with the lengths of L1 and L2 and the widths of W at an angle of theta, one end of the V-shaped beam 11 is fixed on the first central rigid body 12, the other end of the V-shaped beam 11 is fixedly supported on a peripheral frame, the V-shaped beam 11 of the annular array plays a role in load transmission, the mechanical characteristic of stress deformation of the V-shaped beam is utilized, a force or moment to be measured can be converted into the translational displacement or the rotation angle of the first central rigid body 12, the rigidity value of the V-shaped beam can be changed by optimally designing the parameters of N, L1, L2, W, theta and the like, and therefore the detection range of the sensor chip is adjusted to meet the design requirement;
the first central rigid body 12 is of a circular cylindrical structure and has high rigidity, the periphery of the outer side surface is connected with the V-shaped beam 11, the middle cylindrical cavity 13 is an installation space of the load transfer upright post, and after the upright post is installed, a force or a moment to be measured can be transferred to the first central rigid body 12;
the cavity space 14 is a three-dimensional cavity with a cross section similar to a Chinese character 'hui', and is a movement space provided for deformation of the annular array V-shaped beam 11, so that interference between the V-shaped beam 11 and other fixed structures of the sensor chip is avoided;
the bonding region 15 comprises a fixed bonding region and a movable bonding region, the fixed bonding region is a fixed region positioned around the bottom of the peripheral frame, the movable bonding region is positioned on the lower surface of the first central rigid body 12, and the bonding region is made of SiO 2 The silicon nitride is used as an insulating layer between high-resistance silicon and low-resistance silicon and a barrier layer in the two deep etching processes.
Referring to fig. 3 (a), 3 (b) and 3 (c), the low-resistance silicon device layer 2 includes a second central rigid body 23, the periphery of the second central rigid body 23 and the electrodes 21 form a comb capacitor 22, four corners of the second central rigid body 23 are connected with the electrodes 21 through Z-shaped beams 25, and isolation channels 24 are arranged between the electrodes 21.
The electrodes 21 comprise fixed electrode plates of eight comb capacitors and four movable electrode plates which are mutually connected with the second central rigid body 23 and are used for providing input or output of electric signals for the comb capacitors;
eight comb capacitors 22 are provided, the eight comb capacitors 22 are arranged in an axial symmetry or central symmetry manner, each comb capacitor 22 is composed of a movable polar plate 222 and a fixed polar plate 221, the fixed polar plate 221 is correspondingly connected with electrodes around the sensor chip, the movable polar plates 222 are all connected with a second central rigid body 23, the height of the fixed polar plates 221 is larger than that of the movable polar plates 222, the comb capacitors 22 can convert the displacement or the rotation angle of the second central rigid body 23 into the change of a capacitance value, and size parameters of the comb capacitors include polar plate length l, polar plate width w, fixed polar plate height h, polar plate height difference delta h, polar plate main spacing d1, polar plate reverse spacing d2 and polar plate array spacing d;
the second central rigid body 23 is a cylindrical structure with a square cross section, and is bonded with the first central rigid body 12 of the high-resistance silicon device layer 1 into a whole on one hand and is used as a common electrode of a comb capacitance movable polar plate on the other hand;
the isolation trenches 24 are located between the peripheral electrodes 21 to prevent electrical interconnection between different electrodes;
the Z-shaped beam 25 is formed by connecting three straight beams at a certain angle, and the beam structure has the characteristic of small rigidity, so that the resistance to the movement of the second central rigid body 23 is almost negligible, and mainly leads the electric signals of the second central rigid body 23 to four peripheral electrodes to play a role in transmitting the electric signals.
Referring to fig. 4 (a) and 4 (b), the glass device layer 3 includes a glass substrate, an inner glass cavity 31 and an outer glass cavity 31 are disposed on the glass substrate, the inner glass cavity 31 is disposed with a plate capacitor plate 32, the outer glass cavity 31 is disposed with an outer pad 35, an inner pad 33 is disposed on the glass substrate between the inner glass cavity 31 and the outer glass cavity 31, and a metal lead 34 is connected between the inner pad 33 and the outer pad 35.
The depth of the glass cavity 31 is the distance between the designed parallel plate capacitors, the glass cavity is accurately controlled by a wet etching process, the side wall has a relatively gentle inclination angle due to the isotropy of the wet etching, namely the transverse undercutting effect, so that the subsequent deposition and stripping of a metal layer structure are facilitated, the metal layer structure is prepared by a magnetron sputtering metal material and stripping method, the thickness of the metal layer structure is hundreds of nanometers, and the quality of silicon-glass bonding cannot be influenced;
the plate capacitor plates 32 are four square metal plates and are arranged on the surface of the glass cavity 31 in a centrosymmetric manner, four parallel plate capacitors are formed by the plate capacitor plates and the second central rigid body 23 of the low-resistance silicon device layer 2, and the displacement and the rotation angle of the second central rigid body 23 outside the plane are detected through the change of the four capacitance values;
the internal bonding pads 33 comprise eight internal bonding pads which are contacted with the comb teeth fixed electrode plate electrodes and four internal bonding pads which are contacted with the comb teeth movable electrode plate electrodes, and each internal bonding pad 33 is electrically interconnected and communicated with the electrode 21 corresponding to the low-resistance silicon device layer 2, so that the metal lead 34 can transmit an electric signal to the electrode of the comb teeth capacitor 22;
the metal lead 34 connects each internal bonding pad 33 with the corresponding external bonding pad 35, and plays a role in electric signal transmission;
the external bonding pad 35 is of a square structure, and the external bonding pad 35 is connected with a bonding pad on an external PCB by using a gold wire bonding technology, namely, the sensor chip is connected into an external circuit, so that the chip can be further tested.
The high-resistance silicon device layer 1 and the low-resistance silicon device layer 2 are connected into a whole through a silicon-silicon bonding process to form a silicon device layer; the silicon device layer and the glass device layer 3 are connected into a whole through a silicon-glass bonding process; and scribing the whole wafer after bonding is finished, so as to obtain the sensor chip with a single sandwich structure.
Referring to fig. 5 (a), 5 (b) and 5 (c), a preparation process of an MEMS capacitive six-axis force sensor chip includes steps of a silicon device layer processing process, a glass device layer processing process, a silicon-glass bonding process and dicing;
the processing technology of the silicon device layer comprises processing of a high-resistance silicon wafer, processing of a low-resistance silicon wafer and silicon-silicon bonding;
the processing technology of the glass device layer comprises the steps of corrosion of glass and stripping of a metal layer.
In the preparation process of the sensor chip, the required eight relevant information of the photoetching plates and the corresponding processing procedures are shown in the following table:
number of photoetching plate Procedure (ii) Positive/negative plate Negative/positive plate
M1 Front side alignment mark and scribe mark etch Is just for Yin (kidney)
M2 Backside insulating layer and cavity etch Turning over Yin (kidney)
M3 Front side alignment mark and cavity structure etching Turning over Yin (kidney)
M4 Backside alignment mark and cavity structure etch Is just for Yin (kidney)
M5 Etching of comb tooth structure Is just for Yin body
M6 Corrosion of glass cavity Is just Yin (kidney)
M7 Stripping of metal layer structure Is just Yin body
M8 Load transfer structure etch Turning over Yin (kidney)
Referring to fig. 5 (a), the processing technology of the silicon device layer comprises deep reactive ion etching of the load transfer structure on the high-resistance silicon device layer 1, and SiO 2 Thermal oxidation and dry etching of the insulating layer, dry etching of the cavity structure, dry etching of the comb tooth regions with unequal heights on the front surface, dry etching of the comb tooth regions with unequal heights on the back surface and deep reactive ion etching of the comb tooth structure on the low-resistance silicon device layer 2; the preparation of the silicon device layer wafer needs the first five photoetching plates M1-M5, and the specific steps are as follows:
step 1.1: preparing a high-resistance silicon wafer, namely preparing a 4-inch monocrystalline silicon wafer 41 with the resistivity of 10000 omega cm and the thickness of 500 mu m, and cleaning and drying the monocrystalline silicon wafer for subsequent processing;
step 1.2: preparing an alignment mark and a scribing mark, namely photoetching one surface of a high-resistance silicon wafer by using a first photoetching plate M1, carrying out dry etching on the high-resistance silicon wafer by using developed photoresist as a mask to obtain a first alignment mark and a scribing mark 42 with the etching depth of 2 mu M, wherein the first alignment mark and the scribing mark are used for subsequent silicon-silicon bonding alignment, scribing alignment and the like, and the surface is defined as the front surface of the high-resistance silicon wafer;
step 1.3: preparing a back cavity structure, namely photoetching the back of the high-resistance silicon wafer by using a second photoetching plate M2, and performing dry etching on the high-resistance silicon wafer by using the developed photoresist as a mask, wherein the etching depth is controlled to be 5 mu M, so as to obtain a cavity structure 14 for providing a motion space for the load transfer structure;
step 1.4: siO 2 2 Preparing a layer, growing a layer of SiO with the thickness of 1-2 um on the back of the high-resistance silicon wafer by adopting a thermal oxidation method 2 Material 43, as a barrier layer for subsequent deep etching;
step 1.5: preparing a low-resistance silicon wafer, preparing a 4-inch monocrystalline silicon wafer 51 with resistivity of 0.002-0.004 ohm cm and thickness of 300 mu m, and cleaning and drying the monocrystalline silicon wafer for subsequent processing;
step 1.6: preparing a front alignment mark and a front cavity of a low comb area, photoetching one surface of a low-resistance silicon wafer by using a third photoetching plate M3, defining the surface as the front surface of the low-resistance silicon wafer, performing dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask, controlling the etching depth to be 5 microns, and obtaining a front alignment mark 52 and a front cavity structure 53 of the position area where the low comb is located, wherein the front alignment mark 52 is used for subsequent silicon-silicon bonding alignment;
step 1.7: silicon-silicon bonding, namely, at the high temperature of 1000 ℃, aligning through the alignment marks prepared in the step 1.2 and the step 1.6, taking the back surface of the high-resistance silicon wafer and the front surface of the low-resistance silicon wafer as bonding surfaces, and bonding the high-resistance silicon wafer and the low-resistance silicon wafer into a whole to obtain a silicon device layer whole wafer 54;
step 1.8: thinning and polishing, namely thinning and polishing the low-resistance silicon wafer of the whole wafer of the silicon device layer to 100 mu m by adopting a chemical mechanical polishing method;
step 1.9: preparing a back alignment mark and a low comb tooth area back cavity, photoetching the surface of a low-resistance silicon wafer of the whole wafer of a silicon device layer by using a fourth photoetching plate M4, carrying out dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask, controlling the etching depth to be 5 mu M, obtaining a back alignment mark 55 and a back cavity structure 56 of a position area where low comb teeth are positioned, wherein the back alignment mark 55 is used for subsequent photoetching and silicon-glass bonding alignment;
step 1.10: preparing a comb tooth layer structure, using a fifth photoetching plate M5 to carry out photoetching on the back of a low-resistance silicon wafer, using the developed photoresist as a mask to carry out deep reactive ion etching on the low-resistance silicon wafer, etching through the low-resistance silicon wafer, and completing the preparation of the unequal-height comb tooth capacitor 57, wherein the SiO prepared in the step 1.4 is used for preparing the SiO 2 The over-etching of the high-resistance silicon wafer can be prevented;
referring to fig. 5 (b), the processing technology of the glass device layer includes the preparation of a glass cavity 31, and the peeling of metal layer structures such as a plate capacitor plate 32, an internal pad 33, a metal lead 34, an external pad 35, etc., to prepare the glass device layer, three photolithography masks M6 to M7 are required, and the specific processing steps are as follows:
step 2.1: preparing a glass sheet, selecting a 4-inch BF33 glass wafer 61 with the thickness of 500 mu m, and cleaning and drying the glass wafer for subsequent processing;
step 2.2: preparing an alignment mark and a glass cavity, namely preparing a metal mask on one surface of a glass sheet by using a sixth photoetching plate M6, performing wet etching on the glass sheet by using the metal mask as a mask, wherein the etching solution is BOE solution, and the etching depth is controlled to be 5 mu M to obtain a second alignment mark 62 and a glass cavity structure 31 for photoetching alignment and silicon-glass bonding for subsequent metal layer stripping;
step 2.3: photoetching, namely using a seventh photoetching plate M7 to spin-coat a photoresist 63 on the surface of a glass sheet with a cavity structure of 5 microns, and then exposing and developing to obtain a mask pattern for manufacturing a metal layer so as to strip the subsequent metal layer structure;
step 2.4: depositing a metal material, and depositing a Cr/Au two-layer metal material 64 on the surfaces of the photoresist and the glass sheet developed in the step 2.3 by adopting a magnetron sputtering method;
step 2.5: and (3) stripping the metal layer, namely removing the photoresist on the surface of the glass by adopting a wet etching method, and stripping the metal material Cr/Au adhered to the photoresist to obtain metal layer structures such as the flat capacitor electrode plate 32, the internal bonding pad 33, the metal lead 34 and the external bonding pad 35, so as to finish the preparation of the glass device layer wafer 65.
After the silicon device layer wafer and the glass device layer wafer are both prepared, silicon-glass anodic bonding is performed at a temperature of 450 ℃, alignment is performed by using the alignment marks described in step 1.9 and step 2.2, and the silicon device layer wafer and the glass device layer wafer are bonded into an integral wafer 66, as shown in step 3.1 in fig. 5 (c).
After the silicon-glass bonding is completed, an eighth photoetching plate M8 is used for photoetching the surface of the high-resistance silicon wafer of the whole wafer, the developed photoresist is used as a mask, deep reactive ion etching is carried out on the high-resistance silicon wafer, the high-resistance silicon wafer is etched through, the preparation of the load transfer layer structures such as the V-shaped beam 11, the first central rigid body 12 and the cylindrical cavity 13 and the preparation of the whole sensor chip are completed, and in the etching process, siO at the bottom part is formed by the bottom part 2 As a barrier layer, it is possible to prevent over-etching of the comb tooth structure already fabricated on the low-resistance silicon wafer, as shown in step 3.2 in fig. 5 (c).
And (3) scribing the bonded whole wafer by using the scribing mark prepared in the step (1.2) as alignment to obtain a plurality of separated MEMS capacitive six-axis force sensor chips, as shown in FIG. 6.
The sensor chip converts the force or torque to be measured into the displacement or the rotation angle of the first center rigid body 12 through the V-shaped beam 11 of the high-resistance silicon device layer 1, further converts the displacement or the rotation angle of the second center rigid body 23 of the low-resistance silicon device layer 2, detects the displacement mode of the second center rigid body 23 under the action of the force or the torque to be measured through the comb capacitors 22 of the low-resistance silicon device layer 2 and the parallel plate capacitors 32 of the glass device layer 3, finally detects the calculation result of the decoupling formula in the working equation through the capacitor conditioning circuit, and outputs the force or the torque to be measured in six directions.
The decoupling formula comprises six different capacitance operation formulas (1) - (6), so that the cross-axis sensitivity problem and the crosstalk problem of the six-axis force sensor are solved; on one hand, the calculation result of each formula is approximately in a linear relation with the force or the moment in the specific direction, and the calculation results of the formula are hardly influenced by the forces or the moments in other directions, so that the problem of the sensitivity of the crossed shafts of the six-shaft force sensor is well solved; on the other hand, the approximate linear relation between each formula and the stress or the moment cannot be greatly changed due to the action of other forces, so that the crosstalk error of the six-axis force sensor is well inhibited;
the decoupling algorithm formulas (1) to (6) are as follows:
Figure BDA0003430389480000151
Figure BDA0003430389480000152
Figure BDA0003430389480000153
Figure BDA0003430389480000154
Figure BDA0003430389480000155
Figure BDA0003430389480000161
in the formula: c 1 ~C 8 The capacitance value of the capacitance with eight comb teeth on the low-resistance silicon device layer 2, C 9 ~C 12 The capacitance values of the four plate capacitors are obtained; the positions of the eight comb capacitors refer to fig. 3 (a) and 8, and the positions of the four plate capacitors refer to fig. 4 (a) and 8.
The sensor chip is fixedly arranged on the PCB, gold wires are arranged between the sensor chip and corresponding bonding pads on the PCB by a gold wire ball bonding machine, the sensor chip is connected into an external capacitance conditioning circuit, meanwhile, a cylindrical upright post is arranged in a cylindrical cavity at the center of the sensor chip and is fixed by glue, and the upright post plays a role in bearing the force to be measured or the transmission of torque and load; when the sensor chip works, the top end of the upright post is in contact with the outside and transmits the received force or torque to the central rigid body of the sensor chip to cause translation/rotation of the central rigid body, the relative positions of the two pole plates in the eight comb capacitors and the four parallel plate capacitors in the sensor chip are changed simultaneously, and finally, the capacitance operation values in the decoupling formula are output through an external capacitance conditioning circuit, so that the values of six forces or torques in different directions can be obtained, and the detection of six-axis force is realized, as shown in fig. 7.
As shown in FIG. 7, the six-axis force includes a force F in the horizontal plane based on the rectangular spatial coordinate system of the figure x 、F y Sum moment M z Force in vertical plane F z Sum moment M x 、M y . According to symmetry, F x And F y The principle and process of detection are the same, M x And M y The principle and process of detection are the same.
Referring to FIG. 8, horizontal force F x The detection of (2): FIG. 8 (a) shows a force F x When acting on the top end of the upright column, the sectional schematic diagram of the chip structure deformation, the movement distance of the central rigid body along the x axis is delta x, and the comb capacitance C 1 、C 2 、C 3 、C 4 The distance between the polar plates is changed, and the comb tooth capacitance C 5 、C 6 、C 7 、C 8 The overlapping area of the polar plates is changed, and the parallel plate capacitance C is changed 9 、C 10 、C 11 、C 12 The spacing and the overlapping area of the first and second electrodes are kept unchanged, and are detected by a conditioning circuit
Figure BDA0003430389480000162
Figure BDA0003430389480000163
To F can be realized x The measurement of (2).
Horizontal moment M z Detection of (2): FIG. 8 (b) shows the moment M z Plane indication of chip structure deformation when acting on top of upright postIntention, rotation angle θ of the central rigid body about the z-axis z Comb capacitors C 1 、C 4 、C 5 、C 8 The capacitance value of the two electrode plates close to each other is increased, and the comb capacitor C 2 、C 3 、C 6 、C 7 The capacitance value of the two polar plates which are far away from each other is reduced, and the parallel plate capacitor C 9 、C 10 、C 11 、C 12 The spacing and the overlapping area of the two parts are kept unchanged and detected by a conditioning circuit
Figure BDA0003430389480000171
To M can be realized z Is measured.
Vertical force F z Detection of (2): FIG. 8 (c) shows a force F z When acting on the top end of the upright column, the sectional schematic diagram of the chip structure deformation, the movement distance delta z of the central rigid body along the z axis, and the comb capacitance C 1 、C 2 、C 3 、C 4 、C 5 、C 6 、C 7 、C 8 The space between the polar plates and the overlapping area are kept unchanged, and the parallel plate capacitor C 9 、C 10 、C 11 、C 12 Is detected by a conditioning circuit
Figure BDA0003430389480000172
Can realize the pair F z Is measured.
Vertical moment M y Detection of (2): FIG. 8 (d) shows the moment M y When acting on the top of the upright column, the chip structure is deformed, and the central rigid body rotates around the y-axis by a rotation angle theta y Comb capacitors C 1 、C 2 、C 3 、C 4 、C 5 、C 6 、C 7 、C 8 The space between the polar plates is kept unchanged, the variation of the overlapping area is very small and can be almost ignored, and the parallel plate capacitor C 9 、C 11 The capacitance value of the two polar plates which are far away from each other is reduced, and the parallel plate capacitor C 10 、C 12 The capacitance value of the two adjacent polar plates is increased and detected by a conditioning circuit
Figure BDA0003430389480000173
To M can be realized y The measurement of (2).
Horizontal force F y Detection principle of (1) and F x Similar to the detection process, capacitance equation
Figure BDA0003430389480000174
Numerical value of (A) reflects F y The size of (d); vertical moment M x Detection principle and M y Similar to the detection process, capacitance equation
Figure BDA0003430389480000175
Figure BDA0003430389480000176
The value of (A) reflects M x Of (c) is used.

Claims (7)

1. The MEMS capacitive six-axis force sensor chip is characterized in that: the silicon-glass-silicon-based high-resistance device comprises a high-resistance silicon device layer (1), a low-resistance silicon device layer (2) and a glass device layer (3) which are arranged from top to bottom, and a sandwich structure is formed by silicon-silicon bonding and silicon-glass bonding;
the high-resistance silicon device layer (1) comprises a first central rigid body (12), the outer side of the first central rigid body (12) is connected with a peripheral frame through a V-shaped beam (11) in an annular array, and a cylindrical cavity (13) is arranged inside the first central rigid body (12);
the low-resistance silicon device layer (2) comprises a second central rigid body (23), comb capacitors (22) are formed on the periphery of the second central rigid body (23) and the electrodes (21), and four corners of the second central rigid body (23) are connected with the electrodes (21) through Z-shaped beams (25);
the electrodes (21) comprise fixed pole plate electrodes of eight comb capacitors and four movable pole plate electrodes which are mutually connected with the second central rigid body (23); the comb capacitors (22) are eight in number, the eight comb capacitors (22) are arranged in an axial symmetry or central symmetry manner, each comb capacitor (22) is composed of a movable polar plate (222) and a fixed polar plate (221), the movable polar plates (222) are correspondingly connected with electrodes on the periphery of the sensor chip, the fixed polar plates (221) are connected with the second central rigid body (23), the height of the fixed polar plates (221) is larger than that of the movable polar plates (222), and the comb capacitors (22) can convert the displacement or rotation angle of the second central rigid body (23) into the change of capacitance value; the second central rigid body (23) is bonded with the first central rigid body (12) of the high-resistance silicon device layer (1) into a whole on one hand, and is used as a common electrode of a comb capacitance movable polar plate on the other hand;
the glass device layer (3) comprises a glass substrate, an inner glass cavity and an outer glass cavity (31) are arranged on the glass substrate, a flat capacitor plate (32) is arranged in the inner glass cavity (31), an outer bonding pad (35) is arranged in the outer glass cavity (31), an inner bonding pad (33) is arranged on the glass substrate between the inner glass cavity and the outer glass cavity (31), and a metal lead (34) is connected between the inner bonding pad (33) and the outer bonding pad (35);
the flat capacitor plates (32) are four square metal plates and are arranged on the surface of the glass cavity (31) in a central symmetry manner, and form four parallel plate capacitors with the second central rigid body (23) of the low-resistance silicon device layer (2); the internal bonding pads (33) comprise eight internal bonding pads which are contacted with the comb teeth fixed electrode plate electrodes and four internal bonding pads which are contacted with the comb teeth movable electrode plate electrodes, and each internal bonding pad (33) is electrically interconnected and communicated with the electrode (21) corresponding to the low-resistance silicon device layer (2).
2. A MEMS capacitive hexa-axial force sensor chip as claimed in claim 1, wherein: the array number in the V-shaped beam (11) of the annular array is N, a single V-shaped beam (11) is formed by connecting two straight beams with the lengths of L1 and L2 and the widths of W at an angle theta, one end of the V-shaped beam (11) is fixed on a first central rigid body (12), the other end of the V-shaped beam is fixedly supported on a peripheral frame, a force or a moment to be measured is converted into a translational displacement or a rotation angle of the first central rigid body (12), the rigidity value of the V-shaped beam is changed through the optimized design of parameters such as N, L1, L2, W and theta, and the detection range of a sensor chip is adjusted to meet the design requirement.
3. A MEMS capacitive hexa-axial force sensor chip as claimed in claim 1, wherein: the Z-shaped beam (25) is formed by connecting three sections of straight beams at a certain angle, and has the characteristic of low rigidity.
4. A MEMS capacitive hexa-axial force sensor chip as claimed in claim 1, wherein: the depth of the glass cavity (31) is the distance between the designed parallel plate capacitors, and the depth is accurately controlled by a wet etching process.
5. A MEMS capacitive hexa-axial force sensor chip as claimed in claim 1, wherein: the external bonding pad (35) is of a square structure, and the external bonding pad (35) is connected with a bonding pad on an external PCB (printed circuit board) by using a gold wire bonding technology, namely, the sensor chip is connected into an external circuit.
6. The process for preparing a MEMS capacitive six-axis force sensor chip of claim 1, wherein: the method comprises the steps of processing a silicon device layer, processing a glass device layer, silicon-glass bonding and scribing;
the processing technology of the silicon device layer comprises the following specific steps:
step 1.1: preparing a high-resistance silicon wafer, and selecting a monocrystalline silicon wafer with the resistivity of 10000 omega cm;
step 1.2: preparing an alignment mark and a scribing mark, photoetching one surface of a high-resistance silicon wafer, carrying out dry etching on the high-resistance silicon wafer by using the developed photoresist as a mask to obtain a first alignment mark and a scribing mark, and defining the surface as the front surface of the high-resistance silicon wafer;
step 1.3: preparing a back cavity structure, photoetching the back of the high-resistance silicon wafer, and carrying out dry etching on the high-resistance silicon wafer by using the developed photoresist as a mask to obtain the cavity structure for providing a motion space for the load transfer structure;
step 1.4: siO 2 2 Preparing a layer, growing a layer of SiO on the back of the high-resistance silicon wafer by thermal oxidation 2 As a barrier layer for subsequent deep etching;
step 1.5: preparing a low-resistance silicon wafer, namely preparing a monocrystalline silicon wafer with the resistivity of 0.002-0.004 omega cm;
step 1.6: preparing a front cavity of the front alignment mark and the low comb tooth area, photoetching one surface of a low-resistance silicon wafer, defining the surface as the front surface of the low-resistance silicon wafer, and performing dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask to obtain a front cavity structure of the position area where the front alignment mark and the low comb tooth are located;
step 1.7: silicon-silicon bonding, namely aligning through the alignment marks prepared in the step 1.2 and the step 1.6, and bonding the low-resistance silicon wafer and the low-resistance silicon wafer into a whole to obtain a silicon device layer whole wafer;
step 1.8: thinning and polishing, namely thinning the low-resistance silicon wafer of the whole wafer of the silicon device layer to the designed thickness and polishing;
step 1.9: preparing a back side alignment mark and a low comb tooth area back cavity, photoetching the surface of a low-resistance silicon wafer of the whole wafer of a silicon device layer, and carrying out dry etching on the low-resistance silicon wafer by using the developed photoresist as a mask to obtain a back side cavity structure of a position area where the back side alignment mark and the low comb tooth are located;
step 1.10: preparing a comb tooth layer structure, photoetching the back of a low-resistance silicon wafer, carrying out deep reactive ion etching on the low-resistance silicon wafer by using the developed photoresist as a mask, etching through the low-resistance silicon wafer to complete the preparation of unequal-height comb tooth capacitors, and preparing the SiO with the step 1.4 2 Preventing over-etching of the high-resistance silicon wafer;
the processing technology of the glass device layer comprises the following specific steps:
step 2.1: preparing a glass sheet, and selecting a BF33 glass wafer;
step 2.2: preparing an alignment mark and a glass cavity, preparing a metal mask on one surface of a glass sheet, and performing wet etching on the glass sheet by using the metal mask to obtain a second alignment mark and a glass cavity structure;
step 2.3: photoetching, namely spin-coating photoresist on the surface of a glass sheet with a cavity structure, and then performing exposure and development to obtain a mask pattern for manufacturing a metal layer;
step 2.4: depositing a metal material, and depositing the metal material on the surfaces of the photoresist and the glass sheet after the development in the step 2.3;
step 2.5: stripping the metal layer, namely removing the photoresist on the surface of the glass, and simultaneously stripping the metal material attached to the photoresist to obtain metal layer structures such as a flat capacitor plate (32), an internal bonding pad (33), a metal lead (34), an external bonding pad (35) and the like, so as to finish the preparation of the glass device layer structure;
after the silicon device layer wafer and the glass device layer wafer are both prepared, the alignment marks in the steps 1.9 and 2.2 are utilized for alignment, and the silicon device layer wafer and the glass device layer wafer are bonded into a whole; after the silicon-glass bonding is finished, photoetching is carried out on the surface of the high-resistance silicon wafer of the whole wafer, the developed photoresist is used as a mask, deep reactive ion etching is carried out on the high-resistance silicon wafer, the high-resistance silicon wafer is etched through, and the preparation of the load transmission structure of the V-shaped beam (11), the first central rigid body (12) and the cylindrical cavity (13) and the preparation of the whole sensor chip are finished;
and (3) scribing the bonded whole wafer by using the scribing mark prepared in the step (1.2) as an alignment mark to obtain a plurality of separated MEMS capacitive six-axis force sensor chips.
7. A MEMS capacitive hexa-axial force sensor chip as claimed in claim 1, wherein: the sensor chip converts the force or torque to be measured into the displacement or the corner of a first central rigid body (12) through a V-shaped beam (11) of a high-resistance silicon device layer (1), further converts the displacement or the corner of a second central rigid body (23) of a low-resistance silicon device layer (2), detects the displacement mode of the second central rigid body (23) under the action of the force or the torque to be measured through comb capacitors (22) of the low-resistance silicon device layer (2) and parallel plate capacitors formed by the second central rigid body 23 and a flat capacitor plate (32) of a glass device layer (3), and finally detects decoupling calculation results of a working equation through a capacitance conditioning circuit to output the force or the torque to be measured in six directions;
the decoupling equations (1) to (6) are as follows:
Figure FDA0003430389470000051
Figure FDA0003430389470000052
Figure FDA0003430389470000053
Figure FDA0003430389470000054
Figure FDA0003430389470000055
Figure FDA0003430389470000056
in the formula: c 1 ~C 8 Is the capacitance value, C, of the eight comb capacitors (22) on the low-resistance silicon device layer (2) 9 ~C 12 The capacitance value of the four plate capacitors (32); the eight comb capacitors are arranged in mirror symmetry and central symmetry around the second central rigid body (23), and the four flat capacitors are arranged in central symmetry around the central point of the glass device layer (3).
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