CN114237496A - Method and device for optimizing memory read-write efficiency of multi-channel system and computer equipment - Google Patents

Method and device for optimizing memory read-write efficiency of multi-channel system and computer equipment Download PDF

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CN114237496A
CN114237496A CN202111447007.4A CN202111447007A CN114237496A CN 114237496 A CN114237496 A CN 114237496A CN 202111447007 A CN202111447007 A CN 202111447007A CN 114237496 A CN114237496 A CN 114237496A
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CN114237496B (en
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蔡志恺
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements

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Abstract

The application relates to a method and a device for optimizing memory read-write efficiency of a multi-channel system and computer equipment. The method comprises the following steps: acquiring a first bandwidth requirement of the subunit module in a system memory channel correspondingly arranged with the subunit module and dynamic parameters of a memory controller; adjusting and optimizing dynamic parameters of the memory controller based on the first bandwidth requirement to obtain first set parameters; acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged on the subunit module based on the first setting parameter; and comparing and determining that the second bandwidth result meets the first bandwidth requirement so as to optimize the read-write efficiency of the memory of the multi-channel system. By adopting the method, before the system runs, the read-write efficiency of the subunit modules with different parameters in any system memory channel can be effectively evaluated, and the optimal read-write performance of any system memory channel and the optimal read-write efficiency of the whole system memory are ensured to the greatest extent.

Description

Method and device for optimizing memory read-write efficiency of multi-channel system and computer equipment
Technical Field
The present application relates to the field of memory optimization technologies, and in particular, to a method, an apparatus, and a computer device for optimizing read/write performance of a multi-channel system memory.
Background
Most ASIC or FPGA devices have a multi-channel DDR memory controller, so that the sub-unit modules of the ASIC or FPGA can share a set of physical DDR memory in time. In the prior art, in order to meet the requirement of improving the read/write performance of the system memory, one of the following two methods is usually adopted: firstly, the read-write speed of the DDR memory of the entity is improved; the other is a DDR memory with the addition of a second set of entities.
However, both of these approaches result in increased cost and require modification of the already formed circuit. Moreover, if the requirement for improving the read/write performance of the system memory is met by increasing the read/write speed of the Double-Rate SDRAM (DDR SDRAM for short), the optimization cannot be performed according to the specific use condition of the read/write performance and the read/write bandwidth of each channel of the system memory. If the bandwidth performance requirement of any subunit module is not known in advance, the requirement for improving the read-write performance of the system memory is achieved directly by adding the second group of entity DDR memories, which causes resource waste. Such as: the requirement of a subunit module on channel 1 is 5 seconds apart, and there is a large data requirement. But the other subunit module needs continuous reading and writing in the channel 2, but only needs a small amount of data. Under the condition that the read-write efficiency of any subunit module in the channel is not known in advance, the resource waste is easily caused.
Therefore, it is desirable to provide a method, system and computer device for optimizing the read/write performance of a multi-channel system memory, which can evaluate the optimal read/write performance of the entire system memory.
Disclosure of Invention
In view of the above, it is necessary to provide a method, an apparatus and a computer device for optimizing the read/write performance of a multi-channel system memory, which can dynamically adjust the dynamic parameters of a memory controller in each channel, and achieve the purpose of evaluating and optimizing the read/write performance of any system memory channel and the read/write performance of the whole system memory in advance.
In one aspect, a method for optimizing memory read/write performance of a multi-channel system is provided, which includes: step S1, acquiring a first bandwidth requirement of the subunit module in the system memory channel corresponding to the subunit module and a dynamic parameter of the memory controller; step S2, adjusting and optimizing the dynamic parameter of the memory controller based on the first bandwidth requirement, to obtain a first setting parameter; step S3, based on the first setting parameter, obtaining a second bandwidth result of the subunit module in the system memory channel corresponding to the subunit module; and step S4, comparing and determining that the second bandwidth result meets the first bandwidth requirement, so as to optimize the read-write performance of the memory of the multi-channel system.
In one embodiment, the step S2 and the step S3 include: step S11, selecting corresponding data read-write operation based on the data read-write scene; wherein, the data read-write scene comprises: a data write scenario and a data read scenario; the data read-write operation comprises the following steps: data write operations and data read operations.
In one embodiment, the step S3 includes: and acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged according to the data read-write operation and the first setting parameter.
In one embodiment, the step S4 includes: step S41, if the second bandwidth result does not satisfy the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, executing step S42, otherwise, determining that the read-write performance optimization of the system memory channel is completed; and step S42, judging whether the dynamic parameters are all adjusted and optimized, if the dynamic parameters which are not adjusted and optimized exist, executing steps S2 and S3, and obtaining the first setting parameter and the second bandwidth result again.
In one embodiment, the dynamic parameters include: the number of data continuous reading and writing, the number of data continuous reading and writing and a refreshing rule; wherein the refresh rule comprises: manual refresh and auto refresh.
In one embodiment, the dynamic parameters include: the number of continuous read-write, the number of continuous read-write and a refreshing rule; wherein the refresh rule comprises: manual refresh and auto refresh.
In one embodiment, the first bandwidth requirement comprises a first data write bandwidth requirement and a first data read bandwidth requirement; the second bandwidth result includes a second data write bandwidth requirement and a second data read bandwidth requirement.
In one embodiment, the second bandwidth result is: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
In another aspect, an apparatus for optimizing read/write performance of a multi-channel system memory is provided, the apparatus comprising: the information acquisition module is used for acquiring a first bandwidth requirement of the subunit module in a system memory channel which is correspondingly arranged with the subunit module and dynamic parameters of a memory controller; the dynamic parameter adjusting module is mutually connected with the memory controller and used for adjusting and optimizing dynamic parameters of the memory controller to obtain a first setting parameter; the bandwidth calculation module is in interactive connection with the dynamic parameter adjustment module and is used for calculating a second bandwidth result of the subunit module in a system memory channel correspondingly arranged on the subunit module based on the first set parameter; and the bandwidth comparison module is respectively in interactive connection with the information acquisition module and the bandwidth calculation module and is used for acquiring the first bandwidth requirement and the second bandwidth result, comparing the second bandwidth result with the first bandwidth requirement and determining an optimized result of the read-write efficiency of the system memory channel.
In one embodiment, the apparatus further comprises: the data reading and writing scene judging module is in communication connection with the bandwidth calculating module and is used for judging the current data reading and writing scene; if the data reading and writing scene is a data reading scene, selecting corresponding data reading operation; and if the data read-write scene is a data write scene, selecting corresponding data write operation.
In another aspect, a computer device is provided, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor implements the following steps when executing the computer program: step S1, acquiring a first bandwidth requirement of the subunit module in the system memory channel corresponding to the subunit module and a dynamic parameter of the memory controller; step S2, adjusting and optimizing the dynamic parameter of the memory controller based on the first bandwidth requirement, to obtain a first setting parameter; step S3, based on the first setting parameter, obtaining a second bandwidth result of the subunit module in the system memory channel corresponding to the subunit module; and step S4, comparing and determining that the second bandwidth result meets the first bandwidth requirement, so as to optimize the read-write performance of the memory of the multi-channel system. Wherein the dynamic parameters include: the number of continuous read-write, the number of continuous read-write and a refreshing rule; the refresh rule includes: manual refresh and automatic refresh; the first bandwidth requirement comprises a first data write bandwidth requirement and a first data read bandwidth requirement; the second bandwidth result includes a second data write bandwidth requirement and a second data read bandwidth requirement.
In one embodiment, the processor, when executing the computer program, performs the steps of: step S11, selecting corresponding data read-write operation based on the data read-write scene; wherein, the data read-write scene comprises: a data write scenario and a data read scenario; the data read-write operation comprises the following steps: data write operations and data read operations.
In one embodiment, the processor, when executing the computer program, performs the steps of: acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged according to the data read-write operation and the first setting parameter; wherein the second bandwidth result is: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
In one embodiment, the processor, when executing the computer program, performs the steps of: step S41, if the second bandwidth result does not meet the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, determining whether the dynamic parameters are all adjusted and optimized; step S42, if there is dynamic parameter which is not adjusted and optimized, executing steps S2 and S3 to obtain the first setting parameter and the second bandwidth result again; step S43, if the second bandwidth result meets the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, determining that the read-write performance optimization of the system memory channel is completed.
According to the method, the device and the computer equipment for optimizing the read-write efficiency of the multi-channel system memory, the first bandwidth requirement of the subunit module in the system memory channel correspondingly arranged with the subunit module and the dynamic parameters of the memory controller are obtained; adjusting and optimizing dynamic parameters of the memory controller to obtain a first set parameter; according to the bandwidth requirement of any subunit module in the system memory channel corresponding to the subunit module, dynamically adjusting the dynamic parameters of the memory controller in any channel, determining that the bandwidth requirements of any subunit module and the system memory channel are met, and optimizing the read-write efficiency of the system memory channel. Before the system runs, the read-write efficiency of the subunit modules with different parameters in any system memory channel can be effectively evaluated, and the optimal read-write efficiency of any system memory channel and the overall system memory and the optimal read-write efficiency of the overall system memory can be realized to the greatest extent.
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FIG. 1 is a flow diagram illustrating a method for optimizing read/write performance of a multi-channel system memory according to one embodiment;
FIG. 2 is a diagram of an exemplary embodiment of a method for optimizing read and write performance in a multi-channel system memory;
FIG. 3 is a flow diagram illustrating a method for optimizing read/write performance of a multi-channel system memory according to one embodiment;
FIG. 4 is a block diagram of an apparatus for optimizing read/write performance in a multi-channel system memory according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Example one
The present application provides a method for optimizing the read/write performance of a multi-channel system memory, as shown in fig. 1, which can be applied to the application environment shown in fig. 2, and the method includes:
step S1, setting a performance bandwidth requirement value of the subunit module in the system memory channel corresponding to the subunit module, where the performance bandwidth requirement value is the first bandwidth requirement of the present application. That is, the subunit modules and the system memory channels have a one-to-one correspondence relationship, that is, the condition for ensuring the normal operation of the subunit modules in the memory channels corresponding to the subunit modules is referred to as a first bandwidth requirement.
And step S2, selecting corresponding data writing operation or data reading operation based on the data reading and writing scene.
Step S3, performing parameter setting according to the adjustable parameter range of the subunit module in the memory channel corresponding to the subunit module, and obtaining a first setting parameter. The first setting parameter is the value of the dynamic parameter for optimizing the memory controller. The specific value of the dynamic parameter is determined by a memory controller disposed in the multi-channel system. Specifically, in practical situations, the dynamic parameters that have been adjusted and optimized may be written into the memory controller and the dynamic parameters written into the memory controller may be secondarily confirmed by the "dynamic parameter data write generator" and the "dynamic parameter data read checker" set in fig. 2. It should be understood that the expressions 1-N in the "dynamic parameter data write generators 1-N" and the "dynamic parameter data read detectors 1-N" shown in FIG. 1 represent different channels. Such as: 1-N indicates that there are N channels. The dynamic parameter data writing generator obtains a first setting parameter according to the adjustable range of the dynamic parameter corresponding to any channel and writes the first setting parameter into the memory controller. The dynamic parameter data read checker performs a second determination on the first setting parameter written by the dynamic parameter data write generator. The dynamic parameters comprise the number of continuous reading and writing, the number of continuous reading and writing and a refreshing rule. The number of continuous read-write numbers and the number of continuous read-write numbers can be adjusted according to the data read-write condition of the subunit modules in the channels corresponding to the subunit modules, the refreshing rule is determined by a system memory controller arranged in the system, and the refreshing rule can be manual refreshing or automatic refreshing. Such as: assume an existing subunit module 1, subunit module 2, and subunit module 3; the subunit module is used as an audio processing module, the requirement on the broadband is only 320 KB/s, the subunit module 2 is used as an image processing module, the requirement on the broadband is higher to be 64MB/s, the subunit module 3 is used as a data compression processing module, and the audio processing module is characterized in that: the bandwidth requirement is instantaneously reached to a maximum of 1024 MB/s. And analyzing the working characteristics and bandwidth requirements of the three subunit modules and then determining: although the requirement for bandwidth is high at the instant of time, this high bandwidth requirement exists only when data compression is performed; the subunit module 1 and the subunit module 2 have high requirements on continuity in the transmission process due to sound and image, and cannot be interrupted in the transmission process, so that the three subunit modules can be debugged as follows: a subunit module 1; and (4) refreshing rules: manual refreshing, number of continuous reading and writing: 1-16, the number of continuous read-write numbers: 1-5; a subunit module 2; and (4) refreshing rules: manual refreshing, number of continuous reading and writing: 32-128, the number of consecutive reads: 5-10; a subunit module 3; and (4) refreshing rules: automatic refresh, number of continuous reads and writes: 128-256, number of consecutive reads: 10 to 20. It should be understood that the above-mentioned adjustment of the dynamic parameters of the subunit modules is only an example, and those skilled in the art can set the dynamic parameters of any subunit module according to actual situations.
Step S4, corresponding to the data write operation or the data read operation and the first setting parameter, the dynamic parameter data bandwidth calculator is started to calculate the bandwidth of any subunit in the channel corresponding to the subunit, and obtain the second bandwidth result.
In one embodiment, the specific process of the dynamic parameter data bandwidth calculator calculating the bandwidth of any subunit in its corresponding channel is as follows: accumulating the data size written/read in the time period to obtain a data accumulated value in a period of time, wherein the data accumulated value and the data read-write quantity are the same concept; calculating to obtain a difference value between the maximum time point and the minimum time point in the time period to obtain a time difference value, wherein the time difference value and the data reading and writing time length in the application are the same concept; and finally, obtaining a result of dividing the accumulated value of the data by the time difference value, namely a data writing/reading bandwidth calculation result, namely the second bandwidth result is as follows: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
Step S5, comparing the obtained second bandwidth result with the first bandwidth requirement, and determining whether the second bandwidth result meets the first bandwidth requirement. Specifically, it may be determined whether the second bandwidth result satisfies the first bandwidth requirement according to the following steps: step S41, if the second bandwidth result does not satisfy the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, executing step S42, otherwise, determining that the read-write performance optimization of the system memory channel is completed; and step S42, judging whether the dynamic parameters are adjusted and optimized, if the dynamic parameters which are not adjusted and optimized exist, executing the steps S3 and S4, and obtaining the first setting parameter and the second bandwidth result again, if the dynamic parameters which are not adjusted and optimized do not exist, namely all the dynamic parameters are adjusted and optimized, realizing the optimization of the memory read-write efficiency of the multi-channel system through manual intervention.
In a specific embodiment, the first bandwidth requirement includes a first data write bandwidth requirement and a first data read bandwidth requirement. The second bandwidth result comprises a second data write bandwidth result and a second data read bandwidth result. And comparing the first data writing bandwidth requirement with the second data writing result, and comparing the first data reading bandwidth requirement with the second data reading result.
It should be understood that the first bandwidth requirement of the system memory channel corresponding to the subunit module described in this application is the theoretical maximum value of the subunit module itself, and the first bandwidth requirement of the subunit module is the requirement that the subunit module can normally operate. The first bandwidth requirement for the subunit module is set by one skilled in the art according to the actual working application scenario.
It is to be understood by those skilled in the art that: fig. 2 shows a dynamic parameter bandwidth calculator, which is used to calculate a second bandwidth result of any subunit module and the system memory channel corresponding to the subunit module. That is, the "bandwidth" shown in fig. 2 is the same as the "bandwidth" described in the present application. The demultiplexer shown in FIG. 2 is used to switch and select the purpose of "dynamic parameter data write generator" and "dynamic parameter data read checker".
Example two
The present application provides a method for optimizing the read-write performance of a multi-channel system memory, as shown in fig. 3, including: step S1, acquiring a first bandwidth requirement of the subunit module in the system memory channel corresponding to the subunit module and a dynamic parameter of the memory controller; step S2, adjusting and optimizing the dynamic parameter of the memory controller based on the first bandwidth requirement, to obtain a first setting parameter; step S3, based on the first setting parameter, obtaining a second bandwidth result of the subunit module in the system memory channel corresponding to the subunit module; and step S4, comparing and determining that the second bandwidth result meets the first bandwidth requirement, so as to optimize the read-write performance of the memory of the multi-channel system.
In one embodiment, between the step S2 and the step S3 includes: step S11, selecting corresponding data read-write operation based on the data read-write scene; wherein, the data read-write scene comprises: a data write scenario and a data read scenario; the data read-write operation comprises the following steps: data write operations and data read operations.
In one embodiment, the step S3 includes: and acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged according to the data read-write operation and the first setting parameter.
In one embodiment, the step S4 includes: step S41, if the second bandwidth result does not satisfy the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, executing step S42, otherwise, determining that the read-write performance optimization of the system memory channel is completed; and step S42, judging whether the dynamic parameters are all adjusted and optimized, if the dynamic parameters which are not adjusted and optimized exist, executing steps S2 and S3, and obtaining the first setting parameter and the second bandwidth result again.
In one embodiment, the dynamic parameters include: the number of data continuous reading and writing, the number of data continuous reading and writing and a refreshing rule; wherein the refresh rule comprises: manual refresh and auto refresh.
In one embodiment, the first bandwidth requirement comprises a first data write bandwidth requirement and a first data read bandwidth requirement; the second bandwidth result includes a second data write bandwidth requirement and a second data read bandwidth requirement.
In one embodiment, the second bandwidth result is: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
In the method, a first bandwidth requirement of any subunit module and a system memory channel arranged corresponding to the subunit module is obtained; adjusting and optimizing dynamic parameters of the memory controller to obtain a first set parameter; according to the bandwidth requirement of any subunit module in the corresponding system memory channel, dynamically adjusting the dynamic parameters of the memory controller in any channel, determining that the bandwidth requirements of any subunit module and the system memory channel are met, and optimizing the read-write efficiency of the system memory channel. Before the system runs, the read-write efficiency of the subunit modules in any system memory channel can be effectively evaluated by different parameters, and the optimal read-write efficiency of any system memory channel and the optimal read-write efficiency of the whole system memory can be realized to the greatest extent.
It should be understood that, although the steps in the flowchart of fig. 1 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 1 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
EXAMPLE III
The present application provides a device for optimizing read/write performance of a multi-channel system memory, as shown in fig. 4, the device includes:
the information acquisition module is used for acquiring a first bandwidth requirement of any subunit module and a system memory channel corresponding to the subunit module and dynamic parameters of a memory controller;
the dynamic parameter adjusting module is in interactive connection with any subunit module and a system memory channel arranged corresponding to the subunit module, and is used for adjusting and optimizing dynamic parameters of the memory controller to obtain first set parameters;
the bandwidth calculation module is in interactive connection with the dynamic parameter adjustment module and is used for calculating a second bandwidth result of any subunit module and a system memory channel correspondingly arranged with the subunit module based on a first set parameter;
and the bandwidth comparison module is respectively in interactive connection with the information acquisition module and the bandwidth calculation module and is used for acquiring a first bandwidth requirement and a second bandwidth result, comparing the second bandwidth result with the first bandwidth requirement and determining an optimized result of the read-write efficiency of the system memory channel.
In one embodiment, the apparatus further comprises: the data reading and writing scene judging module is in communication connection with the bandwidth calculating module and is used for judging the current data reading and writing scene; if the data reading and writing scene is a data reading scene, selecting corresponding data reading operation; and if the data read-write scene is a data write scene, selecting corresponding data write operation.
For specific limitations of the apparatus for optimizing the read/write performance of the multi-channel system memory, reference may be made to the above limitations of the method for optimizing the read/write performance of the multi-channel system memory, which are not described herein again. All or part of each module in the device for optimizing the read-write performance of the multi-channel system memory can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
Those skilled in the art will appreciate that the architecture shown in fig. 4 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
Example four
In one embodiment, a computer device is provided, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program: step S1, acquiring a first bandwidth requirement of the subunit module in the system memory channel corresponding to the subunit module and a dynamic parameter of the memory controller; step S2, adjusting and optimizing the dynamic parameter of the memory controller based on the first bandwidth requirement, to obtain a first setting parameter; step S3, based on the first setting parameter, obtaining a second bandwidth result of the subunit module in the system memory channel corresponding to the subunit module; step S4, comparing and determining that the second bandwidth result meets the first bandwidth requirement, so as to optimize the read-write performance of the memory of the multi-channel system; wherein the dynamic parameters include: the number of data continuous reading and writing, the number of data continuous reading and writing and a refreshing rule; the refresh rule includes: manual refresh and automatic refresh; the first bandwidth requirement comprises a first data write bandwidth requirement and a first data read bandwidth requirement.
In one embodiment, the processor, when executing the computer program, further performs the steps of: the steps S2 and S3 include: step S11, selecting corresponding data read-write operation based on the data read-write scene; wherein, the data read-write scene comprises: a data write scenario and a data read scenario; the data read-write operation comprises the following steps: data write operations and data read operations.
In one embodiment, the processor, when executing the computer program, further performs the steps of: acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged according to the data read-write operation and the first setting parameter; wherein the second bandwidth result comprises a second data write bandwidth requirement and a second data read bandwidth requirement; the second bandwidth result is: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
In one embodiment, the processor, when executing the computer program, further performs the steps of: step S41, if the second bandwidth result does not satisfy the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, executing step S42, otherwise, determining that the read-write performance optimization of the system memory channel is completed; and step S42, judging whether the dynamic parameters are all adjusted and optimized, if the dynamic parameters which are not adjusted and optimized exist, executing steps S2 and S3, and obtaining the first setting parameter and the second bandwidth result again.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A method for optimizing memory read/write performance of a multi-channel system, comprising:
step S1, acquiring a first bandwidth requirement of the subunit module in the system memory channel corresponding to the subunit module and a dynamic parameter of the memory controller;
step S2, adjusting and optimizing the dynamic parameter of the memory controller based on the first bandwidth requirement, to obtain a first setting parameter;
step S3, based on the first setting parameter, obtaining a second bandwidth result of the subunit module in the system memory channel corresponding to the subunit module;
and step S4, comparing and determining that the second bandwidth result meets the first bandwidth requirement, so as to optimize the read-write performance of the memory of the multi-channel system.
2. The method of claim 1, wherein the steps S2 and S3 include:
step S11, selecting corresponding data read-write operation based on the data read-write scene;
wherein the content of the first and second substances,
the data read-write scene comprises: a data write scenario and a data read scenario;
the data read-write operation comprises the following steps: data write operations and data read operations.
3. The method of claim 2, wherein the step S3 includes:
and acquiring a second bandwidth result of the subunit module in a system memory channel correspondingly arranged according to the data read-write operation and the first setting parameter.
4. The method of claim 2, wherein the step S4 includes:
step S41, if the second bandwidth result does not satisfy the first bandwidth requirement of the subunit module in the system memory channel set corresponding to the subunit module, executing step S42, otherwise, determining that the read-write performance optimization of the system memory channel is completed;
and step S42, judging whether the dynamic parameters are all adjusted and optimized, if the dynamic parameters which are not adjusted and optimized exist, executing steps S2 and S3, and obtaining the first setting parameter and the second bandwidth result again.
5. The method of claim 1, wherein the dynamic parameters comprise: the number of data continuous reading and writing, the number of data continuous reading and writing and a refreshing rule; wherein the refresh rule comprises: manual refresh and auto refresh.
6. The method of claim 1, wherein the memory access performance of the multi-channel system is optimized,
the first bandwidth requirement comprises a first data write bandwidth requirement and a first data read bandwidth requirement;
the second bandwidth result includes a second data write bandwidth requirement and a second data read bandwidth requirement.
7. The method of claim 3, wherein the second bandwidth result is: and dividing the data read-write quantity of the data read-write operation by the data read-write time length of the data read-write operation to obtain a quotient.
8. An apparatus for optimizing read and write performance of a multi-channel system memory, the apparatus comprising:
the information acquisition module is used for acquiring a first bandwidth requirement of the subunit module in a system memory channel which is correspondingly arranged with the subunit module and dynamic parameters of a memory controller;
the dynamic parameter adjusting module is mutually connected with the memory controller and used for adjusting and optimizing dynamic parameters of the memory controller to obtain a first setting parameter;
the bandwidth calculation module is in interactive connection with the dynamic parameter adjustment module and is used for calculating a second bandwidth result of the subunit module in a system memory channel correspondingly arranged on the subunit module based on the first set parameter;
and the bandwidth comparison module is respectively in interactive connection with the information acquisition module and the bandwidth calculation module and is used for acquiring the first bandwidth requirement and the second bandwidth result, comparing the second bandwidth result with the first bandwidth requirement and determining an optimized result of the read-write efficiency of the system memory channel.
9. The apparatus for optimizing memory read/write performance of a multi-channel system as claimed in claim 8, further comprising:
the data reading and writing scene judging module is in communication connection with the bandwidth calculating module and is used for judging the current data reading and writing scene; if the data reading and writing scene is a data reading scene, selecting corresponding data reading operation; and if the data read-write scene is a data write scene, selecting corresponding data write operation.
10. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 7 are implemented when the computer program is executed by the processor.
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