CN110750215A - Method and device for improving random reading performance of solid state disk and computer equipment - Google Patents
Method and device for improving random reading performance of solid state disk and computer equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The application relates to a method and a device for improving random reading performance of a solid state disk, computer equipment and a storage medium, wherein the method comprises the following steps: acquiring a request for improving the random reading performance of the solid state disk; writing the corresponding host data into dram of the SSD according to the request; when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data; if the data to be written is random read data, writing the data to be written into an SLC cache; and if the data to be written is the sequential read data, writing the data to be written into a TLC/QLC area. The method utilizes the advantages of the SLC cache in the random reading performance to write the data which can be read out randomly into the SLC cache, thereby effectively improving the random reading performance of the solid state disk with the SLC cache.
Description
Technical Field
The invention relates to the technical field of solid state disks, in particular to a method and a device for improving the random reading performance of a solid state disk, computer equipment and a storage medium.
Background
Currently, in the design of the existing TLC/QLC SSD solid state disk, a part of TLC/QLC blocks is usually converted into SLC block for accelerating the partial read/write performance, where the SLC block has a small improvement on the continuous performance of the logical address (LPA) of the sequential read-while-read command compared with the TLC/QLC block, and has a large improvement on the discontinuous performance of the logical address (LPA) of the random read-while-read command.
In the traditional technology, the current SSD with SLC CACHE mainly utilizes the advantages of SLC CACHE in writing performance, but does not utilize the advantages of SLC CACHE in improving random reading performance, the host writes data into SLC CACHE preferentially and then writes data into TLC/QLC, and the method does not check the model of host data writing, so that the advantages of SLC CACHE in random reading performance cannot be utilized.
Disclosure of Invention
Therefore, it is necessary to provide a method, an apparatus, a computer device, and a storage medium for improving the random reading performance of a solid state disk, in order to solve the above technical problems.
A method for improving random reading performance of a solid state disk comprises the following steps:
acquiring a request for improving the random reading performance of the solid state disk;
writing the corresponding host data into dram of the SSD according to the request;
when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data;
if the data to be written is random read data, writing the data to be written into an SLC cache;
and if the data to be written is the sequential read data, writing the data to be written into a TLC/QLC area.
In one embodiment, the step of determining whether the data to be written is random read data or sequential read data further includes:
judging the random reading and the sequential reading data through a data detection model;
if the LPA information of the data to be written is continuous, judging that the data to be written is to be read and read sequentially;
and if the LPA information of the data to be written is discontinuous, judging that the data to be written is to be read and read randomly.
In one embodiment, the step of writing the corresponding host data into the dram of the SSD according to the request further includes:
when the data is written into the dram, reading the LPA information corresponding to the written data;
and sorting the written data according to the LPA information, and counting the data of the connected LPAs.
In one embodiment, the method further comprises:
when data are written into the NAND, judging whether the number of the connected LPAs in the data to be written reaches a capacity threshold value;
and if the capacity threshold is reached, writing the data to be written into a TLC/QLC area, otherwise, writing the data to be written into an SLC cache.
An apparatus for improving random read performance of a solid state disk, the apparatus comprising:
the acquisition module is used for acquiring a request for improving the random reading performance of the solid state disk;
the first writing module is used for writing the corresponding host data into dram of the SSD in advance according to the request;
the judging module is used for judging whether the data to be written is random read data or sequential read data when the data in the dram needs to be written into the NAND;
the second write-in module is used for writing the data to be written into the SLC cache if the data to be written is random read data;
and the third writing module is used for writing the data to be written into a TLC/QLC area if the data to be written is sequential read data.
In one embodiment, the determining module is further configured to:
judging the random reading and the sequential reading data through a data detection model;
if the LPA information of the data to be written is continuous, judging that the data to be written is to be read and read sequentially;
and if the LPA information of the data to be written is discontinuous, judging that the data to be written is to be read and read randomly.
In one embodiment, the apparatus further comprises:
the reading module is used for reading the LPA information corresponding to the written data when the data is written into the dram;
and the data statistics module is used for sorting the written data according to the LPA information and counting the data of the connected LPAs.
In one embodiment, the determining module is further configured to:
when data are written into the NAND, judging whether the number of the connected LPAs in the data to be written reaches a capacity threshold value; and if the capacity threshold is reached, writing the data to be written into a TLC/QLC area, otherwise, writing the data to be written into an SLC cache.
A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any of the above methods when executing the computer program.
A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of any of the methods described above.
According to the method and the device for improving the random reading performance of the solid state disk, the computer equipment and the storage medium, the request for improving the random reading performance of the solid state disk is obtained; writing the corresponding host data into dram of the SSD according to the request; when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data; if the data to be written is random read data, writing the data to be written into an SLC cache; and if the data to be written is the sequential read data, writing the data to be written into a TLC/QLC area. The method utilizes the advantages of the SLC cache in the random reading performance to write the data which can be read out randomly into the SLC cache, thereby effectively improving the random reading performance of the solid state disk with the SLC cache.
Drawings
FIG. 1 is a write flow diagram of an SSD write model in the normal mode;
FIG. 2 is a flowchart illustrating a method for improving random read performance of a solid state drive according to an embodiment;
FIG. 3 is a flowchart illustrating a method for improving random read performance of a solid state drive according to another embodiment;
FIG. 4 is a flowchart illustrating a method for improving random read performance of a solid state drive according to yet another embodiment;
FIG. 5 is a write flow diagram for improving HOST random read performance in one embodiment;
FIG. 6 is a block diagram illustrating an embodiment of an apparatus for improving random read performance of a solid state drive;
FIG. 7 is a block diagram of an apparatus for improving the random read performance of a solid state disk in another embodiment;
FIG. 8 is a diagram illustrating an internal structure of a computer device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Currently, a general implementation of a solid-state storage device with RAID functionality is shown in fig. 1. Specifically, in a general mode, data is written into an SSD model, when host data is written into the SSD, dram space in the SSD is stored first, and when a certain time is out, or after the dram space is full, host data in dram is written into NAND FLASH, when NANDFLASH is written, if SLC CACHE space is empty, SLC area is written, otherwise TLC/QLC area is written. When the host is idle, the SSD will move the data in the SLC cache to TLC/QLC internally. This approach does not examine the model of host data writes, resulting in an inability to take advantage of the SLC cache's random read performance.
Based on this, the invention provides a method for improving the random reading performance of a solid state disk, and the method is expected to solve the technical problems.
In an embodiment, as shown in fig. 2, a method for improving random read performance of a solid state disk is provided, where the method includes:
step 202, obtaining a request for improving the random reading performance of the solid state disk;
step 204, writing the corresponding host data into dram of the SSD according to the request;
step 206, when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data;
step 208, if the data to be written is random read data, writing the data to be written into the SLC cache;
and step 210, if the data to be written is sequential read data, writing the data to be written into a TLC/QLC area.
Specifically, reference may be made to the write flow diagram of fig. 5 for improving HOST random read performance. In this embodiment, a request for improving the random read performance of the solid state disk is first obtained. And then, when the host writes, the host data in the dram is written into the dram firstly, when the host data in the dram needs to be written into NAND FLASH, the data is written into the TLC through module detection of data model detection if the data is judged to be sequentially read, and the data is written into the SLC cache if the data is judged to be randomly read. Therefore, the data to be read randomly can be ensured to be written into the SLC cache, and the random reading performance can be improved by utilizing the SLC cache.
In an embodiment, as shown in fig. 3, a method for improving random read performance of a solid state disk is provided, where the step of determining whether data to be written is random read data or sequential read data further includes:
step 302, judging random reading and sequential reading data through a data detection model;
step 304, if the LPA information of the data to be written is continuous, determining that the data to be written will be read and read sequentially;
in step 306, if the LPA information of the data to be written is discontinuous, it is determined that the data to be written will be read out randomly.
Specifically, the judgment of the data detection model for random reading and sequential reading is mainly distinguished based on whether the LPA of the written data is continuous, if the LPA information of the written data is continuous, the written data is considered to be read sequentially, and if the LPA information of the written data is discontinuous, the written data is considered to be read randomly.
In the embodiment, the random reading performance request of the solid state disk is obtained; writing the corresponding host data into dram of the SSD according to the request; when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data; if the data to be written is random read data, writing the data to be written into the SLC cache; and if the data to be written is the sequential read data, writing the data to be written into the TLC/QLC area. In the scheme, the advantages of the SLC cache on the random reading performance are utilized, whether the data will be read randomly or sequentially in the future is judged according to the LPA of the data written in by the host, and the data which can be read randomly are written in the SLC cache, so that the random reading performance of the solid state disk with the SLC cache is effectively improved.
In an embodiment, as shown in fig. 4, a method for improving random read performance of a solid state disk is provided, where the method further includes:
step 402, reading the LPA information corresponding to the written data when the data is written into the dram;
step 404, sorting the written data according to the LPA information, and counting the connected LPA data;
and step 408, writing the data to be written into a TLC/QLC area if the capacity threshold is reached, otherwise writing the data to be written into an SLC cache.
Specifically, the specific implementation manner for implementing the judgment of the data detection model on the random reading and the sequential reading data is provided in this embodiment as follows:
firstly, when the written data is stored in the dram, the data is sorted according to the LPA, and the data of the connected LPAs is counted.
Then, when writing NAND, if the number of connected LPAs reaches the capacity threshold M, it can be understood that M is set according to the actual situation, for example: which can be set to 1MB in general, the data is written to the TLC/QLC region, otherwise to the SLCcache.
In this embodiment, the random read data is detected to realize the subsequent writing of the random read data into the SLCcache, so as to achieve the purpose of improving the random read performance of the solid state disk.
It should be understood that although the various steps in the flow charts of fig. 2-5 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2-5 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
In one embodiment, as shown in fig. 6, an apparatus 600 for improving random read performance of a solid state disk is provided, the apparatus comprising:
an obtaining module 601, configured to obtain a request for improving random read performance of a solid state disk;
a first writing module 602, configured to write corresponding host data into dram of the SSD first according to the request;
the judging module 603 is configured to, when data in dram needs to be written into the NAND, judge whether the data to be written is random read data or sequential read data;
a second write-in module 604, configured to write the data to be written into the SLCcache if the data to be written is random read data;
and a third writing module 605, configured to write the data to be written into the TLC/QLC area if the data to be written is sequential read data.
In one embodiment, the determining module 603 is further configured to:
judging the random reading and the sequential reading data through a data detection model;
if the LPA information of the data to be written is continuous, judging that the data to be written is to be read and read sequentially;
and if the LPA information of the data to be written is discontinuous, judging that the data to be written is to be read and read randomly.
In one embodiment, as shown in fig. 7, an apparatus 600 for improving random read performance of a solid state disk is provided, the apparatus further includes:
a reading module 606, configured to read LPA information corresponding to the written data when the data is written into the dram;
the data statistics module 607 is configured to sort the written data according to the LPA information, and count the data of the connected LPAs.
In one embodiment, the determining module 603 is further configured to:
when data are written into the NAND, judging whether the number of the connected LPAs in the data to be written reaches a capacity threshold value; and if the capacity threshold is reached, writing the data to be written into a TLC/QLC area, otherwise, writing the data to be written into an SLC cache.
For specific limitations of the apparatus for improving the random read performance of the solid state disk, reference may be made to the above limitations of the method for improving the random read performance of the solid state disk, and details are not described herein again.
In one embodiment, a computer device is provided, the internal structure of which may be as shown in FIG. 8. The computer apparatus includes a processor, a memory, and a network interface connected by a device bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The nonvolatile storage medium stores an operating device, a computer program, and a database. The internal memory provides an environment for the operation device in the nonvolatile storage medium and the execution of the computer program. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to realize a method for improving the random reading performance of the solid state disk.
Those skilled in the art will appreciate that the architecture shown in fig. 8 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a computer device is provided, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the above method embodiments when executing the computer program.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the above respective method embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A method for improving random reading performance of a solid state disk is characterized by comprising the following steps:
acquiring a request for improving the random reading performance of the solid state disk;
writing the corresponding host data into dram of the SSD according to the request;
when the data in the dram needs to be written into the NAND, judging whether the data to be written is random read data or sequential read data;
if the data to be written is random read data, writing the data to be written into an SLC cache;
and if the data to be written is the sequential read data, writing the data to be written into a TLC/QLC area.
2. The method according to claim 1, wherein the step of determining whether the data to be written is random read data or sequential read data further comprises:
judging the random reading and the sequential reading data through a data detection model;
if the LPA information of the data to be written is continuous, judging that the data to be written is to be read and read sequentially;
and if the LPA information of the data to be written is discontinuous, judging that the data to be written is to be read and read randomly.
3. The method for improving the random read performance of the solid state disk according to claim 1, wherein the step of writing the corresponding host data into the dram of the SSD according to the request further comprises:
when the data is written into the dram, reading the LPA information corresponding to the written data;
and sorting the written data according to the LPA information, and counting the data of the connected LPAs.
4. The method for improving the random read performance of the solid state disk according to claim 3, further comprising:
when data are written into the NAND, judging whether the number of the connected LPAs in the data to be written reaches a capacity threshold value;
and if the capacity threshold is reached, writing the data to be written into a TLC/QLC area, otherwise, writing the data to be written into an SLC cache.
5. The utility model provides a promote solid state hard drives random read performance device which characterized in that, the device includes:
the acquisition module is used for acquiring a request for improving the random reading performance of the solid state disk;
the first writing module is used for writing the corresponding host data into dram of the SSD in advance according to the request;
the judging module is used for judging whether the data to be written is random read data or sequential read data when the data in the dram needs to be written into the NAND;
the second write-in module is used for writing the data to be written into the SLC cache if the data to be written is random read data;
and the third writing module is used for writing the data to be written into a TLC/QLC area if the data to be written is sequential read data.
6. The apparatus for improving random read performance of a solid state disk according to claim 5, wherein the determining module is further configured to:
judging the random reading and the sequential reading data through a data detection model;
if the LPA information of the data to be written is continuous, judging that the data to be written is to be read and read sequentially;
and if the LPA information of the data to be written is discontinuous, judging that the data to be written is to be read and read randomly.
7. The apparatus for improving the random read performance of the solid state disk according to claim 5, further comprising:
the reading module is used for reading the LPA information corresponding to the written data when the data is written into the dram;
and the data statistics module is used for sorting the written data according to the LPA information and counting the data of the connected LPAs.
8. The apparatus for improving random read performance of a solid state disk according to claim 7, wherein the determining module is further configured to:
when data are written into the NAND, judging whether the number of the connected LPAs in the data to be written reaches a capacity threshold value; and if the capacity threshold is reached, writing the data to be written into a TLC/QLC area, otherwise, writing the data to be written into an SLC cache.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 4 are implemented when the computer program is executed by the processor.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 4.
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