CN115469796A

CN115469796A - Data storage method, device, equipment and storage medium

Info

Publication number: CN115469796A
Application number: CN202110655892.9A
Authority: CN
Inventors: 李创锋
Original assignee: Shenzhen Tigo Semiconductor Co ltd
Current assignee: Shenzhen Tigo Semiconductor Co ltd
Priority date: 2021-06-11
Filing date: 2021-06-11
Publication date: 2022-12-13

Abstract

The present application relates to the field of data processing, and in particular, to a data storage method, apparatus, device, and storage medium. The method comprises the following steps: acquiring current data to be stored, wherein the data to be stored comprises at least two unit data packets; acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data; determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification factor; and separating system key data in the data to be stored, and storing the system key data to a single-layer storage unit of the memory, wherein the system key data are basic data for supporting the memory to complete a storage function. The method and the device are used for solving the problems that in the prior art, all data transmitted by an upper computer are written into the memory in sequence, so that the performance stability is poor and the data are easy to lose.

Description

Data storage method, device, equipment and storage medium

Technical Field

The present application relates to the field of data processing, and in particular, to a data storage method, apparatus, device, and storage medium.

Background

A Solid State Disk (SSD), also called Solid State drive, is a hard Disk made of an array of Solid State electronic memory chips. The firmware in the solid state disk is mainly responsible for processing a communication protocol with an upper computer, converting a Logic Block Address (LBA) visible to the upper computer and an actual Physical Block Address (PBA) and controlling and operating the multi-channel flash memory chip. The Translation between the logical block address and the physical address is usually called a Flash Translation Layer (FTL) algorithm.

At present, the mainstream FTL algorithm adopts a Flat Write Translation method, which writes data transmitted by an upper computer into a solid state disk in sequence. This approach is logically simple to implement. However, this method does not care about data attributes such as LBA sequence and distribution of data transmitted by the upper computer, that is, the firmware is not sensitive to the data transmitted by the upper computer, so that in the application of the upper computer, the method may cause problems such as unstable steady-state performance table, and read delay and Quality of Service (QoS) deviation. Especially, under some application conditions such as storing a super-large video streaming media and monitoring a video, the upper computer needs to read and write a large amount of data to the SSD. The mass data includes system key data supporting the requirements of video file switching, file systems, system logs and the like. After all data are written into the SSD in sequence, algorithms such as garbage recovery and the like are frequently started, and key data of the system can be moved for multiple times, so that the performance stability is poor. And frequent movement of system critical data in the data area may also result in data loss.

Disclosure of Invention

The application provides a data storage method, a data storage device, data storage equipment and a data storage medium, which are used for solving the problems that in the prior art, all data transmitted by an upper computer are written into a memory in sequence, so that the performance stability is poor and the data are easy to lose.

In a first aspect, an embodiment of the present application provides a data storage method, including: acquiring current data to be stored, wherein the data to be stored comprises at least two unit data packets; acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data; determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification factor; and separating the system key data in the data to be stored, and storing the system key data to a single-layer storage unit of a memory, wherein the system key data is basic data for supporting the memory to complete a storage function.

Optionally, the determining that the data to be stored includes system key data according to the data volume boundary value and a preset theoretical write amplification factor includes: identifying at least one unit data packet of the data to be stored, the data volume of which is less than the data volume boundary value, as a first data set, and identifying at least one unit data packet of the data to be stored, the data volume of which is greater than or equal to the data volume boundary value, as a second data set; calculating a first data quantity average value of a first data set and a second data quantity average value of a second data set, wherein the first data quantity average value is an average value of at least one unit data quantity in the first data set, and the second data quantity average value is an average value of at least one unit data quantity in the second data set; and when the ratio of the second data volume average value to the first data volume average value is greater than or equal to the theoretical write amplification factor, determining that the first data set is system key data.

Optionally, the obtaining a data volume boundary value includes: acquiring the data volume of the history unit data packet; calculating an average value of the data quantity of the historical unit data packets; and acquiring the data volume boundary value according to the average value and a basic parameter value of the memory, wherein the basic parameter value is the value of the basic performance parameter of the memory.

Optionally, the acquiring current data to be stored includes: adding one to a preset counter every time a unit data packet written in by the upper computer is received; and when the count of the counter reaches a preset number threshold, taking at least one unit data packet in the current counting period as the current data to be stored, and resetting the counter to enable the counter to count the next time.

Optionally, one unit data packet corresponds to one logical block address; the separating the system key data in the data to be stored and storing the system key data to a single-layer storage unit of the memory comprises the following steps: sequentially writing each unit data packet in the data to be stored into a cache until the logic block address corresponding to the unit data packet written currently is identified and is not continuous with the logic block address corresponding to the unit data packet written last, wherein the cache is the cache corresponding to the memory; and when the sum of the data volume of each unit data packet in the cache is smaller than the data volume boundary value, storing each unit data packet in the cache to a single-layer storage unit of the memory.

Optionally, after calculating the first data volume average value of the first data set and the second data volume average value of the second data set, before determining that the first data set is the system critical data when the ratio of the second data volume average value to the first data volume average value is greater than or equal to the theoretical write amplification factor, the method further includes: determining that the data distribution of the second data set conforms to normal distribution according to the second data volume average value; or, according to the second data volume average value, acquiring the number of unit data packets of which the data volume is greater than the second data volume average value in the second data set; and determining the number of the unit data packets of which the data quantity is larger than the average value of the second data quantity and is larger than half of the number of all the unit data packets in the second data set.

Optionally, the saving the system critical data to the single-layer storage unit of the memory further includes: and storing the data to be stored, which does not contain the system key data, to a multi-layer storage unit or a three-layer storage unit of the memory.

In a second aspect, an embodiment of the present application provides a data storage device, including: the device comprises a first acquisition module, a second acquisition module and a first storage module, wherein the first acquisition module is used for acquiring current data to be stored, and the data to be stored comprises at least two unit data packets; the second acquisition module is used for acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data; the determining module is used for determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification coefficient; and the processing module is used for separating the system key data in the data to be stored and storing the system key data to a single-layer storage unit of a memory, wherein the system key data is basic data for supporting the memory to complete a storage function.

In a third aspect, an embodiment of the present application provides an electronic device, including: the system comprises a processor, a memory and a communication bus, wherein the processor and the memory are communicated with each other through the communication bus; the memory for storing a computer program; the processor is configured to execute the program stored in the memory, and implement the data storage method according to the first aspect.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program is stored, and when the computer program is executed by a processor, the computer program implements the data storage method according to the first aspect.

Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages: according to the method provided by the embodiment of the application, the system key data in the data to be stored are separated according to the data volume boundary value and the preset theoretical write amplification factor, and the system key data are independently stored in the single-layer storage unit of the memory. The system key data is basic data for supporting the memory to complete the storage function.

Through the process, the key data of the system can be separated from the data to be stored and can be stored independently. When the data in the solid state disk is subjected to garbage collection, as the system key data are separately stored and other non-system key data do not contain the system key data, the non-system key data can be directly erased without the process of moving the system key data in the prior art. The key data of the system does not need to be frequently moved, and the system performance of the solid state disk is not affected when the garbage recovery algorithm is started, so that the stability of the system performance is further improved. The key data of the system does not need to be moved frequently, and the risk of data loss is greatly reduced. Meanwhile, the key data of the system are stored in the single-layer storage unit, the data are accessed in the single-layer storage unit, the reliability is higher, the key data of the system are not easy to lose, and the stability of the system is further improved.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic architecture diagram of a solid state disk data storage in the prior art provided in an embodiment of the present application;

fig. 2 is a schematic step diagram of a data storage method implementation flow provided in an embodiment of the present application;

fig. 3 is a schematic diagram of a step of acquiring a current data to be stored according to an embodiment of the present application;

fig. 4 is a schematic flow chart of writing data to be stored into a memory in sequence by an upper computer according to the embodiment of the present application;

FIG. 5 is a schematic diagram of an architecture for implementing a data storage method provided in an embodiment of the present application;

FIG. 6 is a schematic diagram of a structural connection of a data storage device provided in an embodiment of the present application;

fig. 7 is a schematic structural connection diagram of an electronic device provided in an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The inventor analyzes the prior art, and the mainstream FTL algorithm adopts a Flat Write transfer mode. The solid state disk is internally provided with logic units (Dies) corresponding to a plurality of paths of flash memories (flash), and when the method is adopted, a block (block) is respectively selected in each Die, and all the selected blocks are logically bound to form a super block. The solid state disk may form a plurality of super blocks. Wherein each block is composed of more than one page (page). Based on the super blocks, when the upper computer transmits data, for each super block, the data transmitted by the upper computer are written into the solid state disk in sequence according to the sequence of Die and page.

Specifically, as shown in fig. 1, two super blocks are formed in advance in the solid state disk, where the super block 0 includes block 0 of Die 0, block 0 of Die 1, and block 0 \8230ofdie 2, and block 0 of Die n, where n is an integer greater than 1. One block 0 comprises page 0, page1 and page2 \8230, and page m, wherein m is an integer more than 1. super block 1 comprises Die 0 block 1, die 1 block 1, die 2 block 1 \8230, die n block 1, one block 1 comprises page 0, page1, page2 \8230, page m.

When the upper computer transmits data, the data is written into the super block 0. The data transmitted by the upper computer are written into (Die 0, page 0), (Die 1, page 0), (Die 2, page 0) \8230, (Die n, page 0), (Die 0, page 1), (Die 1, page 1), (Die 2, page 1) \8230, (Die n, page 1) \8230and (Die n, page m) in sequence. When the writing of (Die n, page m) in super block 0 is completed, indicating that super block 0 is full of data, the data is continuously written into super block 1, and the writing sequence is (Die 0, page 0), (Die 1, page 0), (Die 2, page 0) \ 8230, (Die n, page 0), (Die 0, page 1), (Die 1, page 1), (Die 2, page 1) \8230, (Die n, page 1) \8230 (Die n, page m).

The inventor analyzes the above-mentioned way of the Flat Write Translation, and it is found that the way can utilize the concurrency of each flash channel to the maximum extent although the implementation logic is simple. However, this method does not identify and process data attributes such as LBA sequence and distribution of data transmitted by an upper computer, that is, the method is not sensitive to data transmitted by the upper computer, so that a steady-state performance table line of the solid state disk is unstable, and there are problems of read delay, and Quality of Service (QoS) deviation.

Particularly, under the application conditions of storing super-large video streaming media, monitoring videos and the like, due to the requirements of video file switching, system files, system logs and the like, a small number of jumped LBAs can be mixed in continuous LBAs in continuous sequential read-write requests. These few-hop LBAs are system critical data used to support the solid state disk to perform storage functions. Data is written in by adopting a Flat Write Translation mode, when algorithms such as garbage collection and the like are carried out on the solid state disk, system key data needs to be identified in all data, then the system key data is moved, and other data which are not the system key data are erased to finish garbage collection. The frequent starting of the movement of the key data of the system can result in poor stability performance of the system and increase the risk of losing the key data of the system.

Based on the above analysis of the prior art, the embodiment of the present application provides a data storage method, which is applied to data storage of a memory and implemented by a controller in the memory, where firmware capable of implementing the method is stored in the controller. The memory may be a Solid State Disk (SSD), or may be other types of data storage devices capable of implementing the method, and the scope of protection of the present application is not limited to the specific type of the memory implementing the method.

In one embodiment, as shown in fig. 2, the main flow steps of the data storage method are as follows:

step 201, obtaining current data to be stored, wherein the data to be stored includes at least two unit data packets.

In this embodiment, the data to be stored may be any one or more of video data, picture data, voice data, and text data, and may also be other types of data, and the protection scope of the present application is not limited by the specific data type of the data to be stored.

In this embodiment, the upper computer is a device capable of implementing data interaction with the memory, and specifically, the upper computer may be any one of a computer, a smart phone, an intelligent camera, or other devices capable of implementing related functions. The scope of protection of the present application is not limited to the specific type of the host computer.

The host computer transmits data to be stored to the memory, and the unit data packet is a data unit in the transmission process, for example, data corresponding to one LBA is one unit data packet. The memory acquires the current data to be stored by taking a unit data packet as a unit according to the transmission sequence of the upper computer.

In an embodiment, the amount of data transmitted by the upper computer is very large, for example, the upper computer transmits monitoring video data, and if all the data are completely acquired by the memory, all the acquired data are processed and stored, which may cause overload of the memory controller, and higher requirements on various hardware of the memory, and further increase the cost of the memory.

In this embodiment, the data to be stored transmitted by the upper computer is processed in stages, so as to reduce the pressure of the memory controller. Specifically, as shown in fig. 3, the process of acquiring the current data to be stored is as follows:

step 301, monitoring whether data are written in the upper computer, if so, executing step 302, and if not, keeping a data monitoring state;

step 302, receiving a unit data packet written in by the upper computer in sequence;

step 303, adding one to a preset counter;

step 304, determining whether the counting value of the counter reaches a preset number threshold, if so, executing step 305, otherwise, executing step 301;

step 305, taking at least one unit data packet in the current counting period as current data to be stored;

in step 306, the counter is cleared and step 301 is executed.

In this embodiment, the memory continuously monitors whether the upper computer has data written therein, counts the value of the written unit data packet through the counter, and processes the unit data packet in one counting process as the current data to be stored. The preset number threshold may be set according to needs and actual conditions, for example, when the processing capability of the memory controller is strong, the number threshold may be set to 30, and when the processing capability of the memory controller is weak, the number threshold may be set to 20.

In this embodiment, when the data volume of host computer transmission is very big, can divide into the data that wait to store that the data volume is less with the data volume of host computer transmission through the counter, reduce the pressure that memory controller handled data, avoid making mistakes among the data storage process, improve the stability of data storage process.

In a specific embodiment, in the process of acquiring the current data to be stored, the monitoring of the data is realized through a preset detection load model. When the upper computer does not transmit data to the memory, detecting that the load model is in a waiting state; when the upper computer transmits data to the memory, the load model is detected to start a data processing process, a large amount of continuous data is divided into data to be stored with small data volume, subsequent processing is facilitated, and the pressure of the memory controller for processing the data is reduced. When the process of data transmission of the upper computer is finished, the detection load model enters a waiting state again, and the upper computer knows to start transmitting data to the memory next time.

Step 202, acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a history unit data packet, and the history unit data packet is a unit data packet corresponding to the last stored system key data.

In this embodiment, the data volume boundary value is used to determine system critical data in the data to be stored. The data volume boundary value is obtained by the data volume of a history unit data packet, wherein the history unit data packet refers to a unit data packet corresponding to the last saved system key data. When the upper computer writes a large amount of data, the upper computer divides the data into data to be stored in different stages. The last stored system key data is separated from the last data to be stored, and when the current data to be stored is processed, the data volume boundary value is acquired by logically latest last system key data, so that the continuity of data storage can be ensured to the maximum extent.

In one embodiment, when the boundary value of the data amount is obtained, the specific process is as follows: acquiring the data volume of the historical unit data packet; calculating an average value of data quantity of the historical unit data packets; and acquiring a data volume boundary value according to the average value and a basic parameter value of the memory, wherein the basic parameter value is the value of the basic performance parameter of the memory.

In this embodiment, the performance of the memory itself has a great influence on the data storage process. When the boundary value of the data volume is obtained, the historical unit data packet is utilized, and meanwhile, the basic parameter value of the memory is combined, so that the data can be processed within the self performance allowance of the memory, and errors in the process of storing the data are avoided.

In one embodiment, the base parameter values for memory include the memory firmware available write-path cache size, and the size of the super page. The firmware may use a write path cache, which is usually a Dynamic Random Access Memory (DRAM) or a Static Random Access Memory (SRAM), or may use a write path cache, which is also a cache register (cache register) of the flash Memory when the SRAM is not sufficiently used.

The calculation formula of the super page size is as follows:

super page size = (number of Die) × (size of one page in flash memory) × (number of planes in one Die);

wherein a Die comprises one and more planes (i.e., planes), each Plane comprises one and more blocks, and each block comprises one and more pages.

Based on the above, the calculation formula of the data amount boundary value is as follows:

data volume boundary value = MIN (super page size, MIN (average of data volume of history unit packet × 2, firmware may use write channel buffer size));

the MIN is the minimum value, and correspondingly, the above formula means that 2 times of the average value of the data amount of the history unit data packet is compared with the minimum value in the write channel cache size available for the firmware, and the minimum value in the three is obtained as the data amount boundary value. Therefore, the data can be processed under the condition that the performance of the memory allows, and the condition that the data storage error occurs due to exceeding of the processing capacity of the processor is avoided.

And step 203, determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification factor.

In this embodiment, after the data volume boundary value is determined, whether the data to be stored includes the system key data may be determined through the data volume boundary value and a preset theoretical write amplification factor. The memory reads data in the block into the cache, erases the block, and rewrites the updated data into the block after the data in the cache is updated, which causes the problem of the write amplification factor.

In this embodiment, the preset theoretical write amplification factor is set according to an experimental result or a write amplification factor set according to a requirement, the theoretical write amplification factor may be set according to an actual situation, and a protection range of the present application is not limited by a specific value and a setting principle of the theoretical write amplification factor.

In one embodiment, the method for determining that the data to be stored contains the system key data according to the data volume boundary value and the preset theoretical write amplification factor comprises the following specific processes:

identifying at least one unit data packet of which the data volume is smaller than the boundary value of the data volume in the data to be stored as a first data set, and identifying at least one unit data packet of which the data volume is greater than or equal to the boundary value of the data volume in the data to be stored as a second data set; calculating a first data quantity average value of the first data set and a second data quantity average value of the second data set, wherein the first data quantity average value is an average value of data quantity of at least one unit data packet in the first data set, and the second data quantity average value is an average value of data quantity of at least one unit data packet in the second data set; and when the ratio of the second data volume average value to the first data volume average value is greater than or equal to the theoretical write amplification factor, determining that the first data set is system key data.

For example, the calculated boundary value of the data amount is 1MB, and the current data to be stored includes 30 unit packets. For 30 unit packets, the data amount of each unit packet is compared with a data amount boundary value, all unit packets smaller than 1MB are used as a first data set, and all unit packets larger than or equal to 1MB are used as a second data set. And respectively calculating the average values of the first data set and the second data set to obtain the average value of the first data amount and the average value of the second data amount.

Calculating a ratio of the second data amount average value to the first data amount average value by the following formula:

ratio = (second data amount average)/(first data amount average).

When the ratio is larger than or equal to the theoretical write amplification factor, determining that the first data set is system key data; when the ratio is smaller than the theoretical write amplification factor, the system key data contained in the current data to be stored cannot be determined, and the current data to be stored is stored in the memory as a whole.

In one embodiment, after calculating the first data volume average value of the first data set and the second data volume average value of the second data set, when the ratio of the second data volume average value to the first data volume average value is greater than or equal to the theoretical write amplification factor, before determining that the first data set is the system critical data, it may be determined by calculation whether the data in the second data set is normally written data. This process can be implemented in two ways:

the first mode is to determine that the data distribution of the second data set conforms to the normal distribution according to the second data volume average value. And if the data in the second data set is not in accordance with the normal distribution, the data in the second data set has risk.

The second mode is that the number of unit data packets of which the data volume is larger than the average value of the second data volume in the second data set is obtained according to the average value of the second data volume; and determining the number of the unit data packets with the data quantity larger than the average value of the second data quantity and larger than half of the number of all the unit data packets in the second data set. If the data volume is larger than the average value of the second data volume, the number of the unit data packets is not more than half of the number of all the unit data packets in the second data set, and the data in the second data set is indicated to have risks.

In this embodiment, if the data in the second data set has a risk, the memory may return risk prompt information to the upper computer, or the memory may directly alarm, or return to the detection load model in the above embodiment, and perform data identification again. Risk verification is carried out through the data in the second data set, so that dangerous data can be prevented from being stored in the memory, and safety of the memory in the data storage process is improved.

And 204, separating system key data in the data to be stored, and storing the system key data to a single-layer storage unit of the memory, wherein the system key data is basic data for supporting the memory to complete a storage function.

In this embodiment, the memory cells of the memory may be classified into Single Level Cells (SLC), multi-Level cells (MLC), and Triple Level Cells (TLC). SLC stores 1bit of data in each memory cell, and SLC has the highest reliability among the three, and SLC has a simple structure but high execution efficiency. SLC transfer speeds are fast, power consumption is lower and the life of the memory cells is longer, but each memory cell contains less information and is more costly.

MLC is the data of storage 2 bits in every memory cell, and MLC can deposit the data that is twice more than SLC in every memory cell. MLC flash memory can reduce production cost, but its transfer speed is slower compared to SLC.

TLC is the data stored in 3bit per storage unit. The reliability of TLC was the lowest of the three. Each cell can store 1/2 more data than an MLC, requiring longer access times and therefore slower transfer speeds. TLC is cheaper than MLC.

The key data of the system is basic data for supporting the memory to complete the storage function, and the key data of the system is stored in the SLC, so that the stability of the performance of the memory can be further improved.

In one embodiment, the system critical data is stored in a single-level storage unit of the memory, and the data to be stored, which does not contain the system critical data, is stored in a multi-level storage unit or a triple-level storage unit of the memory. Compared with the mode of storing all the data to be stored into the SLC, the mode of storing the data to be stored without system key data into the MLC or the TLC can reduce the cost of data storage.

In one embodiment, after determining that the data to be stored includes the system critical data, the system critical data in the data to be stored needs to be separated, and the system critical data is stored in the single-layer storage unit of the memory. The process is realized by the logic block address of the unit data packet, one unit data packet corresponds to one logic block address, and the specific separation and storage process comprises the following steps:

sequentially writing each unit data packet in the data to be stored into a cache until a logic block address corresponding to the currently written unit data packet is identified, wherein the logic block address corresponding to the last written unit data packet is discontinuous, and the cache is a cache corresponding to a memory;

and when the sum of the data volume of each unit data packet in the cache is smaller than the data volume boundary value, storing each unit data packet in the cache to a single-layer storage unit of the memory.

As shown in fig. 4, the upper computer writes the data to be stored into the memory in sequence for storage, and the more detailed process is as follows:

step 401, sequentially writing a unit data packet into a cache;

step 402, accumulating the length of data written into the cache;

step 403, determining whether the logical block address corresponding to the written unit data packet is consecutive to the logical block address corresponding to the last written unit data packet, if yes, executing step 404, and if no, executing step 407;

step 404, judging whether the data length is smaller than the data volume boundary value, if so, executing step 405, and if not, executing step 408;

step 405, writing the data in the cache into the SLC;

step 406, clearing the accumulated data length, and executing step 401;

step 407, determining whether the firmware available write channel cache is full, if not, executing step 401, and if so, executing step 408;

in step 408, the data in the buffer is written into MLC or TLC, and step 406 is executed.

In the embodiment, the system key data in the data to be stored is separated and is independently stored in the SLC, so that the safety of the system key data is ensured, and the stability of the system is improved.

In one embodiment, when the memory implements a garbage collection algorithm, both the system critical data stored in the SLC and the data stored in the MLC or TLC require the validity of the data within the data block to be maintained by firmware. When the garbage collection algorithm is started, since the data stored in the MLC or TLC are written sequentially, the firmware may recognize that there is no valid data in the MLC or TLC, that is, there is no system critical data, and may directly erase the data in the MLC or TLC. Garbage collection does not require data movement, meaning that the performance of the memory system is not affected during garbage collection, and the write amplification factor is also reduced.

And for the system key data, because the data is stored in the SLC, the reliability is higher during the access, and the data is not easy to lose. When the key data of the system needs to be garbage-recovered, the key data of the system only needs to be moved from one SLC block to another SLC block, and the key data of the system is also rewritten quickly, so that the valid data on the SLC block is also little, the garbage recovery and moving amount is little, the garbage recovery frequency of the SLC is much lower than that of TLC or MLC, and the moving is also quick due to the fact that the access speed of the SLC is high, and the stability of the performance of the memory is further improved.

In a specific embodiment, an architecture basis for implementing the data storage method is shown in fig. 5, and the upper computer writes a large amount of data such as video and system key data such as a system log file, a system node file, and file reading operation data into the solid state disk in a mixed manner. Meanwhile, a command channel and a data channel are arranged between the upper computer and the solid state disk, the command channel is used for controlling transmission of commands, and the data channel is used for transmission of data needing to be stored. The controller of the solid state disk independently stores the system key data to the single-layer storage unit through the processes of detecting the load model, determining the system key data, separating the system key data and the like through the cache of the solid state disk, and stores the data to be stored, which does not contain the system key data, to the multi-layer storage unit or the three-layer storage unit of the storage. The single-layer memory unit, the multi-layer memory unit and the three-layer memory unit are different memory areas in the flash memory.

According to the data storage method, the system key data in the data to be stored are separated according to the data volume boundary value and the preset theoretical write amplification coefficient, and the system key data are independently stored in the single-layer storage unit of the memory. The system key data is basic data for supporting the memory to complete the storage function.

Based on the same concept, the embodiment of the present application provides a data storage device, and the specific implementation of the device may refer to the description of the method embodiment, and repeated descriptions are omitted, as shown in fig. 6, the device mainly includes:

a first obtaining module 601, configured to obtain current data to be stored, where the data to be stored includes at least two unit data packets;

a second obtaining module 602, configured to obtain a data volume boundary value, where the data volume boundary value is obtained according to a data volume of a history unit data packet, and the history unit data packet is a unit data packet corresponding to the last saved system key data;

the determining module 603 is configured to determine that the data to be stored includes system key data according to the data volume boundary value and a preset theoretical write amplification factor;

the processing module 604 is configured to separate system critical data from the data to be stored, and store the system critical data in a single-layer storage unit of the memory, where the system critical data is basic data for supporting the memory to complete a storage function.

Based on the same concept, an embodiment of the present application further provides an electronic device, as shown in fig. 7, the electronic device mainly includes: a processor 701, a memory 702, and a communication bus 703, wherein the processor 701 and the memory 702 communicate with each other via the communication bus 703. The memory 702 stores a program executable by the processor 701, and the processor 701 executes the program stored in the memory 702 to implement the following steps: acquiring current data to be stored, wherein the data to be stored comprises at least two unit data packets; acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data; determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification factor; and separating system key data in the data to be stored, and storing the system key data to a single-layer storage unit of the memory, wherein the system key data are basic data for supporting the memory to complete a storage function.

The communication bus 703 mentioned in the electronic device may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus 703 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 7, but this is not intended to represent only one bus or type of bus.

The Memory 702 may include a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Alternatively, the memory may be at least one memory device located remotely from the processor 701.

The Processor 701 may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc., and may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components.

In yet another embodiment of the present application, there is also provided a computer-readable storage medium having a computer program stored therein, which, when run on a computer, causes the computer to execute the data storage method described in the above embodiment.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that includes one or more of the available media. The available media may be magnetic media (e.g., floppy disks, hard disks, tapes, etc.), optical media (e.g., DVDs), or semiconductor media (e.g., solid state drives), among others.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method of storing data, comprising:

acquiring current data to be stored, wherein the data to be stored comprises at least two unit data packets;

acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data;

determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification factor;

and separating the system key data in the data to be stored, and storing the system key data to a single-layer storage unit of a memory, wherein the system key data is basic data for supporting the memory to complete a storage function.

2. The data storage method according to claim 1, wherein the determining that the data to be stored includes system critical data according to the data volume boundary value and a preset theoretical write amplification factor comprises:

identifying at least one unit data packet of the data to be stored, the data volume of which is less than the data volume boundary value, as a first data set, and identifying at least one unit data packet of the data to be stored, the data volume of which is greater than or equal to the data volume boundary value, as a second data set;

calculating a first data quantity average value of a first data set and a second data quantity average value of a second data set, wherein the first data quantity average value is an average value of at least one unit data quantity in the first data set, and the second data quantity average value is an average value of at least one unit data quantity in the second data set;

and when the ratio of the second data volume average value to the first data volume average value is greater than or equal to the theoretical write amplification factor, determining that the first data set is system key data.

3. The data storage method of claim 1, wherein said obtaining a data volume boundary value comprises:

acquiring the data volume of the history unit data packet;

calculating an average value of the data quantity of the historical unit data packet;

and acquiring the data volume boundary value according to the average value and a basic parameter value of the memory, wherein the basic parameter value is the value of the basic performance parameter of the memory.

4. The data storage method according to claim 1, wherein the acquiring the current data to be stored comprises:

adding one to a preset counter every time a unit data packet written in by the upper computer is received;

and when the count of the counter reaches a preset number threshold, taking at least one unit data packet in the current counting period as the current data to be stored, and resetting the counter to enable the counter to count the next time.

5. The data storage method of claim 1, wherein one of said unit packets corresponds to a logical block address;

the separating the system key data in the data to be stored and storing the system key data to a single-layer storage unit of the memory comprises the following steps:

sequentially writing each unit data packet in the data to be stored into a cache until the logic block address corresponding to the currently written unit data packet is identified, wherein the logic block address corresponding to the unit data packet written last is discontinuous, and the cache is the cache corresponding to the memory;

6. The method according to claim 2, wherein after calculating the first average value of the data amount of the first data set and the second average value of the data amount of the second data set, before determining that the first data set is the system-critical data when the ratio of the second average value of the data amount to the first average value of the data amount is greater than or equal to the theoretical write amplification factor, the method further comprises:

determining that the data distribution of the second data set conforms to normal distribution according to the second data volume average value;

alternatively, the first and second electrodes may be,

acquiring the number of unit data packets of which the data volume is larger than the average value of the second data volume in the second data set according to the average value of the second data volume;

and determining the number of the unit data packets of which the data quantity is larger than the average value of the second data quantity and is larger than half of the number of all the unit data packets in the second data set.

7. The data storage method of claim 1, wherein saving the system critical data to the single-level storage unit of the memory further comprises:

and storing the data to be stored, which does not contain the system key data, to a multi-layer storage unit or a three-layer storage unit of the memory.

8. A data storage device, comprising:

the device comprises a first acquisition module, a second acquisition module and a storage module, wherein the first acquisition module is used for acquiring current data to be stored, and the data to be stored comprises at least two unit data packets;

the second acquisition module is used for acquiring a data volume boundary value, wherein the data volume boundary value is acquired according to the data volume of a historical unit data packet, and the historical unit data packet is a unit data packet corresponding to the last-stored system key data;

the determining module is used for determining that the data to be stored contains system key data according to the data volume boundary value and a preset theoretical write amplification coefficient;

and the processing module is used for separating the system key data in the data to be stored and storing the system key data to a single-layer storage unit of a memory, wherein the system key data is basic data for supporting the memory to complete a storage function.

9. An electronic device, comprising: the system comprises a processor, a memory and a communication bus, wherein the processor and the memory are communicated with each other through the communication bus;

the memory for storing a computer program;

the processor, configured to execute the program stored in the memory, and implement the data storage method according to any one of claims 1 to 7.

10. A computer-readable storage medium, storing a computer program, wherein the computer program, when executed by a processor, implements the data storage method of any one of claims 1 to 7.