CN111078920A - Data processing method, device, equipment and computer readable storage medium - Google Patents
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Abstract
The application provides a data processing method, a device, equipment and a computer readable storage medium, wherein in a subgraph set which is loaded in a cache in advance, the loading information of each subgraph comprises vector diagram information and bitmap information of a data storage unit; the vector graphic information includes state information of the data storage unit, and the bitmap information includes state information of the data storage unit; wherein the state information of the data storage unit comprises used data storage unit or unused data storage unit; the data processing method comprises the following steps: receiving an instruction to detect an available data storage unit; detecting vector diagram information of each subgraph in the subgraph set to obtain unused data storage units; and if the unused data storage unit is acquired, the unused data storage unit is used as an available data storage unit.
Description
Technical Field
The present application relates to the field of data processing technologies, and in particular, to a data processing method, apparatus, device, and computer readable storage medium.
Background
A bitmap, also called a dot matrix image or a raster image, is composed of single points called pixels (picture elements). Each point on the image may correspond to a data storage element, and the pixel value of each point represents the storage device of the data storage element. The state of the data storage unit can be directly determined by looking up the value of a certain point on the bitmap.
The bitmap has high efficiency in inquiring the dot state, but the efficiency in counting the number of dots and searching for the idle dots is very low. For the application of filing class, data is mostly written once, the operation of inquiring the idle point is very frequent, and the low-efficiency idle point searching mode brings great burden to storage.
Disclosure of Invention
The embodiment of the application provides a data processing method, a device, equipment and a computer readable storage medium, which are used for solving the problems in the related technology, and the technical scheme is as follows:
in a first aspect, an embodiment of the present application provides a data processing method, including:
in the subgraph set pre-loaded in the cache, the loading information of each subgraph comprises vector diagram information and bitmap information of a data storage unit; the vector graphic information includes state information of the data storage unit, and the bitmap information includes state information of the data storage unit; wherein the state information of the data storage unit comprises used data storage unit or unused data storage unit;
the data processing method comprises the following steps:
receiving an instruction to detect an available data storage unit;
detecting vector graphics information for each sub-graph in the set of sub-graphs to detect unused data storage units;
and if the unused data storage unit is detected, the unused data storage unit is used as an available data storage unit.
In one embodiment, the method further comprises:
receiving a state query instruction for a first data storage unit;
determining location information of a first data storage unit;
determining a first subgraph in which the first data storage unit is located and determining relative offset information of the first data storage unit in the first subgraph according to the position information of the first data storage unit;
acquiring a first subgraph from the subgraph set;
the state of the first data storage unit is determined based on the bitmap information of the first sub-picture and the relative offset information of the first data storage unit in the first sub-picture.
In one embodiment, after detecting vector graphics information for each sub-picture in the set of sub-pictures to obtain unused data storage units, the method further comprises:
if the unused data storage units cannot be detected in all the subgraphs, eliminating at least one subgraph from the subgraph set and loading at least one new subgraph;
vector map information of at least one new sub-picture is detected to detect unused data storage units.
In one embodiment, the method further comprises:
when a loading instruction for a second sub-graph is received, acquiring storage information of the second sub-graph from storage information of a plurality of sub-graphs prestored in a memory;
loading bitmap information under the condition that the storage information of the second sub-graph comprises bitmap information, determining vector diagram information according to the bitmap information, and loading the vector diagram information;
and in the case that the storage information of the second sub-map comprises vector map information, loading the vector map information, determining bitmap information according to the vector map information, and loading the bitmap information.
In one embodiment, the method further comprises:
when a storage instruction for the third sub-graph is received, acquiring bitmap information and vector diagram information of the third sub-graph from loading information of the third sub-graph;
determining storage information of the third sub-picture according to the bitmap information and the vector diagram information of the third sub-picture;
and storing the storage information of the third sub-graph into a memory.
In one embodiment, determining storage information for the third sub-picture based on the bitmap information and the vector graphics information for the third sub-picture comprises:
determining that the storage information of the third sub-map comprises vector map information under the condition that the memory occupied by the bit map information is larger than the memory occupied by the vector map information;
and determining that the storage information of the third sub-map comprises bitmap information under the condition that the memory occupied by the bitmap information is smaller than the memory occupied by the vector map information.
In one embodiment, the storage information further includes sub-picture identifier information and sub-picture storage type information, the sub-picture storage type information being a bitmap or a vector map.
In a second aspect, an embodiment of the present application provides a data processing apparatus, where in a set of subgraphs preloaded in a cache, loading information of each subgraph includes vector graphics information and bitmap information of a data storage unit; the vector graphic information includes state information of the data storage unit, and the bitmap information includes state information of the data storage unit; wherein the state information of the data storage unit comprises used data storage unit or unused data storage unit;
the data processing apparatus includes:
the detection available instruction receiving module is used for receiving an instruction for detecting an available data storage unit;
the detection module is used for detecting the vector diagram information of each subgraph in the subgraph set so as to detect unused data storage units;
and the available acquisition module is used for taking the unused data storage unit as an available data storage unit if the unused data storage unit is detected.
In one embodiment, the apparatus further comprises:
the query instruction receiving module is used for receiving a state query instruction aiming at the first data storage unit;
the position information determining module is used for determining the position information of the first data storage unit;
the relative position information determining module is used for determining a first sub-graph where the first data storage unit is located and determining relative offset information of the first data storage unit in the first sub-graph according to the position information of the first data storage unit;
the first subgraph acquisition module is used for acquiring a first subgraph from the subgraph set;
and the state determining module is used for determining the state of the first data storage unit according to the bitmap information of the first sub-graph and the relative offset information of the first data storage unit in the first sub-graph.
In one embodiment, the apparatus further comprises:
the elimination loading module is used for eliminating at least one sub-graph from the sub-graph set and loading at least one new sub-graph if the unused data storage unit cannot be detected in all the sub-graphs;
a new load detection module to detect vector graphics information of at least one new sub-graph to detect unused data storage units.
In one embodiment, the apparatus further comprises:
the loading instruction receiving module is used for acquiring the storage information of the second sub-graph from the storage information of the plurality of sub-graphs prestored in the memory when receiving the loading instruction aiming at the second sub-graph;
the first loading module is used for loading the bitmap information under the condition that the storage information of the second sub-graph comprises the bitmap information, determining the vector diagram information according to the bitmap information and loading the vector diagram information;
and the second loading module is used for loading the vector diagram information under the condition that the storage information of the second sub-diagram comprises the vector diagram information, determining bitmap information according to the vector diagram information and loading the bitmap information.
In one embodiment, the apparatus further comprises:
the storage instruction receiving module is used for acquiring bitmap information and vector diagram information of the third sub-image from the loading information of the third sub-image when receiving a storage instruction aiming at the third sub-image;
the storage information determining module is used for determining the storage information of the third sub-image according to the bitmap information and the vector diagram information of the third sub-image;
and the storage module is used for storing the storage information of the third sub-graph into the memory.
In a third aspect, an embodiment of the present application provides a data processing apparatus, including: a memory and a processor. Wherein the memory and the processor are in communication with each other via an internal connection path, the memory is configured to store instructions, the processor is configured to execute the memory-stored instructions, and the processor is configured to cause the processor to perform the method of any of the above-described aspects when executing the memory-stored instructions.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium, which stores a computer program, and when the computer program runs on a computer, the method in any one of the above-mentioned aspects is executed.
The advantages or beneficial effects in the above technical solution at least include: the loading information of the subgraph comprises vector diagram information and bitmap information, and the available data storage units are obtained through the vector diagram information, so that the efficiency of obtaining the available data storage units is improved, and the problem of low efficiency of the traditional bitmap search available data storage units is solved.
The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will be readily apparent by reference to the drawings and following detailed description.
Drawings
In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are therefore not to be considered limiting of its scope.
Fig. 1 is a first flowchart of a data processing method according to the present embodiment;
fig. 2 is a flowchart of a step of querying a status of a data storage unit in a data processing method according to this embodiment;
fig. 3 is a diagram illustrating an example of a storage device to which a data processing method according to the present embodiment is applied;
fig. 4 is a second flowchart of a data processing method provided in this embodiment;
fig. 5 is an exemplary flowchart of steps S101 to S105 in a data processing method provided in this embodiment;
fig. 6 is a flowchart illustrating an example of steps S201 to S205 in the flowchart of a data processing method provided in this embodiment;
fig. 7 is a flowchart of steps for sub-graph loading in the data processing method provided in this embodiment;
fig. 8 is a flowchart of a step for storing a subgraph in the data processing method provided in this embodiment;
fig. 9 is a diagram illustrating an example of storing a bitmap in a memory in a data processing method provided in this embodiment;
fig. 10 is a block diagram of a data processing apparatus according to the first embodiment;
fig. 11 is a block diagram of a data processing apparatus according to the second embodiment;
fig. 12 is a block diagram of a data processing apparatus according to the present embodiment;
fig. 13 is a block diagram of a data processing apparatus according to a fourth embodiment;
fig. 14 is a block diagram of a data processing apparatus according to a fifth embodiment;
fig. 15 is a block diagram of a data processing apparatus according to this embodiment.
Detailed Description
In the following, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
Fig. 1 shows a flow chart of a data processing method according to an embodiment of the present application. In this embodiment, in the sub-picture set pre-loaded in the cache, the loading information of each sub-picture includes vector picture information and bitmap information of the data storage unit; the vector graphic information includes state information of the data storage unit, and the bitmap information includes state information of the data storage unit; wherein the state information of the data storage unit comprises used data storage unit or unused data storage unit;
as shown in fig. 1, the method may include:
s101, receiving an instruction for detecting an available data storage unit;
s102, detecting the vector diagram information of each sub-diagram in the sub-diagram set to detect an unused data storage unit;
and S103, if the unused data storage unit is detected, using the unused data storage unit as an available data storage unit.
Referring to fig. 2, the present embodiment further includes a step of querying a state of the data storage unit, specifically including:
s201, receiving a state query instruction aiming at a first data storage unit;
s202, determining the position information of the first data storage unit;
s203, determining a first subgraph in which the first data storage unit is located and determining relative offset information of the first data storage unit in the first subgraph according to the position information of the first data storage unit;
s204, acquiring a first subgraph from the subgraph set;
s205, determining the state of the first data storage unit according to the bitmap information of the first sub-graph and the relative offset information of the first data storage unit in the first sub-graph.
It should be noted that the use condition of each data storage unit in the storage system can be represented by a general diagram, the point of the image can be represented by a bit, and the bit is the smallest storage unit of the computer. The value of a bit is represented by 0 or 1. For example, a 1 indicates that the data storage unit is used and a 0 indicates that the data storage unit is not used. The more bits that can represent the more complex image information.
The general graph can be divided into a plurality of subgraphs for storage. The subgraphs represent a continuous portion of the overall graph. The dots (i.e., the number of data storage units represented) included in the subgraph are fixed and occupy the same size in the disk. The subgraph can be represented in the form of a bitmap or vector diagram.
A bitmap, also called a dot matrix image or a raster image, is composed of single points called pixels (picture elements). Each point on the image may correspond to a data storage element, and the pixel value of each point represents the storage device of the data storage element. The state of the data storage unit can be directly determined by looking up the value of a certain point on the bitmap.
Vector graphics, also known as object-oriented images or drawing images, are mathematically defined as a series of points connected by lines. In this embodiment, the vector map includes a plurality of vectors, which are represented by two elements of length and offset. A set of consecutive used data storage units is represented by a vector. Unused data storage locations can be retrieved more quickly by vector graphics than by bitmap.
For example, the bitmap information is "111100000", which indicates status information of 10 data storage units, the first 5 data storage units being used, and the last 5 data storage units being unused. If the bitmap is converted into a vector map, the vector map information at this time includes a vector with a vector length of 5 and an offset of 0.
If the available data storage units are determined based on the bitmap information, it is necessary to read one by one from the 1 st bit to the 6 th bit of 0 to determine the corresponding available data storage units. If directly based on the vector map information, the data storage unit corresponding to the 6 th bit can be directly determined to be an available data storage unit by reading the first vector information.
In the embodiment, the loading information of the subgraph comprises vector diagram information and bitmap information, so that on one hand, the available data storage unit is obtained through the vector diagram information, and the efficiency of obtaining the available data storage unit is improved; on the other hand, the state of the data storage unit can be inquired through bitmap information, and the problem that the conventional bitmap searching for the available data storage unit is low in efficiency is solved.
In one embodiment, the load information for a sub-picture may include identifier information for the sub-picture, vector map information, and bitmap information. The identifier information may also be understood as an Identity Document (ID). In the set of subgraphs, the subgraphs in the set of subgraphs can be retrieved in ID and access order.
In one embodiment, the storage information of the sub-graph corresponding to the sub-graph identifier information can be obtained from the memory according to the sub-graph identifier information.
In one embodiment, referring to fig. 3, a storage device applied to this embodiment includes a cache and a memory. The memory may be a magnetic disk. A subgraph set is loaded in the cache, and the subgraph set comprises n subgraphs, such as ID [0] to ID [ n-1] in a graph. And an example of loading information with ID n-1 is given, including bitmap information and vector map information. The bitmap information and the vector image information can be mutually converted. The bitmap information and the vector graphics information may be selected for storage in memory.
In one embodiment, referring to fig. 4, step S103 is followed by:
s104, if the unused data storage units cannot be detected in all the subgraphs, eliminating at least one subgraph from the subgraph set, and loading at least one new subgraph;
s105, detecting the vector graphics information of at least one new sub-picture to obtain unused data storage units.
Referring to fig. 5, an example of steps S101 to S105:
s501, receiving an instruction of acquiring an available data storage unit, and judging whether a subgraph set has subgraphs which are not detected and have unused data storage units, if so, executing a step S502, and if not, executing a step S504;
s502, selecting a current sub-graph to be detected from the sub-graphs of the undetected unused data storage unit;
s503, detecting whether an unused data storage unit exists in the current sub-image according to the vector image information of the current sub-image; if yes, executing step S511, and if not, executing step S501;
s504, setting a current ID according to the initial ID;
s505, judging whether the subgraph corresponding to the current ID is in the subgraph set, if so, executing a step S506, and if not, executing a step S509;
s506, updating the current ID according to the next ID of the current ID;
for example, the ID is 0,1,2,3,4, …. At this time, the start ID of step S504 is 0, and the current ID is set to 0. Step S506 may be updated by adding 1 to the current ID. Assume that the current ID is 3 and the next ID is 4; and updating the current ID according to the next ID, wherein the current ID is updated to be 4.
S507, judging whether the current ID is the initial ID, if so, executing a step S508, and if not, executing a step S505;
s508 returns assignment failure information, and step S512 is executed.
S509, eliminating at least one sub-graph in the sub-graph set, obtaining storage information of the current sub-graph from a memory according to the current ID, obtaining loading information of the current sub-graph according to the storage information of the current sub-graph, and loading the loading information;
s510, detecting whether an unused data storage unit exists in the current sub-image according to the vector image information of the current sub-image; if yes, executing step S511, otherwise, returning to step S506;
s511, the detected unused data storage unit is used as an available data storage unit, the state of the available data storage unit is updated to be used, bitmap information and vector diagram information in the loading information are updated, the storage information of the current sub-image in the memory is updated according to the loading information, and the position information of the extracted data storage unit is returned;
and S512, ending.
In one embodiment, in step S203, identifier information of the first sub-graph where the first data storage unit is located may be determined according to the location information; in step S204, a first sub-graph is obtained from the sub-graph set according to the identifier information of the first sub-graph.
Referring to fig. 6, an example of steps S201 to S205:
s601, under the condition of receiving a state query instruction of a first data storage unit, determining position information of the first data storage unit; determining the ID of a first sub-graph where the first data storage unit is located and determining relative offset information of the first data storage unit in the first sub-graph according to the position information;
in one example, the location information of the first data storage unit refers to absolute location information where the first data storage unit is located in the entire storage system. Through the absolute position information, the absolute position information of the bit of the first data storage unit in the general graph can be determined, and further the ID of the first sub-graph where the first data storage unit is located is determined according to the position information and the relative offset information of the first data storage unit in the first sub-graph is determined.
S602, judging whether the first sub-graph is in the sub-graph set or not according to the ID of the first sub-graph, if not, step S603, and if so, step S604;
s603, eliminating at least one sub-graph in the sub-graph set, acquiring the storage information of the first sub-graph from the memory according to the ID of the first sub-graph, obtaining the loading information of the first sub-graph according to the storage information of the first sub-graph, and loading the first sub-graph according to the loading information;
s604, according to the relative offset information, inquiring corresponding bit in the bitmap information of the first sub-image to obtain the state of the first data storage unit.
And S605, ending.
In one example, the algorithm employed to cull at Least one subgraph in the set of subgraphs may employ a Least Recently Used (LRU) algorithm in steps S509 and S603. The LRU algorithm is a commonly used page replacement algorithm, and selects the least recently used page to be eliminated. The algorithm assigns each page an access field for recording the time t elapsed since the page was last accessed, and when a page needs to be eliminated, selects the page with the largest t value in the existing pages, i.e. the least recently used page, to eliminate.
In one embodiment, the step S603 further includes, after eliminating at least one sub-graph in the sub-graph set: and storing the eliminated subgraphs into a memory.
In an embodiment, referring to fig. 7, the embodiment further includes a step for sub-graph loading, which specifically includes:
s701, when a loading instruction for a second sub-graph is received, obtaining storage information of the second sub-graph from storage information of a plurality of sub-graphs prestored in a memory;
s702, loading bitmap information under the condition that the storage information of the second sub-map comprises bitmap information, determining vector map information according to the bitmap information, and loading the vector map information;
and S703, loading the vector diagram information under the condition that the storage information of the second sub-diagram comprises the vector diagram information, determining bitmap information according to the vector diagram information, and loading the bitmap information.
In an embodiment, referring to fig. 8, this embodiment further includes a step for subgraph storage, which specifically includes:
s801, acquiring bitmap information and vector diagram information of a third sub-graph from loading information of the third sub-graph when receiving a storage instruction for the third sub-graph;
s802, determining storage information of the third sub-image according to the bitmap information and the vector image information of the third sub-image;
and S802, storing the storage information of the third sub-graph into a memory.
In one embodiment, step S802 includes:
determining that the storage information of the third sub-map comprises vector map information under the condition that the memory occupied by the bit map information is larger than the memory occupied by the vector map information;
and determining that the storage information of the third sub-map comprises bitmap information under the condition that the memory occupied by the bitmap information is smaller than the memory occupied by the vector map information.
The embodiment mode can select the mode with small memory occupation to store according to the respective memory size occupied when the bitmap mode or the vector diagram mode is used for storing, and the storage pressure is reduced.
In this embodiment, since the bit number of each sub-graph is already determined, that is, the memory occupied by the bitmap information in the sub-graph memory is a determined threshold, the storage type of the sub-graph can be determined only by determining whether the memory occupied by the vector graph exceeds the threshold.
In one example, referring to fig. 9, the graph further includes a total graph description to which each sub-graph belongs, and the total graph description may include the number n of sub-graphs and the number m of (bits) bits of the sub-graphs. The number of bits m of the subgraph corresponds to the number of data storage units represented by the subgraph. Examples of stored information are given for sub-graph [0] and sub-graph [ n-1], with other sub-graphs omitted.
The storage information of the sub-picture includes one of bitmap information or vector picture information, and the storage information further includes identifier information and save type of the sub-picture. Taking subgraph [0] as an example, if the storage type is bitmap, the storage information comprises bitmap information, and the bitmap information comprises Bit [0], Bit [1], … Bit [ m-1 ]; if the storage type is vector graphics, the storage information comprises vector graphics information, and the vector graphics information comprises the total number of vectors; for example, the total number of vectors t1 for sub-graph [0] includes vectors [0], … and vector [ t1-1 ]. The case of sub-diagram [ n-1] is similar and will not be described here.
Fig. 10 shows a block diagram of a data processing apparatus according to an embodiment of the present invention.
In the subgraph set pre-loaded in the cache, the loading information of each subgraph comprises vector diagram information and bitmap information of a data storage unit; the vector graphic information includes state information of the data storage unit, and the bitmap information includes state information of the data storage unit; wherein the state information of the data storage unit comprises used data storage unit or unused data storage unit;
as shown in fig. 10, the data processing apparatus 100 includes:
a detection available instruction receiving module 1001 configured to receive an instruction to detect an available data storage unit;
a detection module 1002, configured to detect vector graphics information of each sub-graph in the sub-graph set to detect an unused data storage unit;
an available acquiring module 1003, configured to, if an unused data storage unit is detected, take the unused data storage unit as an available data storage unit.
In one embodiment, referring to fig. 11, the apparatus further comprises:
a query instruction receiving module 1101, configured to receive a status query instruction for the first data storage unit;
a location information determining module 1102 for determining location information of the first data storage unit;
a relative position information determining module 1103, configured to determine, according to the position information of the first data storage unit, a first sub-graph where the first data storage unit is located and determine relative offset information of the first data storage unit in the first sub-graph;
a first sub-graph obtaining module 1104, configured to obtain a first sub-graph from the sub-graph set;
a state determining module 1105, configured to determine a state of the first data storage unit according to the bitmap information of the first sub-picture and the relative offset information of the first data storage unit in the first sub-picture.
In one embodiment, referring to fig. 12, the apparatus further comprises:
a discarding loading module 1201, configured to discard at least one sub-graph from the set of sub-graphs and load at least one new sub-graph if an unused data storage unit is not detected in all sub-graphs;
a new load detection module 1202 for detecting vector graphics information of at least one new sub-graph to detect unused data storage units.
In one embodiment, referring to fig. 13, the apparatus further comprises:
a load instruction receiving module 1301, configured to, when receiving a load instruction for a second sub-graph, obtain storage information of the second sub-graph from storage information of multiple sub-graphs pre-stored in a memory;
a first loading module 1302, configured to load bitmap information when the storage information of the second sub-map includes bitmap information, determine vector diagram information according to the bitmap information, and load the vector diagram information;
and a second loading module 1303, configured to load the vector diagram information when the storage information of the second sub-diagram includes the vector diagram information, determine bitmap information according to the vector diagram information, and load the bitmap information.
In one embodiment, referring to fig. 14, the apparatus further comprises:
a storage instruction receiving module 1401, configured to obtain bitmap information and vector diagram information of the third sub-picture from the loading information of the third sub-picture when receiving a storage instruction for the third sub-picture;
a storage information determining module 1402, configured to determine storage information of the third sub-picture according to the bitmap information and the vector diagram information of the third sub-picture;
a storage module 1403, configured to store the storage information of the third sub-diagram in the memory.
The functions of each module in each apparatus in the embodiments of the present invention may refer to the corresponding description in the above method, and are not described herein again.
Fig. 15 shows a block diagram of a data processing apparatus according to an embodiment of the present invention. As shown in fig. 15, the data processing apparatus includes: a memory 1510 and a processor 1520, the memory 1510 having stored therein computer programs that are executable on the processor 1520. The processor 1520, when executing the computer program, implements the method in the above embodiments. The number of the memory 1510 and the processor 1520 may be one or more.
The data processing apparatus further includes:
and a communication interface 1530 for communicating with an external device and performing data interactive transmission.
If the memory 1510, the processor 1520, and the communication interface 1530 are implemented independently, the memory 1510, the processor 1520, and the communication interface 1530 may be connected to each other through a bus and perform communication with each other. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (enhanced Industry Standard Architecture) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 15, but this is not intended to represent only one bus or type of bus.
Alternatively, in a specific implementation, if the memory 1510, the processor 1520 and the communication interface 1530 are integrated on a chip, the memory 1510, the processor 1520 and the communication interface 1530 may communicate with each other through an internal interface.
Embodiments of the present invention provide a computer-readable storage medium, which stores a computer program, and when the program is executed by a processor, the computer program implements the method provided in the embodiments of the present application.
The embodiment of the present application further provides a chip, where the chip includes a processor, and is configured to call and execute the instruction stored in the memory from the memory, so that the communication device in which the chip is installed executes the method provided in the embodiment of the present application.
An embodiment of the present application further provides a chip, including: the system comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the method provided by the embodiment of the application.
It should be understood that the processor may be a Central Processing Unit (CPU), other general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or any conventional processor or the like. It is noted that the processor may be an advanced reduced instruction set machine (ARM) architecture supported processor.
Further, optionally, the memory may include a read-only memory and a random access memory, and may further include a nonvolatile random access memory. The memory may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile memory may include a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can include Random Access Memory (RAM), which acts as external cache memory. By way of example, and not limitation, many forms of RAM are available. For example, Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate synchronous SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct memory bus RAM (DR RAM).
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions according to the present application are generated in whole or in part when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process. And the scope of the preferred embodiments of the present application includes other implementations in which functions may be performed out of the order shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. All or part of the steps of the method of the above embodiments may be implemented by hardware that is configured to be instructed to perform the relevant steps by a program, which may be stored in a computer-readable storage medium, and which, when executed, includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module may also be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. The storage medium may be a read-only memory, a magnetic or optical disk, or the like.
While the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (14)
1. A data processing method is characterized in that in a subgraph set pre-loaded in a cache, the loading information of each subgraph comprises vector diagram information and bitmap information of a data storage unit; the vector map information includes status information of the data storage unit, and the bitmap information includes status information of the data storage unit; wherein the state information of the data storage unit comprises that the data storage unit is used or that the data storage unit is not used;
the data processing method comprises the following steps:
receiving an instruction to detect an available data storage unit;
detecting vector graphics information for each subgraph in the set of subgraphs to detect unused data storage units;
and if the unused data storage unit is detected, taking the unused data storage unit as an available data storage unit.
2. The method of claim 1, further comprising:
receiving a state query instruction for a first data storage unit;
determining location information of the first data storage unit;
according to the position information of the first data storage unit, determining a first subgraph in which the first data storage unit is located and determining relative offset information of the first data storage unit in the first subgraph;
acquiring the first subgraph from the subgraph set;
and determining the state of the first data storage unit according to the bitmap information of the first sub-graph and the relative offset information of the first data storage unit in the first sub-graph.
3. The method of claim 1, wherein after detecting vector graphics information for each subgraph in the set of subgraphs to detect unused data storage units, the method further comprises:
if unused data storage units cannot be detected in all subgraphs, eliminating at least one subgraph from the subgraph set and loading at least one new subgraph;
detecting the vector graphics information of the at least one new sub-picture to detect unused data storage units.
4. The method of claim 1, further comprising:
receiving a loading instruction aiming at the second sub-graph, and acquiring storage information of the second sub-graph from storage information of a plurality of sub-graphs prestored in a memory;
loading the bitmap information under the condition that the storage information of the second sub-map comprises the bitmap information, determining vector diagram information according to the bitmap information, and loading the vector diagram information;
and loading the vector graphics information under the condition that the storage information of the second sub-graph comprises vector graphics information, determining bitmap information according to the vector graphics information, and loading the bitmap information.
5. The method of claim 1, further comprising:
receiving a storage instruction aiming at a third sub-graph, and acquiring bitmap information and vector diagram information of the third sub-graph from loading information of the third sub-graph;
determining storage information of the third sub-picture according to the bitmap information and the vector diagram information of the third sub-picture;
and storing the storage information of the third sub-graph into a memory.
6. The method of claim 5, wherein said determining storage information for said third sub-picture based on said bitmap information and said vector graphics information for said third sub-picture comprises:
determining that the storage information of the third sub-map comprises the vector graphics information under the condition that the memory occupied by the bitmap information is larger than the memory occupied by the vector graphics information;
and determining that the storage information of the third sub-map comprises the bitmap information under the condition that the memory occupied by the bitmap information is smaller than the memory occupied by the vector diagram information.
7. The method of claim 6, wherein the storage information further comprises sub-picture identifier information and sub-picture storage type information, the sub-picture storage type information being a bitmap or a vector map.
8. A data processing apparatus, characterized in that, in a set of subpictures preloaded in a cache, loading information for each subpicture includes vector graphics information and bitmap information for a data storage unit; the vector map information includes status information of the data storage unit, and the bitmap information includes status information of the data storage unit; wherein the state information of the data storage unit comprises that the data storage unit is used or that the data storage unit is not used;
the data processing apparatus includes:
the detection available instruction receiving module is used for receiving an instruction for detecting an available data storage unit;
a detection module for detecting vector graphics information for each sub-graph in the set of sub-graphs to detect the unused data storage units;
and the available acquisition module is used for taking the unused data storage unit as an available data storage unit if the unused data storage unit is detected.
9. The apparatus of claim 8, further comprising:
the query instruction receiving module is used for receiving a state query instruction aiming at the first data storage unit;
a location information determination module for determining location information of the first data storage unit;
a relative position information determining module, configured to determine, according to position information of the first data storage unit, a first sub-graph in which the first data storage unit is located and determine relative offset information of the first data storage unit in the first sub-graph;
the first subgraph acquisition module is used for acquiring the first subgraph from the subgraph set;
and the state determining module is used for determining the state of the first data storage unit according to the bitmap information of the first sub-graph and the relative offset information of the first data storage unit in the first sub-graph.
10. The apparatus of claim 8, further comprising:
the elimination loading module is used for eliminating at least one sub-graph from the sub-graph set and loading at least one new sub-graph if the unused data storage unit cannot be detected in all the sub-graphs;
a new load detection module to detect vector graphics information of the at least one new sub-graph to detect unused data storage units.
11. The apparatus of claim 8, further comprising:
the loading instruction receiving module is used for acquiring the storage information of the second sub-graph from the storage information of the plurality of sub-graphs prestored in the memory when receiving the loading instruction aiming at the second sub-graph;
the first loading module is used for loading the bitmap information under the condition that the storage information of the second sub-map comprises the bitmap information, determining vector diagram information according to the bitmap information and loading the vector diagram information;
and the second loading module is used for loading the vector diagram information under the condition that the storage information of the second sub diagram comprises the vector diagram information, determining bitmap information according to the vector diagram information and loading the bitmap information.
12. The apparatus of claim 8, further comprising:
the storage instruction receiving module is used for acquiring bitmap information and vector diagram information of a third sub-graph from loading information of the third sub-graph when receiving a storage instruction for the third sub-graph;
the storage information determining module is used for determining the storage information of the third sub-image according to the bitmap information and the vector image information of the third sub-image;
and the storage module is used for storing the storage information of the third sub-graph into a memory.
13. A data processing apparatus, characterized by comprising: comprising a processor and a memory, said memory having stored therein instructions that are loaded and executed by the processor to implement the method of any of claims 1 to 7.
14. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-7.
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