CN114188452B - Light-emitting chip and preparation method thereof - Google Patents
Light-emitting chip and preparation method thereof Download PDFInfo
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- CN114188452B CN114188452B CN202111398152.8A CN202111398152A CN114188452B CN 114188452 B CN114188452 B CN 114188452B CN 202111398152 A CN202111398152 A CN 202111398152A CN 114188452 B CN114188452 B CN 114188452B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
Abstract
The invention relates to a light-emitting chip and a preparation method thereof, wherein the light-emitting chip comprises: an epitaxial layer; and an electrode structure disposed on the epitaxial layer; at least one of the electrode structures comprises: a reflective layer disposed on the epitaxial layer; the protective layer is used for coating at least the side surface of the reflecting layer and is in contact with the epitaxial layer, and the adhesion between the protective layer and the epitaxial layer is larger than that between the reflecting layer and the epitaxial layer; an electron transport layer disposed on the reflective layer and away from one side of the epitaxial layer; an electron blocking layer disposed on the electron transport layer and away from one side of the epitaxial layer; the electrode structure improves the reflectivity of the electrode structure by eliminating the adhesion layer arranged between the epitaxial layer and the reflecting layer, thereby improving the brightness of the chip of the light-emitting chip comprising the electrode structure, and improves the adhesion between the electrode structure and the epitaxial layer by arranging the protection layer to be in contact with the semiconductor layer, thereby improving the reliability of the light-emitting chip.
Description
Technical Field
The invention relates to the field of semiconductor technology, in particular to a light-emitting chip and a preparation method thereof.
Background
Currently, efforts are made to develop new light sources that are more efficient, reliable, safe, and durable. The inherent advantages of LEDs (Light Emitting Diode, light emitting diodes) are attractive to the world, and how to make LEDs brighter is a subject of continuous optimization. The electrode structure of the conventional flip-chip LED generally comprises the following parts: an adhesion layer, a reflection layer, a blocking layer and an electron transport layer. Wherein the reflective layer is generally an Al layer, and the adhesive layer is a Cr or Ni electrode, but the reflectivity of the Cr or Ni electrode is much lower than that of the Al electrode. For example, the conventional electrode structure layer is CrAlTiPtAuTiPtTi, and the Cr layer added is thin, typically
But may result in a 5% -15% decrease in reflectivity and thus a decrease in brightness of the entire LED.
Therefore, how to increase the brightness of the light emitting chip is a problem to be solved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the related art, an object of the present application is to provide a light emitting chip and a method for manufacturing the same, which are aimed at solving the problem of low brightness of the light emitting chip in the related art.
A light emitting chip, the light emitting chip comprising:
an epitaxial layer;
and an electrode structure disposed on the epitaxial layer;
at least one of the electrode structures comprises:
a reflective layer disposed on the epitaxial layer;
a protective layer covering at least the side surface of the reflective layer and in contact with the epitaxial layer, the adhesion between the protective layer and the epitaxial layer being greater than the adhesion between the reflective layer and the epitaxial layer;
an electron transport layer disposed on the reflective layer and away from a side of the epitaxial layer;
and the electron blocking layer is arranged on the electron transmission layer and is far away from one side of the epitaxial layer.
According to the electrode structure of the light-emitting chip, the adhesion layer between the epitaxial layer and the reflecting layer is eliminated, the influence of the adhesion layer on the reflectivity of the reflecting layer is eliminated, so that the reflectivity of the reflecting layer of the electrode structure is improved, correspondingly, the brightness of the light-emitting chip comprising the electrode structure is correspondingly improved, the adhesion between the electrode structure and the epitaxial layer is improved by arranging the protective layer with strong adhesion to be in contact with the epitaxial layer, and correspondingly, the reliability of the light-emitting chip comprising the electrode structure is also improved.
Based on the same inventive concept, the present application also provides a method for manufacturing the light emitting chip as described above, including:
manufacturing the epitaxial layer;
forming the electrode structure on the epitaxial layer;
the forming the electrode structure on the epitaxial layer includes:
forming the reflecting layer on the epitaxial layer, wherein the reflecting layer is contacted with the epitaxial layer;
forming the protective layer on the reflective layer;
forming the electron transport layer on a side of the reflective layer away from the epitaxial layer;
and forming the electron blocking layer on a side of the electron transport layer away from the epitaxial layer.
According to the preparation method of the light-emitting chip, the step of preparing the adhesion layer between the epitaxial layer and the reflecting layer is omitted, so that the influence of the adhesion layer on the reflectivity of the reflecting layer is eliminated, the reflectivity of the reflecting layer of the electrode structure is improved, correspondingly, the brightness of the prepared light-emitting chip comprising the electrode structure is correspondingly improved, the adhesion between the electrode structure and the epitaxial layer is improved by forming the protective layer with strong adhesion to be in contact with the epitaxial layer, and correspondingly, the reliability of the prepared light-emitting chip comprising the electrode structure is also enhanced.
Drawings
Fig. 1 is a schematic structural diagram of a light emitting chip according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an electrode structure of a light emitting chip according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another light emitting chip according to an embodiment of the present invention;
FIG. 4 is a basic flowchart of a method for manufacturing a light emitting chip according to another alternative embodiment of the present invention;
FIG. 5 is a basic flow chart of a method for fabricating an electrode structure according to another alternative embodiment of the present invention;
fig. 6 is a basic flowchart of another method for manufacturing a light emitting chip according to another alternative embodiment of the present invention.
Reference numerals illustrate:
10-electrode structure, 11-reflective layer, 12-protective layer, 13-electron transport layer, 14-electron blocking layer, 101-first electrode structure, 102-second electrode structure, 20-epitaxial layer, 21-first epitaxial layer, 22-second epitaxial layer, 30-active layer, 41-first electrode, 42-second electrode, 50-transparent conductive layer, 60-current blocking layer, 70-passivation layer, 80-DBR (Distributed Bragg Reflection, bragg mirror) layer.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In the related art, an electrode structure of a light emitting chip generally includes: the adhesion layer, the reflecting layer, the blocking layer and the electron transport layer, but the adhesion layer affects the reflection efficiency of the reflecting layer, so that the brightness of the light emitting chip using the electrode structure is reduced.
Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.
According to the light-emitting chip of the embodiment, the adhesion layer between the epitaxial layer 20 and the reflecting layer 11 is omitted, the influence of the adhesion layer on the reflectivity of the reflecting layer 11 is eliminated, the reflectivity of the reflecting layer 11 of the electrode structure 10 is improved, correspondingly, the brightness of the light-emitting chip comprising the electrode structure 10 is correspondingly improved, the adhesion between the electrode structure 10 and the epitaxial layer 20 is improved by arranging the protective layer 12 with strong adhesion to be in contact with the epitaxial layer 20, and correspondingly, the reliability of the light-emitting chip comprising the electrode structure is also improved. For easy understanding, the following description will be made by taking a light emitting chip shown in fig. 1 as an example:
referring to fig. 1, fig. 1 is a schematic structural diagram of a light emitting chip according to the present embodiment, and fig. 2 is a schematic structural diagram of an electrode structure of a light emitting chip according to the present embodiment, where the light emitting chip includes, but is not limited to:
an epitaxial layer 20;
and an electrode structure 10 disposed on the epitaxial layer 20;
at least one of the electrode structures 10 includes:
a reflective layer 11 disposed on the epitaxial layer 20;
a protective layer 12 covering at least the side surface of the reflective layer 11 and in contact with the epitaxial layer 20, the adhesion between the protective layer 12 and the epitaxial layer 20 being greater than the adhesion between the reflective layer 11 and the epitaxial layer 20;
an electron transport layer 13 disposed on the reflective layer 11 and on a side remote from the epitaxial layer 20;
an electron blocking layer 14 disposed on the electron transport layer 13 and on a side remote from the epitaxial layer 20.
In the present example, the electrode structure provided on the epitaxial layer 20 includes a first electrode structure 101 and a second electrode structure 102, and at least one of the first electrode structure 101 and the second electrode structure 102 employs the above-described electrode structure 10. The protective layer 12 of the electrode structure may be disposed only on the side of the reflective layer 11, and may further be disposed so that the protective layer 12 covers the side of the reflective layer 11 away from the epitaxial layer 20 and the side of the reflective layer 11, and by disposing that the adhesion between the protective layer 12 and the epitaxial layer 20 is greater than the adhesion between the reflective layer 11 and the epitaxial layer 20, the protective layer 12 is in contact with the epitaxial layer 20, thereby improving the adhesion between the electrode structure 10 and the epitaxial layer 20, and the protective layer 12 may include a nickel layer, but is not limited to the above metal layer, due to the good adhesion of nickel. The protective layer 12 may also be disposed on the emissive layer 11 and not in direct contact with the reflective layer 11.
It should be understood that, because the reflection effect of aluminum or aluminum alloy is better, in this embodiment, the reflection layer 11 may be an aluminum layer or an aluminum alloy layer, and the thickness may be controlled to be as follows
For example->
Or other thickness.
When the reflective layer 11 is an aluminum alloy layer, in order to further improve the adhesion between the electrode structure 10 and the epitaxial layer 20, the adhesion between the aluminum alloy layer and the epitaxial layer 20 may be selected to be greater than the adhesion between aluminum and the epitaxial layer 20.
It should be understood that the electron transport layer 13 is specifically used to transport electrons from the cathode into the light emitting layer of the light emitting chip; the electron transport layer 13 may include a gold layer, or the electron transport layer 13 may include a titanium layer, a platinum layer, and a gold layer sequentially stacked, which are not limited herein and may be selected according to actual needs.
It will be appreciated that the electron blocking layer 14 is particularly useful for blocking electrons from the cathode at the light emitting layer interface of the device, thereby increasing the concentration of electrons at the light emitting chip light emitting layer interface; the electron blocking layer 14 may include a platinum layer, or the electron transport layer 13 may include a titanium layer, a platinum layer, and a titanium layer sequentially stacked, which are not limited thereto and may be selected according to actual needs.
The embodiment also provides another light emitting chip, as shown in fig. 3, and fig. 3 is a schematic structural diagram of the another light emitting chip provided in the embodiment. The epitaxial layer 20 of the light emitting chip includes a first epitaxial layer 21, an active layer 30, and a second epitaxial layer 22 provided in this order from the bottom. A first electrode structure 101 and a second electrode structure 102 are provided on the first epitaxial layer 21 and the second epitaxial layer 22, respectively. The first epitaxial layer 21 is in contact with the reflective layer 11 of the first electrode structure 101.
The epitaxial layer 20 of the light emitting chip further includes: the transparent conductive layer 50, the transparent conductive layer 50 is located between the second epitaxial layer 22 and the second electrode structure 102, the protective layer 12 of the second electrode structure 102 contacts with the transparent conductive layer 50, the transparent conductive layer 50 is an indium tin oxide layer;
the current blocking layer 60, the current blocking layer 60 is arranged between the transparent conductive layer 50 and the second epitaxial layer 22, the epitaxial layer is also provided with a passivation layer 70, the passivation layer 70 wraps the whole epitaxial layer 20 and exposes part of the electrode structure 10, the passivation layer 70 is also provided with a DBR layer 80, and the DBR layer 80 is also provided with a through hole exposing part of the electrode structure 10;
and a first electrode 41 and a second electrode 42 provided on the first electrode structure 101 and the second electrode structure 102, respectively.
The DBR layers 80 are stacked periodically with each other including films of different refractive indexes, so that when light passes through the films of different refractive indexes, the reflected light from each layer interferes constructively due to the change of the phase angle, and then is combined with each other to obtain strongly reflected light, so that the reflective effect of the light emitting chip can be improved by providing the DBR layers.
Specifically, the DBR layer 80 is a bragg reflection layer formed by alternately stacking a first material layer and a second material layer, and the refractive index of the first material layer is lower than that of the second material layer. Wherein the first material layer is SiO 2 A layer of a second material of Ti X O Y A layer. Specifically, ti X O Y The layer may be Ti 3 O 5 Layers or TiO 2 A layer.
According to the electrode structure of the light-emitting chip, the adhesion layer between the epitaxial layer and the reflecting layer is omitted, the influence of the adhesion layer on the reflectivity of the reflecting layer is eliminated, so that the reflectivity of the reflecting layer of the electrode structure is improved, correspondingly, the brightness of the light-emitting chip comprising the electrode structure is correspondingly improved, the adhesion between the electrode structure and the epitaxial layer is improved by arranging the protective layer with strong adhesion to be in contact with the epitaxial layer, and correspondingly, the reliability of the light-emitting chip comprising the electrode structure is also improved.
The embodiment also provides a method for manufacturing the light emitting chip, as shown in fig. 4, fig. 4 is a basic flowchart of the method for manufacturing the light emitting chip, where the method includes:
s201: epitaxial layer 20 is fabricated.
S202: the electrode structure 10 is formed on the epitaxial layer 20.
The step S201 specifically includes providing an epitaxial wafer including a first epitaxial layer 21, an active layer 30, and a second epitaxial layer 22 sequentially from bottom to top. A portion of the active layer 30 and the second epitaxial layer 22 are etched to expose a portion of the first epitaxial layer 21.
As shown in fig. 5, fig. 5 is a basic flowchart of a method for manufacturing an electrode structure according to the present embodiment, where the forming the electrode structure 10 on the epitaxial layer 20 in the step S202 includes:
s2021: the reflective layer 11 is formed on the epitaxial layer 20 so as to be in contact with the epitaxial layer 20.
S2022: the protective layer 12 is formed on the reflective layer 11.
S2023: the electron transport layer 13 is formed on the side of the reflective layer 11 remote from the epitaxial layer 20.
S2024: the electron blocking layer 14 is formed on the side of the electron transport layer 13 remote from the epitaxial layer 20.
In the step S202, the electrode structure 10 is formed on the epitaxial layer 10, specifically, the electrode pattern may be formed by negative photoresist, the metal layer of the electrode structure 10 is evaporated, and the metal photoresist is stripped to obtain the electrode structure 10. Specifically, the method of sputtering coating can be used for vapor deposition, the thin film with better compactness can be obtained by sputtering, and the electrode can be coated by adopting the method of electron beam evaporation vacuum coating, so that the method has the advantages of high coating speed and high efficiency, is suitable for mass production, and the surface of the coated film layer is rough, the adhesiveness between the film layers is good, so that the stability of the whole electrode structure 10 is better.
In the above step S2021, since the reflection effect of aluminum or aluminum alloy is good, in this embodiment, the reflection layer 11 may be an aluminum layer or an aluminum alloy layer, and the thickness of the aluminum layer or the aluminum alloy layer may be controlled to be
For example
Or other thickness. The plating rate of the deposited aluminum layer can be +.>
For example
Or other plating rate.
In the step S2022, the protective layer 12 may include a nickel layer, and the nickel layer is deposited after the aluminum layer or the aluminum alloy layer is deposited in the step S101, and the plating rate of the deposited nickel layer is as follows
For example->
Or other plating rate, the thickness of the nickel layer is +.>
For example->
Or other thickness. The protective layer 12 comprises a metal layer having shrink properties. For example, due to the shrinking nature of nickel metal, vapor plating nickel pulls up the photoresist, where it is partially escaped. The adhesion of the escaped nickel to the epitaxial layer is good and the reliability of the electrode structure 10 can be effectively improved.
In the above step S2023, forming the electron transport layer 13 may include sequentially plating a titanium layer, a platinum layer, and a gold layer.
In the above step S2024, forming the electron blocking layer 14 may include sequentially plating a titanium layer, a platinum layer, and a titanium layer.
In this example, the first electrode structure 101 may be formed on the first epitaxial layer 21 on the epitaxial layer 20, the second electrode structure 102 may be formed on the second epitaxial layer 22, and the reflective layer 11 of the second electrode structure 102 may include an aluminum layer or an aluminum alloy layer, the method further including: forming an indium tin oxide layer on the second epitaxial layer 22; after forming the indium tin oxide layer, the method further comprises controlling the ambient temperature to be a preset temperature, and aluminum in the reflecting layer 11 permeates into the indium tin oxide layer at the preset temperature.
The method may further comprise: a passivation layer 70 is formed on the epitaxial layer 20, and the passivation layer 70 may be any one of a silicon oxide layer, or a silicon nitride layer. Controlling the ambient temperature to be a preset temperature includes: the deposition temperature of the passivation layer 70 is controlled to be a preset temperature.
The preset temperature can be controlled in a temperature range of 230-300 ℃, such as 251 ℃, 260 ℃, 286 ℃ or other temperatures, and the temperature can promote aluminum in the aluminum layer or the aluminum alloy layer of the second electrode structure 102 on the second epitaxial layer 22 to permeate into the indium tin oxide layer, promote the absorption peak blue shift of the indium tin oxide layer, improve the brightness of the chip, and reduce the resistance value of the indium tin oxide layer due to the fact that the aluminum is doped into the indium tin oxide layer, thereby reducing the voltage of the chip.
The embodiment also provides a method for manufacturing a light emitting chip, as shown in fig. 6, fig. 6 is a basic flowchart of another method for manufacturing a light emitting chip provided in the embodiment, where the method includes:
and S301, forming an epitaxial layer 20.
Providing an epitaxial wafer includes providing a first epitaxial layer 21, an active layer 30, and a second epitaxial layer 22 in this order from bottom to top. Etching the second epitaxial layer 22 and the active layer 30 by using a dry etching machine, wherein the etching gas is BCl 3 、Cl 2 Or other gases, etching depth of 1 μm-2 μm, removing photoresist to obtain a mesa pattern, photolithography ISO pattern on the mesa layer, and etching through the first epitaxial layer 21 to the substrate layer by dry etching machine, wherein the etching gas may include BCl 3 、Cl 2 Or other gases, etching depth of 4 μm-8 μm, removing photoresist to obtainTo ISO graphics.
A part of the first epitaxial layer 21 of the finally obtained epitaxial wafer is exposed to the active layer 30 and the second epitaxial layer 22.
S302: a current blocking layer 60 is formed.
Depositing a silicon oxide layer on the epitaxial layer, the thickness of the current blocking layer 60 being
For example
Or other thickness, and patterning the current blocking layer 60 by photolithography, and wet etching the current blocking photoresist to obtain the current blocking layer 60.
S303: the transparent conductive layer 50 is formed.
The transparent conductive layer 50 may be an indium tin oxide layer, which includes: sputtering an indium tin oxide layer with the thickness of the indium tin oxide layer being
For example->
Or other thickness, photoetching patterns on the indium tin oxide layer, and wet etching the indium tin oxide to remove photoresist to obtain the indium tin oxide layer.
The method specifically comprises the steps of placing the structure obtained in the step S302 in a cavity of a magnetron sputtering device, introducing argon, and then utilizing a radio frequency power supply to enable the argon to generate argon plasma; applying a DC power supply to form an ITO protective layer 12 on the structure obtained in the step S302; turning off a radio frequency power supply; introducing auxiliary gas with preset flow into the cavity of the magnetron sputtering equipment, and forming at least one indium tin oxide thin film layer with refractive index smaller than that of the indium tin oxide protective layer 12 on the indium tin oxide protective layer 12; the indium tin oxide protective layer 12 and all indium tin oxide thin film layers thereon together form an indium tin oxide layer with graded refractive index.
S304: the electrode structure 10 is formed.
Specifically, the electrode structure 10 may be formed by the method of forming the electrode structure 10 of the epitaxial layer in the step S202 described above.
S305: a passivation layer 70 is formed.
The passivation layer 70 is deposited on the basis of the structure obtained in step S304, and the deposition temperature is controlled to be in a temperature range of 230-300 ℃, such as 251 ℃, 260 ℃, 286 ℃ or other temperatures, which can promote the penetration of aluminum in the aluminum layer or the aluminum alloy layer of the second electrode structure 102 on the second epitaxial layer 22 into the indium tin oxide layer, promote the blue shift of the absorption peak of the indium tin oxide layer, improve the brightness of the chip, and reduce the resistance value of the indium tin oxide layer due to the doping of aluminum into the indium tin oxide layer, thereby reducing the chip voltage.
The passivation layer 70 may be any one of a silicon oxide layer, or a silicon nitride layer.
Specifically, the structure obtained in step S304 may be placed in a reaction chamber to deposit the passivation layer 70 by using an atomic layer deposition technique.
It should be understood that atomic layer deposition may refer to a vapor deposition process in which a deposition cycle, typically a plurality of consecutive deposition cycles, is performed in a process chamber. Typically, during each cycle, the precursor is chemically adsorbed to the deposition surface, forming a monolayer or sub-monolayer of material that does not readily react with other precursors. Thereafter, in some cases, the reactants may then be introduced into the process chamber for converting the chemisorbed precursor on the deposition surface to the desired material. The reactants are able to react further with the precursor. In addition, a purge step may also be utilized during each cycle to remove excess precursor from the process chamber and/or excess reactants and/or reaction byproducts from the process chamber after conversion of the chemisorbed precursor. The passivation layer 70 prepared by adopting the atomic layer deposition process is very compact, has good physical passivation performance, can effectively reduce non-radiative recombination of carriers, and can better isolate water and oxygen in the environment.
S306: the DBR layer 80 is formed.
The method specifically comprises the following steps: a stack of silicon oxide and silicon nitride is deposited on the passivation layer 70 to provide a DBR layer 80 of alternating stack, the DBR layer 80 having a thickness of 1 μm to 4 μm, for example 1 μm, 2 μm, 3 μm or other thickness, and the DBR pattern is then lithographically etched.
S307: an electrode window is formed.
Specifically, a first electrode 41 window and a second electrode 42 window are formed on the passivation layer 70. The DBR layer 80 is dry etched using a dry etching tool, which requires simultaneous penetration of the DBR layer 80 and the passivation layer 70, wherein the etching gas is CF 4 、O 2 At least one of Ar and Ar, a first electrode 41 window and a second electrode 42 window are obtained.
S308: an electrode is prepared.
And at the window of the first electrode 41 and the window of the second electrode 42 on the DBR layer 80, negative photoresist photoetching PAD patterns are adopted, specifically, a Fulin evaporation machine is used for evaporating PAD electrodes, the thickness of the electrodes is 1-4 mu m, such as 1 mu m, 2 mu m, 3 mu m or other thicknesses, the PAD patterns are obtained after stripping and photoresist removal of blue films, and finally the manufactured light-emitting chip is obtained.
In this example, the materials of the first electrode 41 and the second electrode 42 may be any one or more of Ag, al, rh, cr, pt, au, ti and Ni, the first electrode 41 and the second electrode 42 may be a single-layer structure or a multi-layer structure, and the sizes and shapes of the first electrode 41 and the second electrode 42 are not fixed, which depends on practical application requirements.
According to the preparation method of the light-emitting chip, the step of preparing the adhesion layer between the epitaxial layer and the reflecting layer is omitted, so that the influence of the adhesion layer on the reflectivity of the reflecting layer is eliminated, the reflectivity of the reflecting layer of the electrode structure is improved, and accordingly, the brightness of the prepared light-emitting chip comprising the electrode structure is correspondingly improved; the adhesion between the electrode structure and the epitaxial layer is improved by forming the protective layer with strong adhesion to be in contact with the epitaxial layer, and correspondingly, the reliability of the formed light-emitting chip comprising the electrode structure is also enhanced by using the preparation method of the light-emitting chip; the side, close to the second epitaxial layer, of the reflecting layer is provided with the indium tin oxide layer, so that aluminum in the aluminum layer or the aluminum alloy layer of the second electrode structure permeates into the indium tin oxide layer at a preset temperature, the absorption peak of the indium tin oxide layer is promoted to move blue, the brightness of the chip is improved, and the resistance value of the indium tin oxide layer is reduced due to the fact that the aluminum is doped into the indium tin oxide layer, so that the voltage of the chip is reduced.
It is to be understood that the invention is not limited in its application to the examples described above, but is capable of modification and variation in light of the above teachings by those skilled in the art, and that all such modifications and variations are intended to be included within the scope of the appended claims.
Claims (10)
1. A light emitting chip, the light emitting chip comprising:
an epitaxial layer;
and an electrode structure disposed on the epitaxial layer;
at least one of the electrode structures comprises:
a reflective layer disposed on the epitaxial layer;
a protective layer covering at least the side surface of the reflective layer and in contact with the epitaxial layer, the adhesion between the protective layer and the epitaxial layer being greater than the adhesion between the reflective layer and the epitaxial layer;
an electron transport layer disposed on the reflective layer and away from a side of the epitaxial layer;
and the electron blocking layer is arranged on the electron transmission layer and is far away from one side of the epitaxial layer.
2. The light-emitting chip according to claim 1, wherein the protective layer covers a side of the reflective layer away from the epitaxial layer and a side of the reflective layer, and wherein the protective layer is disposed between the reflective layer and the electron transport layer.
3. The light-emitting chip according to claim 1, wherein the reflective layer includes:
the adhesion between the aluminum alloy layer and the epitaxial layer is greater than that between aluminum and the epitaxial layer;
or, an aluminum layer.
4. A light-emitting chip according to any one of claims 1 to 3, wherein the protective layer comprises a nickel layer.
5. A light emitting chip according to any one of claims 1 to 3, wherein the epitaxial layer comprises: a first semiconductor layer, an active layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer;
the electrode structure is arranged on the second semiconductor layer;
the light emitting chip further includes:
and the transparent conductive layer is arranged between the second semiconductor layer and the electrode structure, the protective layer is in contact with the transparent conductive layer, and the transparent conductive layer comprises an indium tin oxide layer.
6. The light-emitting chip according to claim 5, further comprising:
and a current blocking layer disposed between the second semiconductor layer and the transparent conductive layer.
7. The light-emitting chip according to claim 5, further comprising:
and the passivation layer is used for coating the epitaxial layer and exposing part of the electrode structure.
8. A method of manufacturing a light-emitting chip according to any one of claims 1 to 7, comprising:
manufacturing the epitaxial layer;
forming the electrode structure on the epitaxial layer;
the forming the electrode structure on the epitaxial layer includes:
forming the reflecting layer on the epitaxial layer, wherein the reflecting layer is contacted with the epitaxial layer;
forming the protective layer on the reflective layer;
forming the electron transport layer on a side of the reflective layer away from the epitaxial layer;
and forming the electron blocking layer on a side of the electron transport layer away from the epitaxial layer.
9. The method of manufacturing a light-emitting chip according to claim 8, wherein the manufacturing the epitaxial layer includes: forming a first semiconductor layer, forming an active layer on the first semiconductor layer, and forming a second semiconductor layer on the active layer;
the forming the electrode structure on the epitaxial layer includes:
forming the electrode structure on the second semiconductor layer;
the reflective layer comprises an aluminum layer or an aluminum alloy layer, the method further comprising:
forming an indium tin oxide layer on the second semiconductor layer;
after the indium tin oxide layer is formed, the method further comprises the step of controlling the ambient temperature to be a preset temperature, and aluminum in the reflecting layer permeates into the indium tin oxide layer at the preset temperature.
10. The method of manufacturing a light emitting chip according to claim 9, further comprising: forming a passivation layer which covers the epitaxial layer and exposes part of the electrode structure;
the controlling the ambient temperature to be a preset temperature includes: and controlling the deposition temperature of the passivation layer to be the preset temperature.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111398152.8A CN114188452B (en) | 2021-11-19 | 2021-11-19 | Light-emitting chip and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111398152.8A CN114188452B (en) | 2021-11-19 | 2021-11-19 | Light-emitting chip and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
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| CN114188452A CN114188452A (en) | 2022-03-15 |
| CN114188452B true CN114188452B (en) | 2023-05-12 |
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| CN101345277A (en) * | 2007-07-12 | 2009-01-14 | 台达电子工业股份有限公司 | Production method of illuminating diode apparatus |
| EP3001092A1 (en) * | 2014-09-28 | 2016-03-30 | Jiaxing Super Lighting Electric Appliance Co., Ltd. | Led tube lamp |
| CN108231966A (en) * | 2017-12-25 | 2018-06-29 | 佛山市国星半导体技术有限公司 | A kind of LED chip with speculum and preparation method thereof |
| CN109378372A (en) * | 2018-11-22 | 2019-02-22 | 圆融光电科技股份有限公司 | LED chip structure and preparation method thereof |
| CN111081838A (en) * | 2020-01-10 | 2020-04-28 | 佛山市国星半导体技术有限公司 | Normal LED chip and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| DE102015101070A1 (en) * | 2015-01-26 | 2016-07-28 | Osram Opto Semiconductors Gmbh | Optoelectronic semiconductor component, optoelectronic assembly and method for producing an optoelectronic semiconductor component |
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| CN101345277A (en) * | 2007-07-12 | 2009-01-14 | 台达电子工业股份有限公司 | Production method of illuminating diode apparatus |
| EP3001092A1 (en) * | 2014-09-28 | 2016-03-30 | Jiaxing Super Lighting Electric Appliance Co., Ltd. | Led tube lamp |
| CN108231966A (en) * | 2017-12-25 | 2018-06-29 | 佛山市国星半导体技术有限公司 | A kind of LED chip with speculum and preparation method thereof |
| CN109378372A (en) * | 2018-11-22 | 2019-02-22 | 圆融光电科技股份有限公司 | LED chip structure and preparation method thereof |
| CN111081838A (en) * | 2020-01-10 | 2020-04-28 | 佛山市国星半导体技术有限公司 | Normal LED chip and manufacturing method thereof |
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