CN114188438A - Passivated contact crystalline silicon battery without edge cutting loss and preparation method thereof - Google Patents
Passivated contact crystalline silicon battery without edge cutting loss and preparation method thereof Download PDFInfo
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Abstract
The invention relates to a passivated contact crystalline silicon battery without edge cutting loss and a preparation method thereof, belonging to the technical field of battery preparation. In the step of producing the passivated contact crystalline silicon cell, a cutting step is firstly carried out, the silicon wafer is divided into at least two slices, and/or a cutting groove is formed on the surface of the silicon wafer by cutting. According to the preparation method of the passivated contact crystalline silicon cell without edge cutting loss, the cutting process of the cell is optimized and changed into the cutting of the paired silicon wafers, and the cutting loss of the cell is solved fundamentally before the production process of the passivated contact cell. The cutting surface is subjected to chemical corrosion repair and passivation repair through the back treatment process step, the front passivation step, the back passivation step and the like, so that the cutting surface is wrapped in the passivation layer, the contact with air is avoided, the edge cutting loss is avoided, the reduction of the minority carrier lifetime of the battery is avoided, the conversion efficiency of the battery is improved, and the power output of the packaged component is increased.
Description
Technical Field
The invention relates to a passivated contact crystalline silicon battery without edge cutting loss and a preparation method thereof, belonging to the technical field of battery preparation.
Background
In recent years, green pollution-free solar photovoltaic power generation is more and more widely applied. The aim of photovoltaic development is to realize the flat price on line, so customers in the market have greater demand for low-cost and high-power products.
The encapsulation of original subassembly all adopts the full chip design, consequently along with output current's constantly improvement in the aspect of the subassembly, the influence that the internal loss caused is bigger and bigger, improve subassembly power mode moreover and reached the bottleneck, in order to reduce the output that subassembly internal loss improved the subassembly, the subassembly encapsulation is gradually updated to present half or multi-disc technique, can reduce battery series connection's electric current 1/2 after cutting through half of battery, according to internal loss I2The principle of R, the internal loss can be reduced to 1/4, if one-third, 1/9. Therefore, the power of the assembly can be greatly improved.
Because the existing battery is cut at the assembly end, the side face of the cut battery has certain physical damage by a method combining laser hot melting and physical damage, more importantly, a silicon substrate in passivation contact with the battery is completely exposed in the air, the recombination increase of the solar battery can be caused by the large amount of dangling bonds and lattice defects, the integral minority carrier lifetime is reduced, and the conversion efficiency of the battery is reduced.
Disclosure of Invention
The invention aims to provide a passivated contact crystalline silicon battery without edge cutting loss and a preparation method thereof.
In order to achieve the purpose, the invention provides the following technical scheme: a preparation method of a passivated contact crystalline silicon cell without edge cutting loss comprises the following steps:
s1, cutting: slicing and cutting the silicon wafer;
s2, texturing: carrying out alkali texturing on the silicon wafer cut in the step S1;
s3, boron diffusion: forming a boron diffusion layer on the silicon wafer processed in the step S2;
s4, back processing: processing the back surface of the silicon wafer processed in the step S3 and the cutting surface formed in the step S1, removing the borosilicate glass formed in the step S4 on the back surface of the silicon wafer, and chemically etching the cutting surface and the back surface;
s5, back passivation: growing a silicon oxide thin layer on the back of the silicon wafer obtained by the step S4, and depositing and doping on the silicon oxide thin layer to form a polycrystalline silicon layer;
s6, removing the phosphorosilicate glass on the back surface, and the borosilicate glass on the front surface: removing the phosphorosilicate glass on the back surface of the silicon wafer obtained by the step S5 by using an acid solution, removing the polycrystalline silicon layer on the front surface and the cutting surface by using an alkali solution, and removing the borosilicate glass on the front surface by using an acid solution;
s7, positive coating: forming an aluminum oxide and silicon nitride laminated passivation anti-reflection film on the front surface and the cutting surface of the silicon wafer obtained by the step S6;
s8, back coating: forming a passivation film of silicon nitride on the back surface and the cutting surface of the silicon wafer obtained in the step S7;
s9, front and back metallization and sintering: forming front and back electrodes on the front and back surfaces of the silicon wafer processed in the step S8 by screen printing or electroplating, and forming an alloy in a sintering mode;
wherein, a rigid or flexible light path conduit is arranged on the laser device in the step S1, the laser conduit is used for passing and gathering laser beams, and the distance between the light path conduit and the silicon wafer in the cutting step is set to be 0-2 mm.
Further, in the step S1, the cutting divides the silicon wafer into at least two sub-pieces, and/or cuts the surface of the silicon wafer to form cut grooves.
Further, the depth of the cutting groove formed by cutting the surface of the silicon wafer in the step S1 is 1-90 μm.
Further, the boron diffusion in step S3 is to perform boron diffusion on the front side of the silicon wafer.
Further, the boron diffusion temperature in the step S3 is 900-.
Further, the chemical etching in the step S4 is to use HF and HNO3And repairing the silicon wafer by corrosion of the solution.
Further, the thickness of the thin silicon oxide layer in step S5 is 0.1-2 nm.
Further, the polysilicon layer in step S5 is formed by depositing phosphorus doping on the silicon oxide thin layer by using N + type polysilicon.
Further, the polysilicon layer in the step S5 is 10-200 nm.
The invention also provides a passivated contact crystalline silicon cell without edge cutting loss, and the passivated contact crystalline silicon cell without edge cutting loss is prepared by the preparation method of the passivated contact crystalline silicon cell without edge cutting loss.
The invention has the beneficial effects that: the preparation method of the passivation contact crystalline silicon battery without edge cutting loss optimizes the cutting process of the battery to be changed into the cutting of the paired silicon wafers, and solves the cutting loss of the battery piece fundamentally before the production process of the passivation contact battery is set. Because the surface of the silicon wafer can reflect or refract laser in the cutting process, and the laser beam is concentrated through the light path guide pipe, the phenomenon that the original depth can be cut only by consuming more cutting capacity due to reflection or refraction is reduced, and the cutting efficiency is improved. The back surface treatment process step, the front surface passivation step, the back surface passivation step and the like carry out chemical corrosion repair and passivation repair on the cutting surface, so that the cutting surface is wrapped in the passivation layer, the contact with air is avoided, the edge cutting loss is avoided, the reduction of the minority carrier lifetime of the battery is avoided, the conversion efficiency of the battery is improved, and the power output of the packaged component is increased.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical solutions of the present invention more clearly understood and to implement them in accordance with the contents of the description, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
FIG. 1 is a comparison of cut surfaces before and after wet processing;
fig. 2 is a schematic flow chart of a preparation method according to an embodiment of the present application.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
The invention provides the following technical scheme: a preparation method of a passivated contact crystalline silicon cell without edge cutting loss comprises the following steps:
s1, cutting: slicing and cutting the silicon wafer;
s2, texturing: carrying out alkali texturing on the silicon wafer cut in the step S1;
s3, boron diffusion: forming a boron diffusion layer on the silicon wafer processed in the step S2;
s4, back processing: processing the back surface of the silicon wafer processed in the step S3 and the cutting surface formed in the step S1, removing borosilicate glass formed in the step S4 on the back surface of the silicon wafer, and chemically etching the cutting surface and the back surface;
s5, back passivation: growing a silicon oxide thin layer on the back of the silicon wafer obtained by the step S4, and depositing and doping on the silicon oxide thin layer to form a polycrystalline silicon layer;
s6, removing the phosphorosilicate glass on the back surface, and the borosilicate glass on the front surface: removing the phosphorosilicate glass on the back surface of the silicon wafer obtained by the step S5 by using an acid solution, removing the polycrystalline silicon layer on the front surface and the cutting surface by using an alkali solution, and removing the borosilicate glass on the front surface by using an acid solution;
s7, positive coating: forming an aluminum oxide and silicon nitride laminated passivation anti-reflection film on the front surface and the cutting surface of the silicon wafer obtained by the step S6;
s8, back coating: forming a passivation film of silicon nitride on the back surface and the cutting surface of the silicon wafer obtained in the step S7;
s9, front and back metallization and sintering: and forming front and back electrodes on the front and back surfaces of the silicon wafer processed in the step S8 by screen printing or electroplating, and forming an alloy by sintering.
The silicon wafer pattern in step S1 is a regular or irregular pattern, for example, the silicon wafer may be a triangular or square silicon wafer, or may be a concave polygon or convex polygon, and the cut silicon wafer is not limited herein and may be changed according to actual production requirements.
In the step S1, the silicon wafer is cut into at least two pieces, and/or a cutting groove is formed on the surface of the silicon wafer. The dicing is an equal dicing or an unequal dicing, so that the silicon wafer is diced into a plurality of pieces, and the number of the pieces obtained after the dicing can be 2 or 3, which is not illustrated here. The cutting can also be cutting the cutting mark position on the back of the silicon wafer by using laser to form a cutting groove, and then using a splitting machine, a thermal expansion and cold contraction principle or applying a folding force to break the silicon wafer. The partial cutting is realized by cutting the silicon wafer at different depths to form cutting grooves at different depths. The depth of the cutting groove is 1-90 μm, the specific cutting depth is related to the thickness of the silicon wafer, the production requirement and the like, and the cutting depth can be determined according to the specific production requirement; the specific number of cuts and the degree of cuts are modified by the package requirements.
In the step S1, a rigid or flexible optical conduit is disposed on the laser device, the laser conduit is used for passing and collecting the laser beam, and the distance between the optical conduit and the silicon wafer in the cutting step is set to be 0-2 mm. Because the surface of the silicon wafer can reflect or refract laser in the cutting process, and the laser beam is concentrated through the light path guide pipe, the phenomenon that the original depth can be cut only by consuming more cutting capacity due to reflection or refraction is reduced, and the cutting efficiency is improved.
Step S2 is specifically to etch and texture etching the silicon wafer with an alkaline solution. The alkaline solution is NaOH or KOH alkaline solution to corrode and texture the silicon wafer, so that the physical damage on the surface of the silicon wafer can be removed, a pyramid texture with a micron structure can be formed, and the optical absorption is increased. In the process of using alkaline solution to make texture, an additive capable of controlling the density and uniformity of the surface texture structure is also added, wherein the additive can be one or a mixture of silane coupling agent, sodium polyacrylate and lactic acid.
Step S3 is embodied as using BBr3Or BCl3And as a boron source, carrying out boron doping on the silicon wafer, wherein the boron diffusion temperature is 900-1050 ℃, and the concentration and junction depth required by the design of the passivated contact cell are formed. In addition, the boron diffusion in step S3 is to perform front-side boron diffusion, and in other embodiments, the slide rail may also be to perform boron diffusion on the entire silicon wafer.
The chemical etching in step S4 is HF and HNO3The solution corrodes and repairs the silicon wafer to form a relatively flat surface, so that the crystal lattice defects are reduced, and the subsequent passivation effect is conveniently improved. It should be noted that HF used herein is 5 to 25% by mass of HF, and HNO3HNO with the mass fraction of 5-40 percent is used3. This application carries out physical repair and passivation to the physical damage of cutting through the wet process and the passivation process of passivation contact crystal silicon battery process, has avoided the reduction of battery minority carrier lifetime, increases the subassembly power output of encapsulation when promoting battery conversion efficiency. Referring to fig. 1, fig. 1 is a comparison diagram of cut surfaces before and after wet processing, the left side of fig. 1 is the surface physical damage formed by the cut surfaces in the traditional process, the right side of fig. 1 is the surface physical loss of the cut surfaces of the application document, and the left side and the right side are compared with the two diagrams, the application document carries out chemical corrosion repair and passivation repair on the cut surfaces through the steps of back surface processing, front surface passivation, back surface passivation and the like, so that the cut surfaces are wrapped in the passivation layer, the contact with air is avoided, the edge cutting loss is solved, the reduction of the minority carrier lifetime of a battery is avoided, the conversion efficiency of the battery is improved, and the power output of the packaged assembly is increased
Step S5 is to grow a silicon oxide passivation layer on the back of the silicon wafer by thermal oxidation or wet chemical oxidation, and deposit phosphorus-doped N + -type polysilicon on the silicon oxide passivation layer to form a doped polysilicon layer. The thickness of the silicon oxide thin layer is 0.1-2nm, the thickness of the doped polysilicon layer is 10-200nm, the deposition method is an LPCVD or PECVD mode, the doping mode is annealing activation after in-situ doping, or the polysilicon layer is deposited first and then doped by adopting high-temperature diffusion or ion implantation.
Step S6 is specifically to remove phosphorosilicate glass formed on the back of the silicon wafer in the back passivation step using an acidic solution, remove a doped polysilicon layer formed on the front surface and the cut surface of the silicon wafer in the back passivation step using an alkaline solution, and remove borosilicate glass on the front surface of the silicon wafer using an acidic solution. The acidic solution used here is an HF solution.
Step S7 is specifically to form a stacked passivation antireflective film of aluminum oxide and silicon nitride on the front surface, the cutting surface and/or the cutting grooves by PECVD or ALD deposition.
Step S8 is to form a passivation film of silicon nitride on the back surface, the cutting surface and/or the cutting grooves by PECVD deposition.
Step S9 is to form front and back electrodes on the front and back surfaces by screen printing or electroplating, and form an alloy by sintering.
The application also provides a passivated contact crystalline silicon cell without edge cutting loss, which is prepared by the preparation method of the passivated contact crystalline silicon cell without edge cutting loss.
The following is a detailed description of specific examples:
example one
(1) And cutting the semi-finished product of the battery by using laser in a way that the whole silicon wafer is completely cut by using the laser to form a semi-sheet shape required by component packaging, wherein the distance between the light path conduit and the silicon wafer is set to be 0.5 mm.
(2) And (3) mixing the lactic acid capable of controlling the density and the uniformity of the surface texture structure by using a NaOH solution to perform corrosion texturing on the cut silicon wafer.
(3) Using BBr3As a doping source, boron doping is carried out on a silicon wafer at the temperature of 900 ℃ in a diffusion tube of a quartz tube.
(4) By using a chain type corrosion method, 10 mass percent of HF and 20 mass percent of HNO are used3The back and cut surfaces are processed.
(5) Growing a silicon oxide thin layer with the thickness of 0.1nm on the back of a silicon wafer by using a wet chemical oxidation mode, and then depositing phosphorus-doped N + type polycrystalline silicon on the silicon oxide thin layer with the thickness of 10nm by using an LPCVD (low pressure chemical vapor deposition) mode, wherein the doping mode is in-situ doping and then annealing activation.
(6) And removing the phosphorosilicate glass on the back surface by using an HF solution, then removing a possibly existing polycrystalline silicon layer which winds to the front surface and the cutting surface by using an alkali solution, and then removing the borosilicate glass remained on the front surface by using the HF solution.
(7) And forming a laminated passivation anti-reflection film of aluminum oxide (AlOx) and silicon nitride (SiNx) on the front surface and the cutting surface by using PECVD (plasma enhanced chemical vapor deposition) as a deposition mode.
(8) And forming a passivation film of silicon nitride (SiNx) on the back surface and the cutting surface by using a PECVD (plasma enhanced chemical vapor deposition) deposition mode.
(9) And forming front and back electrodes on the front and back surfaces by screen printing, and forming an alloy by sintering.
Example two
(1) And cutting the semi-finished product of the battery by using laser, wherein the whole silicon wafer is partially cut by using the laser, 10 cutting grooves with equal intervals are formed on the silicon wafer, the depth of each cutting groove is 45 mu m, and the distance between the light path conduit and the silicon wafer is set to be 1.5 mm.
(2) And (3) mixing the solution with NaOH to control the density and uniformity of the texture surface structure of the cut silicon wafer by using sodium polyacrylate for corrosion texturing.
(3) Using BBr3As a doping source, a silicon wafer is doped with boron at a temperature of 1050 ℃ in a diffusion tube of a quartz tube.
(4) By using a chain etching method, 15% by mass of HF and 25% by mass of HNO were used3The back surface and the cutting surface are processed, on one hand, borosilicate glass formed by boron doping in the previous step is removed, and on the other hand, chemical corrosion can be carried out on the cutting surface and the back surface of the silicon wafer to form a relatively flat surface, so that lattice defects are reduced, and subsequent promotion is facilitatedAnd (4) passivation effect.
(5) Growing a silicon oxide thin layer with the thickness of 0.1nm on the back of the silicon wafer by using a wet chemical oxidation mode, and then depositing phosphorus-doped N + type polycrystalline silicon on the silicon oxide thin layer with the thickness of 10nm by using an LPCVD mode. The doping is activated by annealing after in-situ doping.
(6) Removing the phosphorosilicate glass on the back surface by using an HF solution, then removing a possibly existing polycrystalline silicon layer which winds to the front surface and a cutting surface by using an alkali solution, and then removing the borosilicate glass remained on the front surface by using the HF solution.
(7) And forming a laminated passivation anti-reflection film of aluminum oxide (AlOx) and silicon nitride (SiNx) on the front surface and the cutting surface by using PECVD (plasma enhanced chemical vapor deposition) as a deposition mode.
(8) And forming a passivation film of silicon nitride (SiNx) on the back surface and the cutting surface by using a PECVD (plasma enhanced chemical vapor deposition) deposition mode.
(9) And forming front and back electrodes on the front and back surfaces by screen printing, and forming an alloy by sintering.
In conclusion, the preparation method of the passivated contact crystalline silicon cell without edge cutting loss provided by the application optimizes the cutting process of the cell into the cutting of the paired silicon wafers, and solves the cutting loss of the cell piece fundamentally before the production process of the passivated contact cell. Because the surface of the silicon wafer can reflect or refract laser in the cutting process, and the laser beam is concentrated through the light path guide pipe, the phenomenon that the original depth can be cut only by consuming more cutting capacity due to reflection or refraction is reduced, and the cutting efficiency is improved. The cutting surface is subjected to chemical corrosion repair and passivation repair through the back treatment process step, the front passivation step, the back passivation step and the like, so that the cutting surface is wrapped in the passivation layer, the contact with air is avoided, the edge cutting loss is avoided, the reduction of the minority carrier lifetime of the battery is avoided, the conversion efficiency of the battery is improved, and the power output of the packaged component is increased.
The technical features and the detection items of the above-described embodiments may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above-described embodiments are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A preparation method of a passivated contact crystalline silicon cell without edge cutting loss is characterized by comprising the following steps:
s1, cutting: carrying out slicing cutting on the silicon wafer by using laser;
s2, texturing: carrying out alkali texturing on the silicon wafer cut in the step S1;
s3, boron diffusion: forming a boron diffusion layer on the silicon wafer processed in the step S2;
s4, back processing: processing the back surface of the silicon wafer processed in the step S3 and the cutting surface formed in the step S1, removing the borosilicate glass formed in the step S4 on the back surface of the silicon wafer, and chemically etching the cutting surface and the back surface;
s5, back passivation: growing a silicon oxide thin layer on the back of the silicon wafer obtained by the step S4, and depositing and doping on the silicon oxide thin layer to form a polycrystalline silicon layer;
s6, removing the phosphorosilicate glass on the back surface, and the borosilicate glass on the front surface: removing the phosphorosilicate glass on the back surface of the silicon wafer obtained by the step S5 by using an acid solution, removing the polycrystalline silicon layer on the front surface and the cutting surface by using an alkali solution, and removing the borosilicate glass on the front surface by using an acid solution;
s7, positive coating: forming an aluminum oxide and silicon nitride laminated passivation anti-reflection film on the front surface and the cutting surface of the silicon wafer obtained by the step S6;
s8, back coating: forming a passivation film of silicon nitride on the back surface and the cutting surface of the silicon wafer obtained in the step S7;
s9, front and back metallization and sintering: forming front and back electrodes on the front and back surfaces of the silicon wafer processed in the step S8 by screen printing or electroplating, and forming an alloy in a sintering mode;
wherein, a rigid or flexible light path conduit is arranged on the laser device in the step S1, the laser conduit is used for passing and gathering laser beams, and the distance between the light path conduit and the silicon wafer in the cutting step is set to be 0-2 mm.
2. The method for preparing a passivated contact crystalline silicon cell without edge cut loss according to claim 1 wherein the step S1 is to cut the silicon wafer into at least two slices and/or cut grooves on the surface of the silicon wafer.
3. The method for preparing a passivated contact crystalline silicon cell without edge cut loss according to claim 2, wherein the depth of the cut groove formed by cutting the surface of the silicon wafer in the step S1 is 1-90 μm.
4. The method for preparing a passivated contact crystalline silicon cell without edge cut loss as claimed in claim 1 wherein the boron diffusion in step S3 is a boron diffusion to the front side of the silicon wafer.
5. The method as claimed in claim 1, wherein the boron diffusion temperature in step S3 is 900-1050 ℃.
6. The method of claim 1, wherein the chemical etching in step S4 is HF and HNO3And repairing the silicon wafer by corrosion of the solution.
7. The method for preparing a passivated contact crystalline silicon cell without edge cut loss according to claim 1 wherein the thickness of the thin layer of silicon oxide in step S5 is 0.1-2 nm.
8. The method of claim 1, wherein the polysilicon layer in step S5 is phosphorus doped deposited on the thin silicon oxide layer using N + type polysilicon.
9. The method of claim 1, wherein the polysilicon layer in step S5 is 10-200 nm.
10. A passivated contact crystalline silicon cell without edge cutting loss is characterized in that the passivated contact crystalline silicon cell without edge cutting loss is prepared by the preparation method of the passivated contact crystalline silicon cell without edge cutting loss according to any one of claims 1 to 9.
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