CN114157258A - Wafer-level packaging structure of temperature compensation type surface acoustic wave filter and manufacturing method - Google Patents
Wafer-level packaging structure of temperature compensation type surface acoustic wave filter and manufacturing method Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 57
- 238000010897 surface acoustic wave method Methods 0.000 title claims abstract description 24
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 118
- 238000005530 etching Methods 0.000 claims abstract description 55
- 238000000034 method Methods 0.000 claims abstract description 54
- 238000000151 deposition Methods 0.000 claims abstract description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 90
- 239000010703 silicon Substances 0.000 claims description 90
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 87
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 47
- 229910052681 coesite Inorganic materials 0.000 claims description 28
- 229910052906 cristobalite Inorganic materials 0.000 claims description 28
- 239000000377 silicon dioxide Substances 0.000 claims description 28
- 229910052682 stishovite Inorganic materials 0.000 claims description 28
- 229910052905 tridymite Inorganic materials 0.000 claims description 28
- 238000011049 filling Methods 0.000 claims description 7
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- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 238000010884 ion-beam technique Methods 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 230000001154 acute effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 16
- 235000012239 silicon dioxide Nutrition 0.000 description 16
- 229920000642 polymer Polymers 0.000 description 15
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/02—Details
- H03H9/05—Holders; Supports
- H03H9/10—Mounting in enclosures
- H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
- H03H9/46—Filters
- H03H9/64—Filters using surface acoustic waves
Abstract
The invention provides a wafer-level packaging structure of a temperature compensation type surface acoustic wave filter and a manufacturing method thereof. The manufacturing method comprises the steps of obtaining a TC-SAW filter wafer, manufacturing a filter IDT interdigital structure on the TC-SAW filter wafer, wherein IDTs are electrically connected with metal strips and IDT reflection grid side metal strips; depositing and covering a temperature compensation layer SiO on the upper surfaces of the TC-SAW filter wafer and the IDT interdigital structure of the filter, the IDT electrical connection metal strip and the IDT reflection grid side metal strip2(ii) a Removing the temperature compensation layer SiO on the upper surface of the IDT electrical connection metal strip in an etching mode2The method is used for forming a contact window and carrying out process flow steps such as BusBar metal layer arrangement on the contact window.
Description
Technical Field
The invention provides a wafer-level packaging structure of a temperature compensation type surface acoustic wave filter and a manufacturing method, belonging to the technical field of filter manufacturing.
Background
A temperature compensation type surface acoustic wave filter (TC-SAW) which naturally places a SiO2 layer of 1-1.5 um on the wafer surface as a temperature compensation layer, and the SiO2 layer is precisely flattened and precisely controlled in thickness in the whole wafer range, otherwise the frequency of the filter is biased, and the SiO2 layer is natural SiO2-Si bonding material fusion bonding, if the SiO2 layer can be directly utilized to realize the bonding of SiO2-Si and form a cavity structure above the IDT, the structure is more excellent than a wafer level packaging structure made by using a double-layer organic film, the bonding strength is high, the adhesion is good, the isolation to the external environment is good, the reliability is high, the cost is low because expensive organic film materials are not used any more, and because the rigidity of Si can reliably make RDL on a wiring metal layer, the layout of the filter chip design can be more flexible, and the chip area can be reduced, the cost is reduced. However, one difficulty in directly using the temperature compensation layer SiO2 for SiO2-Si bonding is that the BusBar metal layer of the filter or the PAD metal layer called as the external electrical connection metal PAD, i.e. the aforementioned 140 layers, generally needs to be set to be 2-3 um in thickness to reduce the impedance of the filter, which is 1-2 um higher than the SiO2 surface, i.e. the height of the SiO2 layer is not at the highest position of the wafer surface and cannot be directly contacted with Si for bonding. It is of course possible to recess the Siwafer on one side relative to the busbaral metal layer above that which is slightly deeper than the height of the BusBarMetal above SiO2 so that the Si contacts the SiO2 surface while the BusBarMetal still does not touch the Si during bonding, which has the disadvantage of leaving a gap between the Si and padmedetal, causing the following problems:
firstly, the method comprises the following steps: a TSV structure needs to be formed on Si to communicate with the PAD metal layer of the filter, and then an external electrical connection is formed by forming a metal layer in the TSV, which is cumbersome in manufacturing process.
Secondly, the method comprises the following steps: the TSV is formed through a deep silicon etching process, organic polymers are required to be generated in the etching process and attached to the side wall of the TSV hole to guarantee the etching appearance and surface smoothness, and the polymers must be cleaned through a chemical cleaning process after etching. Because the gap is reserved between the TSV hole bottom and the PAD Metal, chemicals can enter the filter through the gap in the chemical cleaning process and cannot be cleaned out subsequently, and therefore the filter chip is invalid.
Thirdly, the method comprises the following steps: or etching a half through hole TSV on Si and cleaning a polymer, then bonding the TSV to a filter wafer, and thinning Si by using a Si Grinding process Back Side Grinding to expose the TSV, so that the polymer cleaning problem is solved, but Si slurry generated by a water mixing process in the thinning process enters a filter through a gap to cause the filter to be invalid.
Disclosure of Invention
The invention provides a wafer-level packaging structure and a manufacturing method of a temperature compensation type surface acoustic wave filter, which are used for solving the problems that in the prior art, a temperature compensation layer SiO2 is directly bonded with SiO2-Si, so that the manufacturing process is complicated, and a filter chip is easy to lose efficacy:
the manufacturing method of the wafer level packaging structure of the temperature compensation type surface acoustic wave filter comprises the following steps:
step 1, obtaining a TC-SAW filter wafer 1000, and manufacturing a filter IDT interdigital structure 1100 on the TC-SAW filter wafer, wherein IDTs are electrically connected with a metal strip 1200 and an IDT reflection grid side metal strip 1300;
step 2, depositing and covering a temperature compensation layer SiO on the upper surfaces of the TC-SAW filter wafer 1000, the IDT interdigital structure 1100 of the filter, the IDT electrical connection metal strip 1200 and the IDT reflection grid side metal strip 130021400；
Step 3, removing the temperature compensation layer SiO on the upper surface of the IDT electrical connection metal strip 1200 by etching 21400 is used for forming a contact window and conducting BusBar metal layer setting on the contact window; at the same time, the temperature compensation layer SiO 21400 is subjected to a partial removal process. SiO of other region2Including the chip dicing channel surface is completely reserved to reserve SiO which can be bonded as much as possible2A surface.
Step 4, obtaining a silicon cap wafer 2000 and depositing SiO on the silicon cap wafer 20002 Layer 2010 serves as a silicon surface protection layer for silicon cap wafer 2000; so as to avoid the problem of subsequent Si-SiO2fusion bonding quality caused by the damage of the Si surface in the manufacturing method of the silicon cap manufacturing structure.
Step 5, etching the silicon cover wafer 2000 with the silicon surface protection layer to form a groove 4000, wherein the position of the groove 4000 is vertically aligned with the positions of the IDT interdigital structure 1100 of the filter and the BusBar metal layer;
step 6, forming a through silicon via TSV3000 in the groove 4000 in an etching mode, wherein the position of the through silicon via TSV3000 vertically corresponds to the position where the BusBar metal layer extends;
step 7, stripping the SiO by using hydrofluoric acid solution2Layer 2010;
step 8, bonding the silicon cover wafer 2000 to the TC-SAW filter wafer 1000 in an aligned manner; a void cavity above IDT1100 is formed and an effect of 1500 a distance <1um from the silicon substrate is achieved.
Step 9, forming an external connection electrical structure on the silicon cap wafer 2000.
Further, the thickness of the interdigital structure in the step 1 is less than 0.8 μm.
Further, the IDT structure 1100, the IDT electrically connecting metal strip 1200 and the IDT reflecting grating side metal strip 1300 are made of the same material and have the same thickness.
Further, conducting BusBar metal layer setting on the contact window; at the same time, the temperature compensation layer SiO 21400 performing a partial removal process comprising:
301, depositing a BusBar metal layer 1500 on the contact window by means of a manufacturing method of a Lift-off structure, and extending a part of the layer body of the BusBar metal layer 1500 to the temperature compensation layer SiO 21400;
step 302, testing the TC-SAW filter wafer 1000 to obtain a frequency parameter of the TC-SAW filter wafer 1000;
step 303, utilizing an ion beam trim frequency modulation mode to carry out SiO treatment on the temperature compensation layer 21400 perform a surface portion removal. Wherein the amount of surface portion removal corresponds to a frequency profile of the TC-SAW filter wafer 1000.
Specifically, a small part of the temperature compensation layer SiO2 is removed by high-precision control, so that the frequency of the filter is just to the required working frequency, the manufacturing method of the used structure is ion beam etching, the etching rate is slow, the etching amount of each region of the wafer can be adjusted according to the frequency subdivision diagram of the filter on the wafer, the purpose that the frequency of each filter is corrected to the required value is achieved, when the surface SiO2 is removed, all materials on the surface of the whole wafer are removed by the surface of the small part, and the process removes the part of the surface of the SiO2, which is polluted by the previous manufacturing method of some structures, so that the normal operation of the subsequent SiO2-Si bonding is ensured.
Further, the thickness of the BusBar metal layer 1500 is in a range of 2-3 μm.
Further, the silicon cap wafer 2000 of step 4 is made of high-resistivity silicon (resistance is typically required to be >3000ohm.
Further, in step 5, the depth of the groove 4000 is greater than the thickness of the BusBar metal layer, wherein the difference between the depths of the groove 4000 and the thickness of the BusBar metal layer is not more than 1 μm.
Further, the through silicon via TSV3000 in step 6 is of a trapezoidal structure with an upper opening smaller than a lower opening; the acute angles of the two sides of the small bottom edge of the trapezoid structure range from 85 degrees to 87 degrees.
Further, the step 9 of forming an external connection electrical structure on the silicon cap wafer 2000 includes:
step 901, thinning the silicon cap wafer 2000 by using a grinding process, wherein the thickness standard of the thinned silicon cap wafer 2000 is 10-20 um higher than the bottom of the TSV 3000; here, the exposed TSV3000 cannot be directly ground, otherwise the Si slurry generated by the water mixing process during the grinding thinning process may enter the filter through the gap to cause the filter to fail;
step 902, performing Si etching on the silicon cover wafer 2000 by using deep silicon etching equipment to expose a through silicon via TSV 3000; the pure Si etching process parameters are used for setting without a polymer deposition process step during etching, and etching appearance protection is not needed to be considered at the moment, so that the through hole is exposed without a polymer problem, a subsequent wet chemical cleaning process is not needed, and the condition that a device fails due to the fact that chemical cleaning liquid and water enter the filter through gaps is avoided. In the etching process, proper over-etching can be performed, so that the inclination angle of the TSV is increased by utilizing the process characteristic that the etching speed of the surface of the TSV is high and the etching speed of the bottom of the TSV is low, the subsequent filling of electrical connection metal is facilitated, the depth and the opening size of the TSV half-through hole can be optimized to combine the over-etching amount, and the finally suitable opening size and inclination angle are achieved under the condition that the needed residual silicon thickness is achieved.
Step 903, depositing an electrical connection metal layer 2100 on the silicon cap wafer 2000 and the through silicon via TSV3000, wherein the electrical connection metal layer 2100 may be a Ti/Cu stack layer, and the thickness of the electrical connection metal layer at the bottom of the through silicon via TSV3000 needs to be greater than 1.5um to ensure that the thickness of the electrical connection metal layer exceeds a gap of 1um, so as to ensure the reliability of electrical connection.
Step 904, filling the metal 2200 (for example, filling Cu metal) into the through-silicon via TSV3000, wherein the height of the metal 2200 is higher than the surface of the electrical connection metal layer 2100;
step 905, removing the electrical connection metal layer 2100 on the periphery of the top of the through silicon via TSV3000 by etching;
at step 906, solder balls 2300 are formed on the metal 2200.
The wafer-level packaging structure of the temperature compensation type surface acoustic wave filter is formed by the manufacturing method of the wafer-level packaging structure of the temperature compensation type surface acoustic wave filter.
The invention has the beneficial effects that:
the temperature compensation type surface acoustic wave filter wafer level packaging structure and the manufacturing method can directly lead Si and SiO to be mixed in the packaging process2Bonding connection is carried out, and Si and SiO are effectively improved2The bonding quality of direct bonding is improved, and in the bonding process, a mode of forming the TSV through holes in a deep silicon time mode and then bonding is adopted, so that organic polymer attachments generated by the TSV through holes generated by bonding and etching can be effectively avoided, a polymer deposition process flow and a wet chemical cleaning process are not needed, a polymer cannot be attached to or wet chemicals cannot permeate into gaps between the TSV through holes and the BusBar metal layer, and further, the Si and SiO are effectively improved2Bonding quality and bonding efficiency, simultaneously, can effectively avoid the adverse effect to bonding structure to filter chip performance.
Drawings
FIG. 1 is a first structural diagram illustrating a manufacturing process of a wafer level package structure of a temperature compensated SAW device according to the present invention;
FIG. 2 is a second structural diagram illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 3 is a third schematic structural diagram illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 4 is a structural diagram of a fourth manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 5 is a fifth structural diagram illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 6 is a sixth schematic structural diagram illustrating a manufacturing process of the wafer-level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 7 is a seventh structural diagram illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 8 is a structural diagram illustrating an eighth exemplary fabrication process of a wafer level package structure of a temperature compensated SAW device in accordance with the present invention;
FIG. 9 is a structural diagram of a ninth manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 10 is a schematic structural diagram of a manufacturing process of a wafer level package structure of a temperature compensated SAW device according to the present invention;
FIG. 11 is a structural diagram illustrating an eleventh exemplary fabrication process of a wafer level package structure of a temperature compensated SAW device in accordance with the present invention;
FIG. 12 is a twelfth structural view illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 13 is a structural diagram of a thirteen manufacturing process of the wafer-level package structure of the temperature compensated SAW filter according to the present invention;
FIG. 14 is a structural diagram of a fourteenth embodiment of a manufacturing process of a wafer level package structure of a temperature compensated SAW device according to the present invention;
FIG. 15 is a fifteenth schematic structural view illustrating a manufacturing process of the wafer level package structure of the temperature compensated SAW filter according to the present invention;
fig. 16 is a schematic diagram of a wafer level package structure of the temperature compensated saw filter according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
The embodiment of the invention provides a manufacturing method of a wafer-level packaging structure of a temperature compensation type surface acoustic wave filter, wherein a groove is formed on a Si wafer to form a cavity structure above an IDT and a PAD Metal (the depth of the groove can be accurately controlled to be less than 1.0um larger than the thickness of the PAD Metal, the height of the gap is reduced as much as possible so as to be beneficial to the subsequent formation of Metal contact for external electrical connection), and then a through hole TSV with half depth is formed in the groove (according to the technological capability of deep silicon etching in the industry, the TSV can be etched into a slightly trapezoidal shape so as to be beneficial to the subsequent padding of a Metal layer). The method comprises the steps of directly bonding Si to a filter wafer, thinning the Si until the through hole TSV is about to be exposed (about 10-20 umSi is reserved without exposing the TSV), then etching the Si by using deep silicon etching equipment to expose the TSV, setting pure Si etching process parameters during etching without performing a polymer deposition process step (at the moment, the through hole TSV is not formed by etching, etching appearance protection is not needed to be considered), exposing the through hole without a polymer problem, and then performing a wet chemical cleaning process. And depositing a metal layer with enough thickness into the TSV, wherein the thickness is higher than the gap, and forming effective electric connection. As shown in fig. 1 to 15, the process of the method for manufacturing the wafer level package structure of the temperature compensation type saw includes:
step 1, obtaining a TC-SAW filter wafer 1000, and manufacturing a filter IDT interdigital structure 1100 on the TC-SAW filter wafer, wherein IDTs are electrically connected with a metal strip 1200 and an IDT reflection grid side metal strip 1300; wherein the thickness of the interdigital structure is less than 0.8 μm. The IDT structure 1100, the IDT electrically connecting metal strip 1200 and the IDT reflecting grating side metal strip 1300 are made of the same material and have the same thickness.
Step 2, depositing and covering a temperature compensation layer SiO on the upper surfaces of the TC-SAW filter wafer 1000, the IDT interdigital structure 1100 of the filter, the IDT electrical connection metal strip 1200 and the IDT reflection grid side metal strip 130021400；
Step 3, removing the upper surface of the IDT electrical connection metal strip 1200 by etchingSurface temperature compensation layer SiO21400 is used for forming a contact window and conducting BusBar metal layer setting on the contact window; at the same time, the temperature compensation layer SiO21400 is subjected to a partial removal process. SiO of other region2Including the chip dicing channel surface is completely reserved to reserve SiO which can be bonded as much as possible2A surface.
Step 4, obtaining a silicon cap wafer 2000 and depositing SiO on the silicon cap wafer 20002 Layer 2010 serves as a silicon surface protection layer for silicon cap wafer 2000; so as to avoid the problem of subsequent Si-SiO2fusion bonding quality caused by the damage of the Si surface in the manufacturing method of the silicon cap manufacturing structure.
Step 5, etching the silicon cover wafer 2000 with the silicon surface protection layer to form a groove 4000, wherein the position of the groove 4000 is vertically aligned with the positions of the IDT interdigital structure 1100 of the filter and the BusBar metal layer;
step 6, forming a through silicon via TSV3000 in the groove 4000 in an etching mode, wherein the position of the through silicon via TSV3000 vertically corresponds to the position where the BusBar metal layer extends;
step 7, stripping the SiO by using hydrofluoric acid solution2Layer 2010;
step 8, bonding the silicon cover wafer 2000 to the TC-SAW filter wafer 1000 in an aligned manner; a void cavity above IDT1100 is formed and an effect of 1500 a distance <1um from the silicon substrate is achieved.
Step 9, forming an external connection electrical structure on the silicon cap wafer 2000.
Setting a BusBar metal layer on the contact window; at the same time, the temperature compensation layer SiO21400 performing a partial removal process comprising:
301, depositing a BusBar metal layer 1500 on the contact window by means of a manufacturing method of a Lift-off structure, and extending a part of the layer body of the BusBar metal layer 1500 to the temperature compensation layer SiO21400; wherein the thickness range of the BusBar metal layer 1500 is 2-3 μm.
Step 302, testing the TC-SAW filter wafer 1000 to obtain a frequency parameter of the TC-SAW filter wafer 1000;
step 303, utilizing an ion beam trim frequency modulation mode to carry out SiO treatment on the temperature compensation layer 21400 perform a surface portion removal. Wherein the amount of surface portion removal corresponds to a frequency profile of the TC-SAW filter wafer 1000.
Specifically, a small part of the temperature compensation layer SiO2 is removed by high-precision control, so that the frequency of the filter is just to the required working frequency, the manufacturing method of the used structure is ion beam etching, the etching rate is slow, the etching amount of each region of the wafer can be adjusted according to the frequency subdivision diagram of the filter on the wafer, the purpose that the frequency of each filter is corrected to the required value is achieved, when the surface SiO2 is removed, all materials on the surface of the whole wafer are removed by the surface of the small part, and the process removes the part of the surface of the SiO2, which is polluted by the previous manufacturing method of some structures, so that the normal operation of the subsequent SiO2-Si bonding is ensured.
The silicon cap wafer 2000 of step 4 is made of high-resistivity silicon (resistance is generally required to be greater than 3000ohm.
And 5, the depth of the groove 4000 is larger than the thickness of the BusBar metal layer, wherein the depth difference of the depth of the groove 4000 exceeding the thickness of the BusBar metal layer is not more than 1 μm.
Step 6, the TSV3000 of the through silicon via adopts a trapezoidal structure with an upper opening smaller than a lower opening; the acute angles of the two sides of the small bottom edge of the trapezoid structure range from 85 degrees to 87 degrees.
Forming an external connection electrical structure on the silicon cap wafer 2000 as described in step 9 includes:
step 901, thinning the silicon cap wafer 2000 by using a grinding process, wherein the thickness standard of the thinned silicon cap wafer 2000 is 10-20 um higher than the bottom of the TSV 3000; here, the exposed TSV3000 cannot be directly ground, otherwise the Si slurry generated by the water mixing process during the grinding thinning process may enter the filter through the gap to cause the filter to fail;
step 902, performing Si etching on the silicon cover wafer 2000 by using deep silicon etching equipment to expose a through silicon via TSV 3000; the pure Si etching process parameters are used for setting without a polymer deposition process step during etching, and etching appearance protection is not needed to be considered at the moment, so that the through hole is exposed without a polymer problem, a subsequent wet chemical cleaning process is not needed, and the condition that a device fails due to the fact that chemical cleaning liquid and water enter the filter through gaps is avoided. In the etching process, proper over-etching can be performed, so that the inclination angle of the TSV is increased by utilizing the process characteristic that the etching speed of the surface of the TSV is high and the etching speed of the bottom of the TSV is low, the subsequent filling of electrical connection metal is facilitated, the depth and the opening size of the TSV half-through hole can be optimized to combine the over-etching amount, and the finally suitable opening size and inclination angle are achieved under the condition that the needed residual silicon thickness is achieved.
Step 903, depositing an electrical connection metal layer 2100 on the silicon cap wafer 2000 and the through silicon via TSV3000, wherein the electrical connection metal layer 2100 may be a Ti/Cu stack layer, and the thickness of the electrical connection metal layer at the bottom of the through silicon via TSV3000 needs to be greater than 1.5um to ensure that the thickness of the electrical connection metal layer exceeds a gap of 1um, so as to ensure the reliability of electrical connection.
Step 904, filling the metal 2200 (for example, filling Cu metal) into the through-silicon via TSV3000, wherein the height of the metal 2200 is higher than the surface of the electrical connection metal layer 2100;
step 905, removing the electrical connection metal layer 2100 on the periphery of the top of the through silicon via TSV3000 by etching;
at step 906, solder balls 2300 are formed on the metal 2200.
The effect of the above technical scheme is as follows: the manufacturing method of the wafer-level packaging structure of the temperature compensation type SAW filter provided by the embodiment can directly use Si and SiO in the packaging process2Bonding connection is carried out, and Si and SiO are effectively improved2The bonding quality of direct bonding is realized, and in the bonding process, the TSV through holes are formed in a deep silicon time mode firstly and then bonded, so that organic polymer attachments generated in etching due to bonding can be effectively avoided, a polymer deposition process flow and a wet chemical cleaning process are not needed, and a gap between the TSV through holes and the BusBar metal layer is not formedCan be adhered with polymer or infiltrated with wet chemicals, and further effectively improve Si and SiO2Bonding quality and bonding efficiency, simultaneously, can effectively avoid the adverse effect to bonding structure to filter chip performance.
In one embodiment of the present invention, a portion of the bulk of the BusBar metal layer 1500 extends to the temperature compensated SiO layer 21400, wherein the maximum extension length of the extended portion of the BusBar metal layer 1500 satisfies the following condition:
3.7D≤L≤4.8D
wherein L represents the maximum extension length of the extension of the BusBar metal layer; d represents the thickness of the BusBar metal layer.
The effect of the above technical scheme is as follows: the extended length of the BusBar metal layer obtained in the above mode can ensure that the extended part of the BusBar metal layer has enough performance function, the extended length of the BusBar metal layer is reduced to the maximum extent, and the bonding contact area is improved to the maximum extent while the size of the packaging structure can be effectively reduced in the mode of reducing the extended length to the maximum extent, so that the bonding quality is effectively improved.
An embodiment of the present invention provides a wafer-level package structure of a temperature compensation type saw filter, as shown in fig. 16, the wafer-level package structure of the temperature compensation type saw filter is a wafer-level package structure formed by using the manufacturing method of the wafer-level package structure of the temperature compensation type saw filter.
Specifically, the package structure includes a TC-SAW filter wafer 1000 and a silicon cap wafer 2000; the TC-SAW filter wafer 1000 and the silicon cover wafer 2000 are connected in a bonding mode; the TC-SAW filter wafer 1000 is provided with a filter IDT interdigital structure 1100, and an IDT is electrically connected with a metal strip 1200 and an IDT reflection grid side metal strip 1300; a temperature compensation layer SiO is arranged on the upper surfaces of the TC-SAW filter wafer 1000, the IDT interdigital structure 1100 of the filter, the IDT electrical connection metal strip 1200 and the IDT reflection grid side metal strip 130021400; further, a non-adhesion temperature compensation layer SiO is provided on the IDT metal strip 120021400 of contact window; a BusBar metal layer 1500 is disposed on the contact,and the outer edge of the BusBar metal layer 1500 covers to the temperature compensation layer SiO21400; the BusBar metal layer 1500 is connected to the IDT electrical connection metal strip 1200; a groove structure is arranged on the upper surface of the BusBar metal layer 1500 positioned above the contact window; a groove 4000 is formed in the silicon cover wafer 2000; the groove 4000 corresponds to the filter IDT interdigital structure 1100 and the IDT electrical connection metal strip 1200; a through silicon via TSV3000 is arranged in the groove 4000; an electrical connection metal layer 2100 is arranged on the inner wall of the through silicon via TSV 3000; a metal 2200 is filled in the groove structure formed in the electrical connection metal layer 2100, and a solder ball 2300 is disposed on the metal 2200. When the TC-SAW filter wafer 1000 and the silicon cap wafer 2000 are bonded, the cavity 4000 may form a cavity inside the filter wafer.
The effect of the above technical scheme is as follows: the wafer-level packaging structure of the temperature compensation type SAW filter provided by the embodiment can directly use Si and SiO in the packaging process2Bonding connection is carried out, and Si and SiO are effectively improved2The bonding quality of direct bonding is improved, and the mode of forming the TSV through holes in a deep silicon time mode and then bonding is adopted in the bonding process, so that organic polymer attachments generated in etching due to bonding can be effectively avoided, a polymer deposition process flow and a wet chemical cleaning process are not needed, a polymer cannot be attached to a gap between the TSV through holes and the BusBar metal layer or wet chemicals cannot permeate into the gap, and further, the Si and SiO metal layer is effectively improved2Bonding quality and bonding efficiency, simultaneously, can effectively avoid the adverse effect to bonding structure to filter chip performance.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. The manufacturing method of the wafer-level packaging structure of the temperature compensation type surface acoustic wave filter is characterized in that the manufacturing method of the wafer-level packaging structure of the temperature compensation type surface acoustic wave filter comprises the following steps:
step 1, obtaining a TC-SAW filter wafer (1000), and manufacturing a filter IDT interdigital structure (1100) on the TC-SAW filter wafer, wherein the IDT is electrically connected with a metal strip (1200) and an IDT reflection grating side metal strip (1300);
step 2, depositing and covering a temperature compensation layer SiO on the upper surfaces of the TC-SAW filter wafer (1000), the IDT interdigital structure (1100), the IDT electrical connection metal strip (1200) and the IDT reflection grid side metal strip (1300)2（1400）；
Step 3, removing the temperature compensation layer SiO on the upper surface of the IDT electrical connection metal strip (1200) in an etching mode2(1400) The method is used for forming a contact window and carrying out BusBar metal layer arrangement on the contact window; at the same time, the temperature compensation layer SiO2(1400) Carrying out partial removal treatment on the surface;
step 4, obtaining a silicon cover wafer (2000), and depositing SiO on the silicon cover wafer (2000)2The layer (2010) acts as a silicon surface protection layer for the silicon cap wafer (2000);
step 5, etching a silicon cover wafer (2000) with a silicon surface protection layer to form a groove (4000), wherein the position of the groove (4000) is vertically aligned with the positions of the IDT (IDT) structure (1100) of the filter and the BusBar metal layer;
step 6, forming a through silicon via TSV (3000) in the groove (4000) in an etching mode, wherein the position of the through silicon via TSV (3000) vertically corresponds to the position where the BusBar metal layer extends;
step 7, stripping the SiO by using hydrofluoric acid solution2A layer (2010);
step 8, bonding the silicon cover wafer (2000) to the TC-SAW filter wafer (1000) in an alignment mode;
and 9, forming an external connection electric structure on the silicon cover wafer (2000).
2. The method for manufacturing the wafer level package structure of the temperature compensated SAW filter of claim 1, wherein the thickness of the interdigital structure of step 1 is less than 0.8 μm.
3. The manufacturing method of wafer level package structure of temperature compensated SAW device of claim 1, wherein the IDT interdigital structure (1100), IDT electrical connection metal strip (1200) and IDT reflection side metal strip (1300) of said filter are made of the same material and thickness.
4. The method for manufacturing the wafer level package structure of the temperature compensated SAW filter of claim 1, wherein the BusBar metal layer is disposed on the contact window; at the same time, the temperature compensation layer SiO2(1400) The surface is subjected to a partial removal process comprising:
301, depositing a BusBar metal layer (1500) on the contact window by a manufacturing method of a Lift-off structure, and extending a part of the layer body of the BusBar metal layer (1500) to the temperature compensation layer SiO2(1400) An upper surface of;
step 302, testing the TC-SAW filter wafer (1000) to obtain a frequency parameter of the TC-SAW filter wafer (1000);
step 303, utilizing an ion beam trim frequency modulation mode to carry out SiO treatment on the temperature compensation layer2(1400) Surface portion removal is performed.
5. The method for manufacturing the wafer level package structure of the temperature compensated SAW device of claim 4, wherein the thickness of the BusBar metal layer (1500) is in the range of 2-3 μm.
6. The method for manufacturing a wafer-level package structure of a temperature compensated SAW device of claim 1, wherein the silicon cap wafer (2000) of step 4 is made of high-resistivity silicon.
7. The method for manufacturing the wafer level package structure of the temperature compensated SAW filter in claim 1, wherein in step 5, the depth of the groove (4000) is larger than the thickness of the BusBar metal layer, wherein the difference of the depth of the groove (4000) exceeding the thickness of the BusBar metal layer is not more than 1 μm.
8. The manufacturing method of the wafer level package structure of the temperature compensation type SAW (surface acoustic wave) filter according to claim 1, wherein the through-silicon via TSV (3000) of step 6 is in a trapezoidal structure with an upper opening smaller than a lower opening; the acute angles of the two sides of the small bottom edge of the trapezoid structure range from 85 degrees to 87 degrees.
9. The method for manufacturing the wafer-level package structure of the temperature compensated SAW filter according to claim 1, wherein the step 9 of forming an external connection electrical structure on the silicon cap wafer (2000) comprises:
step 901, thinning the silicon cover wafer (2000) by using a grinding process, wherein the thickness standard of the thinned silicon cover wafer (2000) is 10-20 um higher than the bottom of the Through Silicon Via (TSV) (3000);
step 902, performing Si etching on the silicon cover wafer (2000) by using deep silicon etching equipment to expose a Through Silicon Via (TSV) (3000);
step 903, depositing an electrical connection metal layer (2100) on the silicon cover wafer (2000) and the through silicon via TSV (3000);
step 904, filling metal (2200) in the through silicon via TSV (3000) completely, wherein the height of the metal (2200) is higher than the surface of the electrical connection metal layer (2100);
step 905, removing the electrical connection metal layer (2100) on the periphery of the top of the through silicon via TSV (3000) in an etching mode;
step 906, forming solder balls (2300) on the metal (2200).
10. The wafer level package structure of the temperature compensation type SAW filter, wherein the wafer level package structure of the temperature compensation type SAW filter is formed by the manufacturing method of the wafer level package structure of claim 1.
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