CN114138091A - Method and device for controlling output voltage according to memory quantity - Google Patents
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- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
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Abstract
The invention provides a method, a system, equipment and a storage medium for controlling output voltage according to the number of memories, wherein the method comprises the following steps: acquiring memory in-place signals, and determining the number of memories in place at present according to the memory in-place signals; determining corresponding reference current according to the number of the memories in place at present, and determining voltage drop according to the reference current and reference resistance; determining an output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage; and adjusting the present output voltage to the output voltage in response to the present output voltage not being equal to the output voltage. According to the invention, the corresponding output voltage is adjusted according to the current in-place memory quantity, and the power supply safety is improved on the basis of protecting the memory component.
Description
Technical Field
The present invention relates to the field of servers, and more particularly, to a method, system, device, and storage medium for controlling an output voltage according to the amount of memory.
Background
Since the main stream of a general server is mainly an Intel platform, a power supply design for a memory generally adopts a load (Loadline) of an Intel specification to control a power supply architecture. Loadline is a method for controlling a large current to reduce an output Voltage and prevent a Voltage overvoltage. When the current is larger, the output Voltage is lower, and the purpose of reducing the Voltage overvoltage is achieved.
However, in general, the level of the output voltage needs to be adjusted high in the control architecture such as Loadline, so as to avoid the situation that the output voltage is low due to the existence of Loadline, but if a small number of memories are supported, the output voltage is excessively high, and the situation that the output voltage is excessively high is easy to occur in a small-current light load.
For example, when 8 DDRs (Double Data Rate, memory) exist: 15W x 8pcs/1.2V 120W/1.2 100A, while Intel specifies a Loadline of 0.25m ohm, which is converted to a pressure drop of 100A 0.25m ohm 25mV by a formula, reducing the standard 1.2V output voltage to 1.175V. Therefore, the output voltage is usually adjusted to 1.2V +25mV to 1.225V to avoid the output voltage being too low. However, when the output voltage is adjusted to 1.225V, another problem occurs when 1 DDR is supported: 15W x 1pcs/1.2V ═ 12.5A, and was obtained by the formula: the voltage drop of 12.5A × 0.25m ohm ═ 3.125mV, because the output voltage is initially set to 1.225V in order to support 8 memories, the output voltage is still 1.221875V, which is higher than the originally required 1.2V, even after the 3.125mV is deducted, and 1.26V is very close to the maximum voltage of the memory specification, which easily generates overvoltage, thereby causing system power failure, even causing memory failure and burnout.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method, a system, a computer device, and a computer readable storage medium for controlling an output voltage according to the number of memories, in which a detection circuit architecture can effectively determine the number of DDRs and enable a VR controller to update the level of the output voltage through a resistor at S3 (sleep state), so as to achieve the purpose of completing the update of a set value before entering S0 (working state), effectively reduce the overvoltage, and improve the power safety while protecting the memory components.
In view of the foregoing, an aspect of the embodiments of the present invention provides a method for controlling an output voltage according to the number of memories, including the following steps: acquiring memory in-place signals, and determining the number of memories in place at present according to the memory in-place signals; determining corresponding reference current according to the number of the memories in place at present, and determining voltage drop according to the reference current and reference resistance; determining an output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage; and adjusting the present output voltage to the output voltage in response to the present output voltage not being equal to the output voltage.
In some embodiments, the determining the number of memory currently in place according to the memory in place signal includes: determining the memory bit in response to the memory bit signal being at a high level; and responding to the low level of the memory bit signal, and asynchronously resetting the memory.
In some embodiments, the determining the corresponding reference current according to the number of memories currently in place includes: and taking the ratio of the product of the memory number at the current position and the reference load to the reference voltage as the reference current.
In some embodiments, said determining a voltage drop from said reference current and a reference resistance comprises: multiplying the reference current and the reference resistance to determine a voltage drop.
In some embodiments, said determining an output voltage from said voltage drop and a reference voltage comprises: adding the voltage drop to the reference voltage to determine the output voltage.
In some embodiments, the method further comprises: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the method further comprises: and adjusting the threshold value according to the size of the reference load.
In another aspect of the embodiments of the present invention, a system for controlling an output voltage according to the number of memories includes: the acquisition module is configured to acquire the memory in-place signals and determine the number of the memories in place according to the memory in-place signals; the voltage drop module is configured to determine a corresponding reference current according to the number of the memories in place at present, and determine a voltage drop according to the reference current and a reference resistor; the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage; and an adjustment module configured to adjust the present output voltage to the output voltage in response to the present output voltage not being equal to the output voltage.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method as above.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has the following beneficial technical effects: through the detection circuit framework, the DDR quantity can be effectively determined, the VR controller can update the level of the output voltage through the resistor in the sleep state, the purpose of updating the set value before entering the working state is achieved, the overvoltage condition is effectively reduced, and the power supply safety is improved on the basis of protecting the memory component.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a diagram illustrating an embodiment of a method for controlling an output voltage according to the amount of memory according to the present invention;
FIG. 2 is a diagram illustrating an embodiment of a system for controlling an output voltage according to the amount of memory;
FIG. 3 is a schematic diagram of a hardware structure of an embodiment of a computer device for controlling an output voltage according to the amount of memory according to the present invention;
FIG. 4 is a diagram of a computer storage medium for controlling an output voltage according to the amount of memory according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In a first aspect of the embodiments of the present invention, an embodiment of a method for controlling an output voltage according to a memory amount is provided. Fig. 1 is a schematic diagram illustrating an embodiment of a method for controlling an output voltage according to the number of memories according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, acquiring memory in-place signals, and determining the number of memories in place according to the memory in-place signals;
s2, determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and reference resistance;
s3, determining an output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage; and
s4, responding to the current output voltage not being equal to the output voltage, adjusting the current output voltage to the output voltage.
And acquiring a memory in-place signal, and determining the memory quantity of the current in-place according to the memory in-place signal. The traditional output voltage can not be changed after being fixed, and can not be adjusted due to the DDR number. The memory number of the current bit is determined by the signal of the memory self RESET _ N, and the asynchronous RESET is effective at a low level: when this signal is low, the reset of the device is turned on and vice versa. In normal operation, this signal must be high. When the memory is loaded, the RESET _ N signal rises to a high level, so that the number of the memory can be freely allocated according to different memory allocation requirements of the client, and the maximum full allocation of 8 memories can be supported in the embodiment of the invention. In other embodiments, the maximum configurable memory amount may be set according to the architecture.
In some embodiments, the determining the number of memory currently in place according to the memory in place signal includes: determining the memory bit in response to the memory bit signal being at a high level; and responding to the low level of the memory bit signal, and asynchronously resetting the memory.
And determining corresponding reference current according to the number of the memories in the current position, and determining voltage drop according to the reference current and the reference resistance.
In some embodiments, the determining the corresponding reference current according to the number of memories currently in place includes: and taking the ratio of the product of the memory number at the current position and the reference load to the reference voltage as the reference current. For example, when there are 8 DDRs, the reference current is 15W x 8 pcs/1.2V-120W/1.2V-100A, and when there are 1 DDR, the reference current is 15W x 1 pcs/1.2V-15W/1.2V-12.5A.
In some embodiments, said determining a voltage drop from said reference current and a reference resistance comprises: multiplying the reference current and the reference resistance to determine a voltage drop. A reference resistance of 0.25 mohm, a voltage drop of 100A × 0.25 mohm 25mV when 8 DDRs are present; when 1 DDR in place, the pressure drop was 12.5A 0.25m ohm-3.125 mV.
And determining output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage. At 8 DDR bits, the standard 1.2V output voltage is reduced to 1.175V. Therefore, the output voltage is usually adjusted to 1.225V to avoid the voltage drop. Currently, when the bit number of the DDR is 1, the output voltage is changed from 1.225V to 1.2V +3.125mV to 1.203125V, so as to reduce the over-voltage condition and make the power system have a more sufficient safety space.
In some embodiments, said determining an output voltage from said voltage drop and a reference voltage comprises: adding the voltage drop to the reference voltage to determine the output voltage.
In response to a present output voltage not being equal to the output voltage, adjusting the present output voltage to the output voltage.
In some embodiments, the method further comprises: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value. The threshold value is 1.26V, and when the output voltage reaches 1.26V, overvoltage protection is started and an alarm is given.
In some embodiments, the method further comprises: and adjusting the threshold value according to the size of the reference load.
In the embodiment of the present invention, 8 memories are configured at maximum, and 1 memory is configured at minimum, but this is merely exemplary, and in other embodiments, the corresponding maximum configuration and minimum configuration number may be set according to specific situations, so as to achieve the purposes of protecting current and saving power for different configuration numbers, and achieve security optimization of a server power system for different memory numbers.
It should be particularly noted that, in the embodiments of the method for controlling output voltage according to the memory amount, the steps may be mutually intersected, replaced, added, and deleted, so that the method for controlling output voltage according to the memory amount, which is implemented by reasonable permutation and combination, also belongs to the scope of the present invention, and the scope of the present invention should not be limited to the embodiments.
In view of the above, a second aspect of the embodiments of the present invention provides a system for controlling an output voltage according to the number of memories. As shown in fig. 2, the system 200 includes the following modules: the acquisition module is configured to acquire the memory in-place signals and determine the number of the memories in place according to the memory in-place signals; the voltage drop module is configured to determine a corresponding reference current according to the number of the memories in place at present, and determine a voltage drop according to the reference current and a reference resistor; the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage; and an adjustment module configured to adjust the present output voltage to the output voltage in response to the present output voltage not being equal to the output voltage.
In some embodiments, the obtaining module is configured to: determining the memory bit in response to the memory bit signal being at a high level; and responding to the low level of the memory bit signal, and asynchronously resetting the memory.
In some embodiments, the pressure drop module is configured to: and taking the ratio of the product of the memory number at the current position and the reference load to the reference voltage as the reference current.
In some embodiments, the pressure drop module is further configured to: multiplying the reference current and the reference resistance to determine a voltage drop.
In some embodiments, the determining module is configured to: adding the voltage drop to the reference voltage to determine the output voltage.
In some embodiments, the system further comprises an alert module configured to: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the system further comprises an adjustment module configured to: and adjusting the threshold value according to the size of the reference load.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, acquiring memory in-place signals, and determining the number of memories in place according to the memory in-place signals; s2, determining corresponding reference current according to the current in-place memory quantity, and determining voltage drop according to the reference current and reference resistance; s3, determining an output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage; and S4, adjusting the current output voltage to the output voltage in response to the current output voltage not being equal to the output voltage.
In some embodiments, the determining the number of memory currently in place according to the memory in place signal includes: determining the memory bit in response to the memory bit signal being at a high level; and responding to the low level of the memory bit signal, and asynchronously resetting the memory.
In some embodiments, the determining the corresponding reference current according to the number of memories currently in place includes: and taking the ratio of the product of the memory number at the current position and the reference load to the reference voltage as the reference current.
In some embodiments, said determining a voltage drop from said reference current and a reference resistance comprises: multiplying the reference current and the reference resistance to determine a voltage drop.
In some embodiments, said determining an output voltage from said voltage drop and a reference voltage comprises: adding the voltage drop to the reference voltage to determine the output voltage.
In some embodiments, the steps further comprise: and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
In some embodiments, the steps further comprise: and adjusting the threshold value according to the size of the reference load.
Fig. 3 is a schematic diagram of a hardware structure of an embodiment of the computer device for controlling an output voltage according to the memory amount according to the present invention.
Taking the device shown in fig. 3 as an example, the device includes a processor 301 and a memory 302.
The processor 301 and the memory 302 may be connected by a bus or other means, such as the bus connection in fig. 3.
The memory 302 is a non-volatile computer-readable storage medium, and can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the method for controlling the output voltage according to the amount of memory in the embodiment of the present application. The processor 301 executes various functional applications of the server and data processing, i.e., implements a method of controlling an output voltage according to the amount of memory, by running a nonvolatile software program, instructions, and modules stored in the memory 302.
The memory 302 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by use of a method of controlling an output voltage according to the number of memories, and the like. Further, the memory 302 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 302 optionally includes memory located remotely from processor 301, which may be connected to a local module via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
One or more computer instructions 303 corresponding to a method for controlling an output voltage according to the number of memories are stored in the memory 302, and when being executed by the processor 301, perform the method for controlling an output voltage according to the number of memories in any of the above-described method embodiments.
Any embodiment of the computer device executing the method for controlling the output voltage according to the memory amount can achieve the same or similar effects as any corresponding embodiment of the method.
The present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, performs a method of controlling an output voltage according to the amount of memory.
Fig. 4 is a schematic diagram of an embodiment of the computer storage medium for controlling an output voltage according to the amount of memory according to the present invention. Taking the computer storage medium as shown in fig. 4 as an example, the computer readable storage medium 401 stores a computer program 402 which, when executed by a processor, performs the method as described above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate, all or part of the processes of the methods of the above embodiments may be implemented by a computer program to instruct related hardware, and the program of the method for controlling the output voltage according to the memory amount may be stored in a computer readable storage medium, and when executed, the program may include the processes of the embodiments of the methods described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method for controlling output voltage according to the number of memories is characterized by comprising the following steps:
acquiring memory in-place signals, and determining the number of memories in place at present according to the memory in-place signals;
determining corresponding reference current according to the number of the memories in place at present, and determining voltage drop according to the reference current and reference resistance;
determining an output voltage according to the voltage drop and the reference voltage, and judging whether the current output voltage is equal to the output voltage; and
in response to a present output voltage not being equal to the output voltage, adjusting the present output voltage to the output voltage.
2. The method of claim 1, wherein said determining a memory amount of current bits from said memory bit signal comprises:
determining the memory bit in response to the memory bit signal being at a high level; and
and responding to the low level of the memory bit signal, and asynchronously resetting the memory.
3. The method of claim 1, wherein determining the corresponding reference current according to the current memory number in bits comprises:
and taking the ratio of the product of the memory number at the current position and the reference load to the reference voltage as the reference current.
4. The method of claim 1, wherein determining the voltage drop based on the reference current and a reference resistance comprises:
multiplying the reference current and the reference resistance to determine a voltage drop.
5. The method of claim 1, wherein determining an output voltage from the voltage drop and a reference voltage comprises:
adding the voltage drop to the reference voltage to determine the output voltage.
6. The method of claim 1, further comprising:
and starting overvoltage protection and alarming in response to the current output voltage reaching a threshold value.
7. The method of claim 6, further comprising:
and adjusting the threshold value according to the size of the reference load.
8. A system for controlling an output voltage based on a memory count, comprising:
the acquisition module is configured to acquire the memory in-place signals and determine the number of the memories in place according to the memory in-place signals;
the voltage drop module is configured to determine a corresponding reference current according to the number of the memories in place at present, and determine a voltage drop according to the reference current and a reference resistor;
the judging module is configured to determine an output voltage according to the voltage drop and the reference voltage and judge whether the current output voltage is equal to the output voltage; and
an adjustment module configured to adjust a present output voltage to the output voltage in response to the present output voltage not being equal to the output voltage.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 7.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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| WO2018192435A1 (en) * | 2017-04-18 | 2018-10-25 | 中兴通讯股份有限公司 | Alarm method and device for electric equipment |
| CN112953250A (en) * | 2019-11-26 | 2021-06-11 | 比亚迪股份有限公司 | Power supply control method, power supply module and storage medium |
| CN111309534A (en) * | 2020-02-13 | 2020-06-19 | 苏州浪潮智能科技有限公司 | Method, system and related assembly for testing BPS memory adaptive capacity |
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