CN210639587U - Power-off fast discharge circuit of switching Power supply, server mainboard and server - Google Patents
Power-off fast discharge circuit of switching Power supply, server mainboard and server Download PDFInfo
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- CN210639587U CN210639587U CN201922162657.9U CN201922162657U CN210639587U CN 210639587 U CN210639587 U CN 210639587U CN 201922162657 U CN201922162657 U CN 201922162657U CN 210639587 U CN210639587 U CN 210639587U
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Abstract
The utility model provides a switching Power supply Power off fast discharge circuit, a server mainboard and a server, which comprise a time-delay Power supply, a ground resistor R3, a first MOS tube Q1, a second MOS tube Q2, a time-delay Power supply discharge circuit and a PG signal input terminal; the delay power supply comprises a diode D1 and a capacitor C1, and the cathode of the diode D1 is grounded through the capacitor C1; the time-delay power supply discharge circuit comprises a first resistor R1 and a second resistor R2, wherein a first end of the first resistor R1 is connected with the cathode of a diode D1, and a second end of the first resistor R1 is grounded through the second resistor R2; the PG signal input terminal is connected with the grid electrode of a second MOS tube Q2, and the source electrode of the second MOS tube Q2 is grounded; the drain electrode of the second MOS transistor Q2 is connected with the second end of the first resistor R1, the first end of the second resistor R2 and the gate electrode of the first MOS transistor Q1; the drain of the first MOS transistor Q1 is connected to the discharged power supply through a resistance to ground R3, and the source of the first MOS transistor Q1 is grounded. The utility model discloses a be used for reducing the consumption to ground resistance to reduce the server consumption, the using electricity wisely.
Description
Technical Field
The utility model relates to a server field, concretely relates to switching Power supply Power off fast discharge circuit, server mainboard and server, mainly used is discharging of switching Power supply when Power off with higher speed.
Background
With the rapid development of the internet and the explosive growth of big data, the server industry has also developed greatly, and the power consumption of each device is also getting larger and larger. Taking a commonly used network card on a server as an example, the network cards with transmission rates of 10G and 25G are designed and applied, after the power consumption of the network card is increased, the total capacitance value of a capacitor on each power supply is also increased, when each power supply is shut down, the discharge speed of a power supply link of each power supply is reduced, the discharge time is prolonged, and thus potential risks are easily caused to the power-on time sequence of a server mainboard system.
Therefore, in order to increase the discharge rate of the switching power supply of the server when the server is shut down, the following discharge approaches are generally adopted when the conventional switching power supply is shut down and powered off: the controller of the switching power supply discharges, the leakage current of the capacitor discharges, the load chip discharges, and an additional ground resistor discharges. The discharging current of the switching power supply controller is mostly small, the leakage current of the capacitor is mostly below 1mA, and the load chip often cannot discharge effectively even when the power is off, so that the discharging mode of the external ground resistor is a commonly used discharging mode at present. However, the current additional ground resistor can continuously consume power when the server works normally, so that the power consumption of the server is increased to a certain extent, and the power is wasted.
Therefore, the utility model provides a switching Power supply Power off fast discharge circuit, server mainboard and server for solve above-mentioned problem.
SUMMERY OF THE UTILITY MODEL
The utility model provides a switch Power supply Power off fast discharge circuit, server mainboard and server for reduce the consumption to ground resistance, with reduction server consumption, the using electricity wisely.
In a first aspect, the utility model provides a switching Power supply Power off fast discharge circuit, this switching Power supply Power off fast discharge circuit includes time delay Power supply, ground resistance R3, first MOS pipe Q1, second MOS pipe Q2, time delay Power supply discharge circuit and is used for inserting the PG signal's of the Power that is discharged PG signal input terminal; the discharged power supply is a switching power supply;
the delay power supply comprises a diode D1 and a capacitor C1, the anode of the diode D1 is used for connecting a discharged power supply, the cathode of the diode D1 is connected with the first end of the capacitor C1, and the second end of the capacitor C1 is grounded;
the time-delay power supply discharge circuit comprises a first resistor R1 and a second resistor R2, wherein a first end of the first resistor R1 is connected with a cathode of a diode D1, a second end of the first resistor R1 is connected with a first end of a second resistor R2, and a second end of the second resistor R2 is grounded;
the PG signal input terminal is connected with the grid electrode of a second MOS tube Q2, and the source electrode of the second MOS tube Q2 is grounded; the drain electrode of the second MOS transistor Q2 is respectively connected to the second end of the first resistor R1, the first end of the second resistor R2 and the gate electrode of the first MOS transistor Q1;
the drain of the first MOS transistor Q1 is connected to the discharged power supply through a resistance to ground R3, and the source of the first MOS transistor Q1 is grounded.
Further, the resistance value of the second resistor R2 is greater than the resistance value of the first resistor R1.
Further, the discharged power supply is any one of a 3.3V _ STBY power supply, a P5V _ STBY power supply, a P12V power supply and a P12V _ STBY power supply.
Further, when the discharged power supply is a 3.3V _ STBY power supply, the resistance value of the ground resistor R3 takes a value of 15 ohms.
In a second aspect, the present invention provides a server motherboard, wherein the server motherboard is integrated with the Power off fast discharging circuit of the switching Power supply.
In a third aspect, the present invention provides a server, wherein the server motherboard is integrated in the server.
The beneficial effects of the utility model reside in that:
the utility model provides a switching Power supply Power off fast discharge circuit, server mainboard and server, all adopt the time delay Power, resistance to ground R3, first MOS pipe Q1, second MOS pipe Q2, time delay Power discharge circuit and PG signal input terminal, during the use, insert the PG signal input terminal the output of the PG signal circuit by the discharge Power, insert the positive pole of diode D1 with the time delay Power by the output of discharge Power, and insert the drain electrode of first MOS pipe Q1 the output by the discharge Power through resistance to ground R3: when the discharged power supply is electrified, the delay power supply is charged, the PG signal output to the PG signal input terminal by the PG signal circuit is changed into high level, at the moment, the second MOS tube Q2 is opened, the first MOS tube Q1 is closed, and the discharge circuit where the ground resistor R3 is located is always in an open circuit state, so that the electric energy is saved; when the power-off signal is sent out, the power-down of the discharged power supply is started, the PG signal input by the PG signal input terminal is changed into low level, at the moment, the second MOS tube Q2 is closed, the first MOS tube Q1 is opened, and the discharge circuit where the ground resistor R3 is located is opened, so that the discharge of the charges stored in the discharged power supply is accelerated. It is thus clear that the utility model discloses both helped accelerateing the discharge when being shut down by the discharge power supply, can reduce again to a certain extent the power consumption of ground resistance R3 at the normal during operation of server, it is thus visible to a certain extent help reducing the consumption of server, practice thrift the electric energy.
Furthermore, the utility model relates to a principle is reliable, and simple structure has very extensive application prospect.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of a Power off fast discharge circuit of a switching Power supply according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions in the present invention better understood, the following description is made in conjunction with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
Example 1:
fig. 1 is a schematic circuit diagram of a Power off fast discharge circuit of a switching Power supply according to an embodiment of the present invention. The Power-off quick discharge circuit of the switching Power supply can be controlled, can be started to discharge in shutdown and Power-down scenes, and can be closed to discharge in other scenes, so that the Power energy is saved. The discharged power supply referred to in the present embodiment is a switching power supply of the server.
As shown in fig. 1, the Power-off fast discharge circuit of the switching Power supply includes a delay Power supply, a resistance to ground R3, a first MOS transistor Q1, a second MOS transistor Q2, a delay Power supply discharge circuit, and a PG signal input terminal 100 for accessing a PG signal of a discharged Power supply 200;
the delay power supply comprises a diode D1 and a capacitor C1, the anode of the diode D1 is used for connecting the discharged power supply 200, the cathode of the diode D1 is connected with the first end of the capacitor C1, and the second end of the capacitor C1 is grounded;
the time-delay power supply discharge circuit comprises a first resistor R1 and a second resistor R2, wherein a first end of the first resistor R1 is connected with a cathode of a diode D1, a second end of the first resistor R1 is connected with a first end of a second resistor R2, and a second end of the second resistor R2 is grounded;
the PG signal input terminal 100 is connected with the gate of a second MOS transistor Q2, and the source of the second MOS transistor Q2 is grounded; the drain electrode of the second MOS transistor Q2 is respectively connected to the second end of the first resistor R1, the first end of the second resistor R2 and the gate electrode of the first MOS transistor Q1;
the drain of the first MOS transistor Q1 is connected to the discharged power source 200 through a resistance to ground R3, and the source of the first MOS transistor Q1 is grounded.
In the present embodiment, the PG signal input terminal 100 is used for connecting the output terminal of the PG signal circuit of the discharged power supply 200, and is used for receiving the PG (power good) signal of the discharged power supply 200. The PG signal changes from a low level to a high level when the discharged power supply 200 is powered up to 90% or more of the target voltage, and changes from a high level to a low level when the voltage of the discharged power supply 200 drops to 90% or less due to shutdown or power failure.
In this embodiment, the delay power supply is formed by connecting a diode D1 and a capacitor C1. In a specific implementation, a diode with a suitable voltage resistance may be selected by a person skilled in the art according to the actual voltage of the discharged power supply 200 to ensure that the reverse voltage resistance of the diode D1 is greater than the maximum voltage of the discharged power supply 200. The capacitance C1 can be selected by those skilled in the art according to the specific discharge time of the discharge circuit in which the ground resistor R3 is located.
In the present embodiment, the ground resistor R3 is connected to the first MOS transistor Q1 to form a discharge circuit. In a specific implementation, the resistance value of the ground resistor R3 may be selected according to the discharge current of the discharge circuit, where the maximum discharge current I (ma ×) -U/R of the discharge circuit, U being the highest voltage of the discharged power supply 200, and R being the resistance value of the ground resistor R3, so that the size of the ground resistor R3 may be selected according to the maximum power consumption P (ma ×) -U2/R of the ground resistor R3. Taking the example where the discharged power supply 200 is a 3.3V _ STBY power supply, the resistance value R of the ground resistance R3 may be selected to be 15 ohms.
Specification selection principle of the first MOS transistor Q1: the rated current of the MOS transistor meets the maximum discharge current I (ma x) of the discharge circuit, and the starting voltage VGS (th) of the MOS transistor can be started by selecting a smaller voltage (for example, the MOS transistor with the maximum starting voltage of 0.9V).
The first resistor R1 and the second resistor R2 form a delay power supply discharge circuit, when power is off, electric charges of the capacitor C1 are discharged through the delay power supply discharge circuit, the discharge time tau of the capacitor C1 is calculated according to a calculation formula that tau is R multiplied by C, and the values of the capacitor C1, the first resistor R1 and the second resistor R2 are adjusted so as to ensure that the value of tau is larger than the discharge time of the discharge circuit where the ground resistor R3 is located. R in the above calculation formula is the sum of the resistances of the first resistor R1 and the second resistor R2, and C in the above calculation formula is the capacitance of the capacitor C1. In addition, in order to ensure that the voltage divided by the first resistor R1 and the second resistor R2 is greater than the turn-on voltage of the first MOS transistor Q1 and ensure that the first MOS transistor Q1 is normally turned on, the resistance value of the second resistor R2 is greater than the resistance value of the first resistor R1, in this embodiment, the resistance value of the second resistor R2 is designed to be more than 4 times that of the resistor R1. In addition, the resistance of the first resistor R1 cannot be selected to be too small, because when the PG signal is at a high level, the second MOS transistor Q2 is turned on, the first MOS transistor Q1 is turned off, and the discharged power supply 200 discharges to ground through the diode D1 and the first resistor R1, and selecting a larger resistance of R1 can effectively save energy. The delayed power discharging circuit can prevent the delayed power discharging time from being too long, and affecting the restart or next normal power-on time sequence of the discharged power 200.
In this embodiment, as shown in fig. 1, the discharged power supply 200 is a 3.3V _ STBY power supply, the resistance of the ground resistor R3 is 15 ohms, the resistance of the first resistor R1 is 4.7k ohms, and the resistance of the second resistor R2 is 20k ohms.
When the power supply circuit is used, the PG signal input terminal 100 is connected to the output end of the PG signal circuit of the discharged power supply 200, the anode of the diode D1 of the delay power supply is connected to the output end of the discharged power supply 200, and the drain of the first MOS transistor Q1 is connected to the output end of the discharged power supply 200 through the ground resistor R3.
When the discharged power supply 200 is powered on, the delay power supply is charged, the PG signal output by the PG signal circuit to the PG signal input terminal 100 becomes a high level, at this time, the second MOS transistor Q2 is turned on, the first MOS transistor Q1 is turned off, and the discharge circuit where the ground resistor R3 is located is always in an open circuit state, so that electric energy is saved; when the shutdown signal is sent out, the discharged power supply 200 starts to be powered down, the PG signal input by the PG signal input terminal 100 becomes low level, at this time, the second MOS transistor Q2 is turned off, the first MOS transistor Q1 is turned on, and the discharge circuit where the ground resistor R3 is located is turned on, so that the discharge of the charges stored in the discharged power supply 200 is accelerated. It is thus clear that the utility model discloses both helped with higher speed by the discharge when discharging power 200 shuts down, can reduce again to a certain extent the power consumption of ground resistance R3 at the normal during operation of server, it is thus visible to a certain extent to help reducing the consumption of server, practice thrift the electric energy.
It should be noted that, in order to ensure that the voltage of the discharged power supply 200 drops to 0V when the discharge circuit with the ground resistor R3 is in the discharge state, the delay power supply is always maintained at a high potential during the process that the discharge circuit with the ground resistor R3 accelerates the discharge of the charges stored in the discharged power supply 200. After the voltage of the discharged power supply 200 is reduced to 0V, the remaining power in the time delay power supply is discharged to 0V through the time delay power supply discharge circuit, and at this time, the whole discharge process of the discharged power supply 200 is finished.
Example 2:
this embodiment provides a server motherboard, on which the Power-off fast discharge circuit of the switching Power supply described in embodiment 1 is integrated.
The technical effects achieved by the present embodiment can be referred to the above description, and are not described herein again.
Example 3:
this embodiment provides a server, in which the server motherboard described in embodiment 2 is integrated. The technical effects achieved by the present embodiment can be referred to the above description, and are not described herein again.
The same and similar parts in the various embodiments in this specification may be referred to each other.
Although the present invention has been described in detail by referring to the drawings in conjunction with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and substance of the present invention, and these modifications or substitutions are intended to be within the scope of the present invention/any person skilled in the art can easily conceive of changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. A Power-off fast discharge circuit of a switching Power supply is characterized by comprising a time-delay Power supply, a ground resistor R3, a first MOS tube Q1, a second MOS tube Q2, a time-delay Power supply discharge circuit and a PG signal input terminal for accessing a PG signal of a discharged Power supply; the discharged power supply is a switching power supply;
the delay power supply comprises a diode D1 and a capacitor C1, the anode of the diode D1 is used for connecting a discharged power supply, the cathode of the diode D1 is connected with the first end of the capacitor C1, and the second end of the capacitor C1 is grounded;
the time-delay power supply discharge circuit comprises a first resistor R1 and a second resistor R2, wherein a first end of the first resistor R1 is connected with a cathode of a diode D1, a second end of the first resistor R1 is connected with a first end of a second resistor R2, and a second end of the second resistor R2 is grounded;
the PG signal input terminal is connected with the grid electrode of a second MOS tube Q2, and the source electrode of the second MOS tube Q2 is grounded; the drain electrode of the second MOS transistor Q2 is respectively connected to the second end of the first resistor R1, the first end of the second resistor R2 and the gate electrode of the first MOS transistor Q1;
the drain of the first MOS transistor Q1 is connected to the discharged power supply through a resistance to ground R3, and the source of the first MOS transistor Q1 is grounded.
2. The Power-off fast discharge circuit of claim 1, wherein the resistance of the second resistor R2 is greater than the resistance of the first resistor R1.
3. The Power-off fast discharge circuit of claim 2, wherein the discharged Power is any one of a 3.3V _ STBY Power, a P5V _ STBY Power, a P12V Power, and a P12V _ STBY Power.
4. A Power off fast discharge circuit of a switching Power supply according to claim 1, 2 or 3, characterized in that when the discharged Power supply is a 3.3V _ STBY Power supply, the resistance value of the resistance to ground R3 takes on the value of 15 ohms.
5. A server board, wherein the server board is integrated with the P0wer off fast discharge circuit of any one of claims 1-4.
6. A server, characterized in that the server motherboard of claim 5 is integrated in the server.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922162657.9U CN210639587U (en) | 2019-12-05 | 2019-12-05 | Power-off fast discharge circuit of switching Power supply, server mainboard and server |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201922162657.9U CN210639587U (en) | 2019-12-05 | 2019-12-05 | Power-off fast discharge circuit of switching Power supply, server mainboard and server |
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| CN210639587U true CN210639587U (en) | 2020-05-29 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111667785A (en) * | 2020-07-07 | 2020-09-15 | 京东方科技集团股份有限公司 | Control circuit, Tcon board and display device |
| CN113839656A (en) * | 2021-08-13 | 2021-12-24 | 苏州浪潮智能科技有限公司 | Server power supply time sequence discharge circuit |
-
2019
- 2019-12-05 CN CN201922162657.9U patent/CN210639587U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111667785A (en) * | 2020-07-07 | 2020-09-15 | 京东方科技集团股份有限公司 | Control circuit, Tcon board and display device |
| CN111667785B (en) * | 2020-07-07 | 2023-11-14 | 京东方科技集团股份有限公司 | Control circuit, Tcon board and display device |
| CN113839656A (en) * | 2021-08-13 | 2021-12-24 | 苏州浪潮智能科技有限公司 | Server power supply time sequence discharge circuit |
| CN113839656B (en) * | 2021-08-13 | 2023-08-11 | 苏州浪潮智能科技有限公司 | Time sequence discharging circuit of server power supply |
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