CN114138179B - Method and device for dynamically adjusting write cache space - Google Patents
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- CN114138179B CN114138179B CN202111214722.3A CN202111214722A CN114138179B CN 114138179 B CN114138179 B CN 114138179B CN 202111214722 A CN202111214722 A CN 202111214722A CN 114138179 B CN114138179 B CN 114138179B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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Abstract
The application provides a method, a system, equipment and a storage medium for dynamically adjusting a write cache space, wherein the method comprises the following steps: dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively; the pointer of the sliding window is placed at an initial point, the size of an average input/output block of the current period is calculated at intervals of preset time, and whether the size is larger than a preset value or not is judged; in response to the magnitude being greater than a preset value, moving the pointer in a first direction by a factor; and responsive to the pointer moving in the first direction to the first endpoint, increasing the first duty cycle and decreasing the second duty cycle. The application dynamically adjusts the write buffer space of the large and small data blocks according to the condition of the upstream input and output pressure, ensures that the write buffer of the system can always provide an acceleration function for the array, and further improves the usability of the whole system.
Description
Technical Field
The present application relates to the field of cache, and in particular, to a method, system, device, and storage medium for dynamically adjusting a write cache space.
Background
The capacity of the current multi-control array storage limited BBU (Battery Backup Unit ) generally adopts a write cache with a fixed size, and when an upstream write IO (Input/Output) is all small-block data to fill the write cache under certain special scenes, the write speed of a rear-end disk is far lower than the cache brushing speed, at the moment, an upstream node can sense that the IO cannot be brushed down for storage, particularly a front-end large-block write IO, even short-time IO cutoff can be shown, and the usability of a complete machine system is greatly influenced.
Disclosure of Invention
In view of this, an object of the embodiments of the present application is to provide a method, a system, a computer device, and a computer readable storage medium for dynamically adjusting a write buffer space, which dynamically adjusts a write buffer space of a large and small data block according to an upstream input/output pressure condition, so as to avoid a situation that a sudden small data block occupies a write buffer, thereby ensuring that a system write buffer can always provide an acceleration function for an array, and further improving usability of a complete system.
Based on the above objects, an aspect of the embodiments of the present application provides a method for dynamically adjusting a write cache space, including the following steps: dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively; the pointer of the sliding window is placed at an initial point, the size of an average input/output block of the current period is calculated at intervals of preset time, and whether the size is larger than a preset value or not is judged; moving the pointer in a first direction by a factor in response to the size being greater than the preset value; and responsive to the pointer moving in the first direction to a first end point, increasing the first duty cycle and decreasing the second duty cycle.
In some embodiments, the method further comprises: responsive to the magnitude not being greater than the preset value, moving the pointer by a factor of two in a second direction opposite the first direction; and responsive to the pointer moving in the second direction to a second end point, decreasing the first duty cycle and increasing the second duty cycle.
In some embodiments, the method further comprises: responsive to the pointer moving to the first endpoint or the second endpoint, the pointer is returned back to the initial point.
In some embodiments, the method further comprises: setting the sum of the first duty ratio and the second duty ratio as a first preset proportion, and judging whether the first duty ratio reaches a threshold value or not; and in response to the first duty cycle reaching a threshold, maintaining or reducing the first duty cycle.
In some embodiments, the method further comprises: in response to the duration of maintaining the first duty ratio at the threshold reaching a preset duration, increasing the preset value; and reducing the preset value in response to the duration of keeping the second duty ratio at the threshold reaching a preset duration.
In some embodiments, the setting the first and second duty cycles to the first and second data write cache spaces, respectively, includes: setting the sum of the first duty ratio and the second duty ratio as a second preset ratio, and setting the space with the third duty ratio as a reserved space.
In some embodiments, the method further comprises: in response to the first duty cycle reaching a threshold, increasing the first duty cycle and decreasing the third duty cycle, leaving the second duty cycle unchanged.
In another aspect of the embodiment of the present application, a system for dynamically adjusting a write cache space is provided, including: the dividing module is configured to divide the write cache space into a first data write cache space and a second data write cache space, and set a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively; the computing module is configured to place the pointer of the sliding window at an initial point, compute the size of the average input/output block of the current period at intervals of preset time, and judge whether the size is larger than a preset value or not; a movement module configured to move the pointer in a first direction in response to the size being greater than the preset value; and an adjustment module configured to increase the first duty cycle and decrease the second duty cycle in response to the pointer moving in the first direction to a first endpoint.
In yet another aspect of the embodiment of the present application, there is also provided a computer apparatus, including: at least one processor; and a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method as above.
In yet another aspect of the embodiments of the present application, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, implements the method steps as described above.
The application has the following beneficial technical effects: the write buffer memory space of the large and small data blocks is dynamically adjusted according to the condition of the upstream input and output pressure, and the condition that the write buffer memory is occupied by sudden small data blocks is avoided, so that the system write buffer memory can always provide an acceleration function for the array, and the usability of the whole system is improved.
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In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of a method for dynamically adjusting a write cache space according to the present application;
FIG. 2 is a schematic diagram of an embodiment of a system for dynamically adjusting a write cache space according to the present application;
FIG. 3 is a schematic hardware architecture diagram of an embodiment of a computer device for dynamically adjusting a write buffer space according to the present application;
FIG. 4 is a schematic diagram of an embodiment of a computer storage medium for dynamically adjusting a write buffer space according to the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the following embodiments of the present application will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present application, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present application, and the following embodiments are not described one by one.
In a first aspect of the embodiment of the present application, an embodiment of a method for dynamically adjusting a write cache space is provided. Fig. 1 is a schematic diagram of an embodiment of a method for dynamically adjusting a write buffer space according to the present application. As shown in fig. 1, the embodiment of the present application includes the following steps:
s1, dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively;
s2, setting a pointer of the sliding window at an initial point, calculating the size of an average input/output block of the current period at intervals of preset time, and judging whether the size is larger than a preset value or not;
s3, responding to the fact that the size is larger than the preset value, and moving the pointer to a first direction by one frame; and
and S4, in response to the pointer moving to a first endpoint along the first direction, increasing the first duty ratio and decreasing the second duty ratio.
According to the embodiment of the application, the write buffer space of the large and small data blocks is dynamically adjusted according to the upstream IO pressure condition, so that the condition that the write buffer is occupied by the sudden small data blocks is avoided, the system write buffer can always provide an acceleration function for the array, and the usability of the whole system is further improved.
Dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively. In the embodiment of the application, the first data writing cache space is a big data writing cache space, and the second data writing cache space is a small data writing cache space. In the embodiment of the application, the sum of the first duty ratio and the second duty ratio can be set to be 100%. Thus, the total write cache may be divided into a large block data write cache space ratio a and a small block data write cache space ratio (1-a).
And setting a pointer of the sliding window at an initial point, calculating the size of an average input/output block of the current period at intervals of preset time, and judging whether the size is larger than a preset value or not. And in response to the size being greater than the preset value, moving the pointer in a first direction by a factor of two. Sliding window pointer swing condition: initially, the pointer is located at the coordinate (0), if the average IO block in the current period is larger than the preset value M, the pointer moves one lattice in the first direction (positive direction) of the coordinate axis, otherwise, the pointer moves one lattice in the negative direction of the coordinate axis, the pointer judges once every preset time, and corresponding left swing or right swing is carried out, and one lattice is swung for a single time.
In response to the pointer moving in the first direction to a first end point, the first duty cycle is increased and the second duty cycle is decreased. When the pointer reaches the rightmost side of the coordinate, the large block writing buffer space capacity ratio is raised to be (a+y), and the corresponding small block data writing buffer space ratio is (1-a-y).
In some embodiments, the method further comprises: responsive to the magnitude not being greater than the preset value, moving the pointer by a factor of two in a second direction opposite the first direction; and responsive to the pointer moving in the second direction to a second end point, decreasing the first duty cycle and increasing the second duty cycle. When the pointer reaches the leftmost position of the coordinate, the small block writing buffer space capacity ratio is raised to be (1-a+y), and the corresponding large block data writing buffer space ratio is (a-y).
In some embodiments, the method further comprises: responsive to the pointer moving to the first endpoint or the second endpoint, the pointer is returned back to the initial point. Once the pointer reaches the leftmost or rightmost position, it is returned to the coordinate (0).
A, x, M, y in the above embodiment and the like can be preset according to the service IO model, and a is never 0.
In some embodiments, the method further comprises: setting the sum of the first duty ratio and the second duty ratio as a first preset proportion, and judging whether the first duty ratio reaches a threshold value or not; and in response to the first duty cycle reaching a threshold, maintaining or reducing the first duty cycle. The first preset ratio may be 100%, that is, the sum of the first duty ratio and the second duty ratio is 100%, and when the first duty ratio reaches a threshold value (for example, may be 80%), the first duty ratio is not changed when the pointer continues to move in the first direction, and when the pointer moves in the second direction, the first duty ratio is normally reduced. Similarly, when the second duty cycle reaches the threshold, the second duty cycle is not changed when the pointer continues to move in the second direction, and is normally reduced when the pointer moves in the first direction.
In some embodiments, the method further comprises: in response to the duration of maintaining the first duty ratio at the threshold reaching a preset duration, increasing the preset value; and reducing the preset value in response to the duration of keeping the second duty ratio at the threshold reaching a preset duration. In the embodiment of the application, when the first duty ratio is kept as the threshold value for a long time, the input and output of the current large block of data are relatively more, and the preset value can be properly increased to reduce the frequent movement of the pointer to the first direction. Similarly, when the second duty ratio is kept at the threshold value for a long time, it indicates that the input and output of the current large block of data are relatively small, and the preset value can be appropriately reduced to reduce frequent movement of the pointer in the second direction.
In some embodiments, the setting the first and second duty cycles to the first and second data write cache spaces, respectively, includes: setting the sum of the first duty ratio and the second duty ratio as a second preset ratio, and setting the space with the third duty ratio as a reserved space. For example, the second preset ratio may be 90% and the third ratio 10%.
In some embodiments, the method further comprises: in response to the first duty cycle reaching a threshold, increasing the first duty cycle and decreasing the third duty cycle, leaving the second duty cycle unchanged. When the first duty ratio reaches the threshold value, the second duty ratio can be kept unchanged, the first duty ratio is increased, the third duty ratio is reduced until the third duty ratio is zero, the first duty ratio and the second duty ratio are kept unchanged, when the pointer continues to move towards the second direction, the first duty ratio is reduced firstly, the third duty ratio is increased, when the third duty ratio is restored to 10%, the pointer continues to move towards the second direction, the third duty ratio is kept unchanged, and the second duty ratio is increased. Similarly, when the second duty cycle reaches the threshold, the first duty cycle may be kept unchanged, the second duty cycle may be increased, and the third duty cycle may be decreased until the third duty cycle is zero, so that both the first duty cycle and the second duty cycle may be kept unchanged, when the pointer continues to move in the first direction, the second duty cycle may be decreased first, the third duty cycle may be increased, and when the third duty cycle returns to 10%, the pointer continues to move in the second direction, so that the third duty cycle may be kept unchanged, and the first duty cycle may be increased.
The above steps are described below in two examples:
the total write buffer is divided into a large block data write buffer space ratio of 30% and a small block data write buffer space ratio of 70%. The size of the large block write cache space capacity and the small block write cache space capacity is determined by setting a sliding window. Sliding window pointer swing condition: initially, the pointer is positioned at a coordinate (0), if the average IO block of the first 2.5 minutes of each calculation point is larger than 64KB, the pointer is moved to the positive direction (right) of the coordinate axis by one grid, otherwise, the pointer is moved to the negative direction (left) of the coordinate axis by one grid, the pointer is subjected to one-time judgment of left swing or right swing according to swinging conditions every 2.5 minutes, one grid is swung for one time, after the pointer reaches the rightmost side of the coordinate, the large-block writing cache space capacity is increased by 31%, and the corresponding small-block data writing cache space is 69%; when the pointer reaches the leftmost position of the coordinate, the capacity of the writing buffer memory of the small block is increased to 71%, and the writing buffer memory of the corresponding large block of data is 29%; once the pointer reaches the leftmost or right, it is returned to the coordinate (0). When the small block data writing buffer space ratio reaches 80%, if the pointer continues to move leftwards, keeping the small block data writing buffer space ratio and the large block data writing buffer space ratio unchanged; when the large block data writing buffer space ratio reaches 80%, if the pointer continues to move rightwards, the small block data writing buffer space ratio and the large block data writing buffer space ratio are kept unchanged.
The total write buffer is divided into a large block data write buffer space of 30%, a small block data write buffer space of 60% and a reserved space of 10%. If the average IO block of the first 2.5 minutes of each calculation point is larger than 64KB, the pointer is moved to the positive direction (right) of the coordinate axis by one grid, otherwise, the pointer is moved to the negative direction (left) of the coordinate axis by one grid, the pointer is subjected to one-time judgment of left swing or right swing according to swinging conditions every 2.5 minutes, one grid is swung for one time, after the pointer reaches the rightmost of the coordinate, the large-block writing cache space capacity is increased to 31%, and the corresponding small-block data writing cache space is increased to 59%; when the pointer reaches the leftmost position of the coordinate, the capacity of the writing buffer memory of the small block is increased to 61%, and the writing buffer memory of the corresponding large block of data is 29%; once the pointer reaches the leftmost or right, it is returned to the coordinate (0). When the small block data writing buffer space ratio reaches 70%, if the pointer continues to move leftwards, keeping the large block data writing buffer space ratio unchanged by 20%, increasing the small block data writing buffer space ratio to 80% at most, and keeping the reserved space ratio to at least 0%; when the space occupation ratio of the large-block data writing buffer reaches 70%, if the pointer continues to move rightwards, the space occupation ratio of the small-block data writing buffer is kept unchanged by 20%, the space occupation ratio of the large-block data writing buffer is increased to 80%, and the space occupation ratio of the reserved space is at least 0%.
According to the embodiment of the application, the write buffer space of the large and small data blocks is dynamically adjusted according to the condition of the upstream input and output pressure, so that the condition that the write buffer is occupied by the sudden small data blocks is avoided, the system write buffer can always provide an acceleration function for the array, and the usability of the whole system is further improved.
It should be noted that, in the above embodiments of the method for dynamically adjusting a write cache space, the steps may be intersected, replaced, added and subtracted, so that the method for dynamically adjusting a write cache space by using these reasonable permutation and combination transforms should also belong to the protection scope of the present application, and should not limit the protection scope of the present application to the embodiments.
Based on the above object, a second aspect of the embodiments of the present application proposes a system for dynamically adjusting a write cache space. As shown in fig. 2, the system 200 includes the following modules: the dividing module is configured to divide the write cache space into a first data write cache space and a second data write cache space, and set a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively; the computing module is configured to place the pointer of the sliding window at an initial point, compute the size of the average input/output block of the current period at intervals of preset time, and judge whether the size is larger than a preset value or not; a movement module configured to move the pointer in a first direction in response to the size being greater than the preset value; and an adjustment module configured to increase the first duty cycle and decrease the second duty cycle in response to the pointer moving in the first direction to a first endpoint.
In some embodiments, the system further comprises a second mobile module configured to: responsive to the magnitude not being greater than the preset value, moving the pointer by a factor of two in a second direction opposite the first direction; and responsive to the pointer moving in the second direction to a second end point, decreasing the first duty cycle and increasing the second duty cycle.
In some embodiments, the system further comprises a regression module configured to: responsive to the pointer moving to the first endpoint or the second endpoint, the pointer is returned back to the initial point.
In some embodiments, the system further comprises a determination module configured to: setting the sum of the first duty ratio and the second duty ratio as a first preset proportion, and judging whether the first duty ratio reaches a threshold value or not; and in response to the first duty cycle reaching a threshold, maintaining or reducing the first duty cycle.
In some embodiments, the system further comprises a second adjustment module configured to: in response to the duration of maintaining the first duty ratio at the threshold reaching a preset duration, increasing the preset value; and reducing the preset value in response to the duration of keeping the second duty ratio at the threshold reaching a preset duration.
In some embodiments, the partitioning module is further configured to: setting the sum of the first duty ratio and the second duty ratio as a second preset ratio, and setting the space with the third duty ratio as a reserved space.
In some embodiments, the system further comprises a third adjustment module configured to: in response to the first duty cycle reaching a threshold, increasing the first duty cycle and decreasing the third duty cycle, leaving the second duty cycle unchanged.
In view of the above object, a third aspect of the embodiments of the present application provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively; s2, setting a pointer of the sliding window at an initial point, calculating the size of an average input/output block of the current period at intervals of preset time, and judging whether the size is larger than a preset value or not; s3, responding to the fact that the size is larger than the preset value, and moving the pointer to a first direction by one frame; and S4, in response to the pointer moving to a first endpoint along the first direction, increasing the first duty cycle and decreasing the second duty cycle.
In some embodiments, the steps further comprise: responsive to the magnitude not being greater than the preset value, moving the pointer by a factor of two in a second direction opposite the first direction; and responsive to the pointer moving in the second direction to a second end point, decreasing the first duty cycle and increasing the second duty cycle.
In some embodiments, the steps further comprise: responsive to the pointer moving to the first endpoint or the second endpoint, the pointer is returned back to the initial point.
In some embodiments, the steps further comprise: setting the sum of the first duty ratio and the second duty ratio as a first preset proportion, and judging whether the first duty ratio reaches a threshold value or not; and in response to the first duty cycle reaching a threshold, maintaining or reducing the first duty cycle.
In some embodiments, the steps further comprise: in response to the duration of maintaining the first duty ratio at the threshold reaching a preset duration, increasing the preset value; and reducing the preset value in response to the duration of keeping the second duty ratio at the threshold reaching a preset duration.
In some embodiments, the setting the first and second duty cycles to the first and second data write cache spaces, respectively, includes: setting the sum of the first duty ratio and the second duty ratio as a second preset ratio, and setting the space with the third duty ratio as a reserved space.
In some embodiments, the steps further comprise: in response to the first duty cycle reaching a threshold, increasing the first duty cycle and decreasing the third duty cycle, leaving the second duty cycle unchanged.
Fig. 3 is a schematic hardware structure of an embodiment of the above-mentioned computer device for dynamically adjusting a write buffer space according to the present application.
Taking the example of the device shown in fig. 3, a processor 301 and a memory 302 are included in the device.
The processor 301 and the memory 302 may be connected by a bus or otherwise, for example in fig. 3.
The memory 302 is used as a non-volatile computer readable storage medium, and can be used to store non-volatile software programs, non-volatile computer executable programs, and modules, such as program instructions/modules corresponding to a method for dynamically adjusting a write cache space in an embodiment of the present application. The processor 301 executes various functional applications of the server and data processing, i.e., implements a method of dynamically adjusting the write cache space, by running non-volatile software programs, instructions, and modules stored in the memory 302.
Memory 302 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created according to the use of a method of dynamically adjusting the write buffer space, etc. In addition, memory 302 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 302 may optionally include memory located remotely from processor 301, which may be connected to the local module via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
One or more computer instructions 303 corresponding to a method for dynamically adjusting a write cache space are stored in the memory 302, and when executed by the processor 301, perform the method for dynamically adjusting a write cache space in any of the method embodiments described above.
Any one embodiment of the computer device executing the method for dynamically adjusting the write cache space can achieve the same or similar effects as any one of the method embodiments corresponding to the embodiment.
The present application also provides a computer readable storage medium storing a computer program that when executed by a processor performs a method of dynamically adjusting a write cache space.
FIG. 4 is a schematic diagram of an embodiment of the above-mentioned computer storage medium for dynamically adjusting a write buffer space according to the present application. Taking a computer storage medium as shown in fig. 4 as an example, the computer readable storage medium 401 stores a computer program 402 that when executed by a processor performs the above method.
Finally, it should be noted that, as will be appreciated by those skilled in the art, all or part of the processes in the methods of the embodiments described above may be implemented by a computer program for instructing related hardware, and the program for dynamically adjusting the write buffer space may be stored in a computer readable storage medium, where the program when executed may include the processes in the embodiments of the methods described above. The storage medium of the program may be a magnetic disk, an optical disk, a read-only memory (ROM), a random-access memory (RAM), or the like. The computer program embodiments described above may achieve the same or similar effects as any of the method embodiments described above.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The foregoing embodiment of the present application has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the application, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the application, and many other variations of the different aspects of the embodiments of the application as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present application.
Claims (10)
1. A method for dynamically adjusting a write cache space, comprising the steps of:
dividing a write cache space into a first data write cache space and a second data write cache space, and setting a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively;
the pointer of the sliding window is placed at an initial point, the size of an average input/output block of the current period is calculated at intervals of preset time, and whether the size is larger than a preset value or not is judged;
moving the pointer in a first direction by a factor in response to the size being greater than the preset value; and
in response to the pointer moving in the first direction to a first end point, the first duty cycle is increased and the second duty cycle is decreased.
2. The method according to claim 1, wherein the method further comprises:
responsive to the magnitude not being greater than the preset value, moving the pointer by a factor of two in a second direction opposite the first direction; and
in response to the pointer moving in the second direction to a second end point, the first duty cycle is decreased and the second duty cycle is increased.
3. The method according to claim 2, wherein the method further comprises:
responsive to the pointer moving to the first endpoint or the second endpoint, the pointer is returned back to the initial point.
4. The method according to claim 2, wherein the method further comprises:
setting the sum of the first duty ratio and the second duty ratio as a first preset proportion, and judging whether the first duty ratio reaches a threshold value or not; and
in response to the first duty cycle reaching a threshold, the first duty cycle is maintained unchanged or reduced.
5. The method according to claim 4, wherein the method further comprises:
in response to the duration of maintaining the first duty ratio at the threshold reaching a preset duration, increasing the preset value; and
and reducing the preset value in response to the duration of keeping the second duty ratio at the threshold value reaching a preset duration.
6. The method of claim 1, wherein the setting the first and second duty cycles for the first and second data write cache spaces, respectively, comprises:
setting the sum of the first duty ratio and the second duty ratio as a second preset ratio, and setting the space with the third duty ratio as a reserved space.
7. The method of claim 6, wherein the method further comprises:
in response to the first duty cycle reaching a threshold, increasing the first duty cycle and decreasing the third duty cycle, leaving the second duty cycle unchanged.
8. A system for dynamically adjusting write cache space, comprising:
the dividing module is configured to divide the write cache space into a first data write cache space and a second data write cache space, and set a first duty ratio and a second duty ratio for the first data write cache space and the second data write cache space respectively;
the computing module is configured to place the pointer of the sliding window at an initial point, compute the size of the average input/output block of the current period at intervals of preset time, and judge whether the size is larger than a preset value or not;
a movement module configured to move the pointer in a first direction in response to the size being greater than the preset value; and
an adjustment module configured to increase the first duty cycle and decrease the second duty cycle in response to the pointer moving in the first direction to a first endpoint.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method of any one of claims 1-7.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the method of any one of claims 1-7.
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| CN106708626A (en) * | 2016-12-20 | 2017-05-24 | 北京工业大学 | Low power consumption-oriented heterogeneous multi-core shared cache partitioning method |
| CN111984407A (en) * | 2020-08-07 | 2020-11-24 | 苏州浪潮智能科技有限公司 | Data block read-write performance optimization method, system, terminal and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106708626A (en) * | 2016-12-20 | 2017-05-24 | 北京工业大学 | Low power consumption-oriented heterogeneous multi-core shared cache partitioning method |
| CN111984407A (en) * | 2020-08-07 | 2020-11-24 | 苏州浪潮智能科技有限公司 | Data block read-write performance optimization method, system, terminal and storage medium |
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